ics for communications signal processing codec filter sicofi ? , sicofi ? -2 users manual 03.92
peb 2060; peb 2260 revision history: original version 03.92 previous releases: page subjects (changes since last revision) edition 03.92 this edition was realized using the software system framemaker . published by siemens ag, bereich halbleiter, marketing-kommunikation, balanstra?e 73, d-8000 mnchen 80 ? siemens ag 1992. all rights reserved. as far as patents or other rights of third parties are concerned, liability is only assumed for components per se, not for applications, processes and circuits implemented within components or assemblies. the information describes the type of component and shall not be considered as assured characteristics. terms of delivery and rights to change design reserved. for questions on technology, delivery, and prices please contact the offices of semiconductor group in germany or the siemens companies and representatives worldwide (see address list). due to technical requirements components may contain dangerous substances. for information on the type in question please contact your nearest siemens office, semiconductor group. siemens ag is an approved cecc manufacturer.
semiconductor group 3 contents table of contents page introduction ...................................................................................................................... 5 general information ......................................................................................................... 6 1 type-designation code for ics........................................................................... 6 2 mounting instructions .......................................................................................... 6 3 processing guidelines for ics............................................................................. 7 4 data classification .............................................................................................. 12 5 quality assurance ............................................................................................... 12 overview on architecture and devices .......................................................................... 16 1 general exchange architecture .......................................................................... 16 1.1 analog line cards............................................................................................... 17 1.2 optimized line board architecture ..................................................................... 19 1.3 the sld / iom ? -2 interface ................................................................................ 20 2 device overview ................................................................................................. 23 2.1 pcm interface controller (pbc / pic / epic ? ) ................................................... 23 2.2 signal processing codec/filter (sicofi ? / sicofi ? -2) ..................................... 24 3 advantages of siemens semiconductor analog line card concept .................. 29 functional description and technical data of sicofi ? and sicofi ? -2 ..................... 30 sicofi ? peb 2060 ............................................................................................................ 30 sicofi ? -2 peb 2260......................................................................................................... 63 package outlines ............................................................................................................... 112 development support tools ........................................................................................... 113 1 general overview on hardware / software tools............................................... 113 2 sicofi ? coefficients program (sts 2060) ........................................................ 115 2.1 features .............................................................................................................. 115 2.2 general overview ............................................................................................... 115 3 sicofi ? test board (stut 2060)..................................................................... 117 3.1 features .............................................................................................................. 117 3.2 general overview ............................................................................................... 117 4 sicofi ? -2 module (sipb 5135).......................................................................... 119 4.1 features .............................................................................................................. 119 4.2 general overview ............................................................................................... 119 detailed description of software tools ......................................................................... 121 software description sts 2060 ......................................................................................... 121 calculating slic parameters of the transformer slic using m-parameters and spice ........................................................................................ 225 calculating slic transfer functions of the ericsson slic pbl 3736 using k-parameters and spice ........................................................................................ 268
semiconductor group 4 contents table of contents (contd) page detailed description of hardware tools ........................................................................ 326 sicofi ? test board stut 2060...................................................................................... 326 sicofi ? -2 module for the siemens isdn pc user board (sipb 5135) ........................... 358 slic babyboard stus 5502 for harris slic hc 5502................................................. 386 slic babyboard stus 5509 for harris slic hc 5509................................................. 398 slic babyboard stus 3762 for ericsson slic pbl 3736 .......................................... 411 slic babyboard stus 3762 for ericsson slic pbl 3762/64 ..................................... 423 slic babyboard stus 3030 for stm slic l3000 / l3030 .............................................. 437 slic babyboard stus 3090 for stm slic l3000 / l3090 .............................................. 453 slic babyboard stus 1001 for transformer slic .......................................................... 466 application notes ............................................................................................................ 475 i sicofi ? application together with harris-slic hc 5502 ............................ 475 ii sicofi ? application together with ericsson slic pbl 3762...................... 502 iii sicofi ? application together with stm slic l3000 /l3030........................... 548 iv sicofi ? application together with stm slic l3000 /l3090........................... 594 v sicofi ? application together with transformer slic with series feeding.................................................................................................... 629 vi sicofi ? application together with transformer slic with transverse feeding .................................................................................... 658 vii sicofi ? application together with transformer slic for usa specification.......................................................................................... 710 viii sicofi ? layout recommendation for analog line-card applications ............. 723 ix using sicofi ? -2 (peb 2260) in iom ? -2 mode .................................................. 728 x daml simulation using the sipb 5000 userboard system............................... 744 i om ? , iom ? -1, iom ? -2, sicofi ? , sicofi ? -2, sicofi ? -4, sicofi ? -4c, slicofi ? , arcofi ? , arcofi ? -ba, arcofi ? -sp, e pic ? -1, epic ? -s, elic ? , ipat ? -2, itac ? , isac ? -s, isac ? -s te, isac ? -p, isac ? -p te, idec ? , sicat ? , octat ? -p, q uat ? -s are registered trademarks of siemens ag. m usac ? -a, falc ? 54, iwe ? , sare ? , utpt ? , asm ? , asp ? are trademarks of siemens ag. p urchase of siemens i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c-system p rovided the system conforms to the i 2 c specifications defined by philips. copyright philips 1983.
semiconductor group 5 contents introduction the following chapters inform you about the technical data and programming of the signal processing codec filter sicofi ? / sicofi ? -2 peb 2060/2260 and describe the hardware and software tools. application notes show you how to use and work with the sicofi family in a given application. in order to get an overview of the architecture, the devices and the tools, we suggest to start having a look at the 'general overview on architectures and devices' as well as 'development support tools'. detailed descriptions can be found in the other chapters. for more information on related products and quality issues we provide the information on literature .
general information semiconductor group 6 ws ee *) available from pro electron avenue louise, 430 (b.12) b -1050 bruxelles, belgium 2 mounting instructions plastic packages for insertion the pins of the packages are bent downwards by an angle of 90 and fit into holes on a grid of 2.54 mm and with diameters of between 0.7 and 0.9 mm. the dimension x is shown in the corresponding drawing of the package. the bottom of the package will not touch the circuit board after insertion because the pins have shoulders just below the package (see figure 1) . after insertion of a package on a board it is advisable to bend the ends of two pins at an angle of approx. 30 to the board so that the package does not have to be pressed down during soldering. plastic packages are soldered on the board on the side facing away from the package. the maximum permissible soldering temperature is 260 c (max.10 s) when using a solder bath, e.g. wave soldering, and 350 c (max. 3 s) when using a soldering iron. figure 1 plastic packages (p-dso and p-lcc) for surface mounting (smd) reflow soldering: for a device temperature of 215 c max. soldering time 2 x 40 s (typical figure for vapor-phase soldering) wave soldering: soldering temperature 260 c, soldering time max. 10 s. soldering iron: the minimum thermal stress, based on experience, is at a soldering temperature of 350 c (soldering time 3 s) 1 type-designation code for ics ic type designations are based on the european pro electron system. the code system is explained in the pro electron brochure d 15*), edition 1988.
general information semiconductor group 7 3 processing guidelines for ics integrated circuits (ics) are e lectro s tatic- s ensitive (ess) devices. the demand for greater packing density has led to smaller structures on semiconductor chips, with the result that today every ic, whether bipolar, mos, or cmos, has to be protected against electrostatics. mos and cmos devices generally have integrated protective circuits and it is virtually impossible for them to be destroyed by purely static electricity. on the other hand, there is acute danger from e lectro s tatic d ischarges (esd). of the multitude of possible sources of discharge, charged devices should be mentioned in addition to charged persons. low-resistive discharges can produce peak powers amounting to kilowatts. for the protection of devices the following principles should be observed: a) reduction of charging voltage, below 200 v if possible. means which are effective here are an increase in relative humidity to 3 60 % and the replacement of highly charging plastics by antistatic materials. b) with every kind of contact with the device pins a charge equalization is to be expected. this should always be highly resistive (ideally r = 10 6 to 10 9 w ). all in all this means that ics call for special handling, because uncontrolled charges, voltages from ungrounded equipment or persons, surge voltage spikes and similar influences can destroy a device. even if devices have protective circuits (e.g. protective diodes) on their inputs, the following guidelines for their handling should nevertheless be observed. identification the packing of ess devices is provided with the following label by the manufacturer: storage and pretreatment of smd ics the components should be stored in a dry place. some large and specially identified plastic ics have to be processed in a dry condition. this is produced by dry packing or by means of a separate drying process shortly before they are processed (e.g. 16 h at 125 c) the guidelines apply to the storage, transport, testing, and processing of all kinds of ics, equipped and soldered circuit boards that comprise such components. scope
general information semiconductor group 8 handling of devices 1 ics must be left in their containers until they are processed. 2 ics may only be handled at specially equipped work stations. these stations must have work surfaces covered with a conductive material of the order of 10 6 to10 9 w /cm. 3 with humidity of > 50 % a coat of pure cotton is sufficient. in the case of chargeablesynthetic fibers the clothing should be worn close-fitting. the wrist strap must be worn snugly on the skin and be grounded across a resistor of 50 k w to 100 k w. 4 if conductive floors, r = 5 10 4 to 10 7 w are provided, further protection can be achieved by using so-called mos chairs and shoes with a conductive sole (r ? 10 5 to 10 7 w ). 5 all transport containers for ess devices and assembled circuit boards must first be brought to the same potential by being placed on the work surface or touched by the operator before the individual devices may be handled. the potential equalization should be across a resistor of 10 5 to 10 8 w . 6 when loading machines and production devices it is necessary to ensure that the devices do not come out of the transport magazine charged and that they are not damaged by touching metal, e.g. parts of a machine. example 1 conductive (black) tubes. the devices may be destroyed in the tube by charged persons or come out of the tube charged if this is emptied by a charged person. conductive tubes may only be handled at ess work stations (high-resistance work-station and person grounding). example 2) anti-static (transparent) tubes. the devices cannot be destroyed in the tube by charged persons (there may be a rare exception in the case of custom ics with unprotected gate pins). the devices can be endangered as in 1) when the tube is emptied if the latter, especially at low humidity, is no longer sufficiently anti-static after a long period of storage (> 1 year). in both cases damage can be avoided by discharging the devices across a grounded adapter of high-resistance material ( ? 10 6 to 10 8 w /cm) between the tube and the machine. the use of metal tubes C especially of anodized aluminium C is not advisable because of the danger of low-resistance device discharge.
general information semiconductor group 9 storage ess devices should only be stored in identified locations provided for the purpose. during storage the devices should remain in the packing in which they are supplied. the storage temperature should not exceed 30 c. transport ess devices in approved packing tubes should only be transported in suitable containers of conductive or longterm anti-static-treated plastic or possibly unvarnished wood. containers of both high-charging plastic or very low-resistance materials are unsuitable. transfer cars and their rollers should exhibit adequate electrical conductivity ( r < 10 6 w ). sliding contacts and grounding chains will not reliably eliminate charges. incoming inspection in incoming inspection the above guidelines should be observed. otherwise any right to refund or replacement if devices fail inspection may be lost. material and mounting 1 the drive belts of machines used for the processing of the devices, in as much as they come into contact with them (e.g. bending and cutting machines, conveyor belts), should be treated with anti-static spray (e.g. anti-static spray 100 from kontaktchemie). it is better, however, to avoid the contact completely. 2 if ess devices have to be soldered or desoldered manually, soldering irons with thyristor control may not be used. siemens emi-suppression capacitors of the type b 81711-b31 Cb36 have been proven very effective against line transients. 3 circuit boards fitted and soldered with ess devices are always to be considered as endangered.
general information semiconductor group 10 2 the sockets or integrated circuits must not be conducting any voltage when individual devices or assembled circuit boards are inserted or withdrawn, unless works specifications state otherwise. ensure that the test devices and power supplies do not produce any voltage spikes, either when being turned on and off in normal operation or if the power fuse blows or other fuses respond. 3 when supplying bipolar integrated circuits with current, the negative voltage (C v s or gnd) has first to be connected. in general, an interruption of this potential during operation is not permissible. 4 signal voltages may only be applied to the inputs of ics when or better after the supply voltage is turned on. they must be disconnected when or better before the supply voltage is turned off. 5 power supplies of integrated circuits are to be blocked as near as possible at the supply terminals of the ic. with bipolar ics it is recommended to use a low-inductance electrolytic capacitor or at least a paralleled ceramic capacitor of 100 nf to 470 nf for example. using ics with high output currents, the necessary value of the electrolytic capacitor must be adapted to the test or application circuit. transient behavior and dynamic output resistance of the power supplies, line inductances in the supply and load circuit and in particular inductive loads or motors have to be considered. when switching off line inductances of inducitve loads, the stored power has to be consumed externally, unless otherwise specified (e.g. by an electrolytic capacitor, diodes, z-diodes or the power supply). also a switching off of the supply voltage prior to the load rejection should be taken into account. 6 ics with low-pass character of the output stages (e.g. pnp drivers or pnp/npn end- stages), normally need an additional external compensation at the output. this applies particularly to complex loads. the output of af power amplifiers is compensated by the boucherot element. in individual cases, bridge circuits only need a capacitance for bypassing the load. depending on the application it is, however, also recommended to connect one capacitor from each output to ground. 7 observe any notes and instructions in the respective data books. electrical tests and application circuit 1 the devices should be processed with observation of these guidelines. before assembled and soldered circuit boards are tested, remove any shorting rings.
general information semiconductor group 11 packing of assembled pc boards or flatpack units the packing material should exhibit low volume conductivity: 10 5 w /cm < p < 10 10 w /cm. in most cases C especially with humidity of > 40 % C this requirement is fulfilled by a simple corrugated board. better protection is obtained with bags of conducitve polyethylene foam (e.g. rcas 1200 from richmond of redlands, california). you should always ensure that different boards cannot touch. in special cases it may be necessary to provide protection against strong electric fields, such as can be generated by conveyor belts for example. for this purpose a sheath of aluminium foil is recommended, although direct contact between the film and the pcb must be avoided. cardboard boxes with an aluminium-foil lining, such as those used for shipping our devices, are available from laber of munich. ultrasonic cleaning of ics the following recommendation applies to plastic packages. for cavity packages (metal and also ceramic) separate regulations have to be observed. freon and isopropyl alcohol (trade name: propanol) can be used as solvents. these solvents can also be used for plastic packages because they do not eat into the plastic material. an ultrasonic bath in double halfwave operation is advisable because of the low component stress. the ultrasonic limits are as follows: sound frequency f > 40 khz exposure t <2 min alternating sound pressure p < 29 kpa sound power n < 0.5 w/cm 2 /liter
general information semiconductor group 12 figure 1 and 2 show the most important stages of quality assurance (qa) system. qa departments independent of production and development are responsible for the selected measures, acceptance procedures and information feedback loops. operating qa departments have state-of-the-art test and measuring equipment at their disposal, work according to approved methods of statistical quality control, and are provided with facilities for accelerate life and environmental tests used for both qualification and routine monitoring tests. the latest methods and equipment for preparation and analysis are employed to achieve continuity of quality and reliability. conformance each integrated circuit is subjected to a final test at the end of the production process. these are carried out by computer-controlled, automatic test systems because hundreds of thousands of operating conditions as well as a large number of static and dynamic parameters have to be considered. moreover, the test systems are extremely reliable and reproducible. the qa department carries out a final check in the form of a lot-by-lot sampling inspection to additionally ensure this minimum percent defectives to ensure statistically that the pda of released lots is less than the aql agreed. sampling inspection is performed in accordance with the inspection plans of din 40 080, as well as of the identical mil-std-105 or iec 410. 5 quality assurance quality assurance system the high quality and reliability of integrated circuits from siemens are the results of carefully managed design and production which is systematically checked and controlled at each stage. the procedures are subject to a quality assurance system; full details are given in the brochure "quality assurance C integrated circuits". characteristics the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. operating range in the operating range the functions given in the circuit description are fulfilled. 4 data classification maximum ratings maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.
general information semiconductor group 13 figure 2
general information semiconductor group 14 figure 3 reliability measures taken during development the reliability of ics is already considerably influenced at the development stage. siemens has, therefore, fixed certain design standards for the development of circuit and layout, e.g. specifying minimum width and spacing of conductive layers on a chip, dimensions and electrical parameters of protective circuits for electrostatic charge, etc. an examination with the aid of carefully arranged programs operated on large-scale computers, guarantees the immediate identification and elimination of unintentional violations of these designs standards.
general information semiconductor group 15 the manufacturing of integrated circuits comprises several hundred production steps. as each step is to be executed with utmost accuracy, the in-procress control is of outstanding importance. some processes require more than a hundred different test measures. the tests have been arranged in a manner that the individual steps of the process can be reproduced continuously. the decreasing failure rates reflect the persistent effort in this direction; in the course of the years they have been reduced considerably despite an immense rise in ic complexity. the general course of the ic failure rate versus time is shown by a so-called "bathtub" curve. the failure rate has its peak during the first few operating hours (early failure period). after the early failure period has decayed, the "constant" failure rate period starts during which the failures may occur at an approximately uniform rate. this period ends with a repeated rise of the curve during the wear-out failure period. for ics, however, the latter period usually lies far beyond the service life specified for the individual equipment. reliability tests for ics are usually destructive examinations. they are, therefore, carried out with samples. most failure mechanisms can be accelerated by means of higher temperatures. due to the temperature dependence of the failure mechanisms, it is possible to simulate future operational behavior within a short time by applying high temperatures; this is called life test. the acceleration factor b for the life test can be obtained from the arrhenius equation reliability monitoring ( ) ) b = exp 1 1 k t 1 t 2 ( e a where t 2 is the temperature at which the life test is performed, t 1 is the assumed operating temperature, and k is the boltzmann constant. important for factor b is the activation energy e a . it lies between 0.3 and 1.3 ev and differs considerably for the individual failure mechanisms. for all siemens ics, the reliability data gained from life tests are converted to an operating temperature of t a = 55 c, assuming an average activation energy of 0.5 ev. the acceleration factor for life tests at 125 c is thus 24, compared with operational behavior. this method also considers failure mechanisms with low activation energy, i.e. which are only slightly accelerated by the temperature effect. various reliability tests are periodically performed with ic types that are representative of a certain production line C this is described in the brochure "quality assurance-integrated circuits". such tests are e.g. humidity test at 85 c and 85 % relative humidity, pressure cooker test, as well as life tests up to 1000 hours and more. test results are available in the form of summary reports. in-process control during production -
semiconductor group 16 overview on architecture and devices 1 general exchange architecture
semiconductor group 17 overview on architecture and devices 1.1 analog line cards in a digital exchange system the subscriber line boards provide the link between the subscriber and the switching network. the basic functions of analog line boards are known under the acronym borsht ( b attery, o vervoltage, r inging, s upervision, h ybrid, t esting). moreover, further important tasks are voice frequency band limitation, analog to digital conversion into time discrete digital equivalents, time-slot assignment on the pcm highways and handling of signaling and control information. usual implementation uses two pcm ports and one m p interface per subscriber line leading to a large amount of wiring and, thus, problems such as crosstalk and large board size. usual implementation is also characterized by fixed adjustment of line interface conditions although telephone line conditions vary considerably with national standards and even with subscriber line installations. under adverse conditions telecommunication equipment must match the subscriber line and termination impedances while suppressing return echoes in the two- to four-wire hybrid network. compensating for line attenuation is just as critical for balancing the voice signals in the transmission and reception paths. to improve voice quality, subscriber line boards have to be matched to different line conditions by means of interchangeable discrete components. this approach is very costly regarding line board design and manufacturing. furthermore, the reliability of a board filled with parts, wires and connections will decrease rapidly. the subscriber line board architecture proposed by siemens semiconductor is geared to eliminate many of these line board trouble spots.
semiconductor group 18 overview on architecture and devices general line board structure and functions general line card function function component realisation of the borsht function b battery feed o overvoltage protection r ringing s supervision h hybrid t testing matching of input and line impedance frequency response correction hybrid balancing gain adjustment coding, a/d and d/a conversion according to a-law and m -law, voice band limitation according to ccitt and lssgr time-slot assignment, pcm data rate slic (subscriber line interface circuit) analog network z r,x b g codec/filter pcm
semiconductor group 19 overview on architecture and devices 1.2 optimized line board architecture the siemens semiconductor concept is characterized by a centralized pcm interface controller device providing the variable time-slot assignment (tsa), the communication with up to 64 subscriber line devices such as signal processing codec/filter (sicofi ? ) or isdn devices via the sld (subscriber line data) or iom ? -2 (isdn oriented modular) interface, and the interface with a microprocessor. as a characteristic architectural feature, for test, monitring and control purposes, the device permits efficient switching of data streams between all these interfaces and, therefore, ensures transparency between the pcm channels and control or signaling data. this opens up attractive possibilities such as common-channel signaling and microprocessor access to pcm data. the use of the signal processing codec/filter (sicofi) avoids the analog network which has to be matched to different requirements by interchanging its discrete components. based on digital signal processing (dsp) methods the sicofi allows the complete control of the line conditions by software. the all-over flexibility of the unique device concept gives the user the capability for designing a standard line card which can be customized for each application under software control. the sld/iom-2 architecture leads to a highly modular line board configuration with low wiring, reduced board area and, depending only on the slic to be used, very few discrete elements. siemens ics for analog subscriber lines
semiconductor group 20 overview on architecture and devices 1.3 the sld/iom ? -2 interface the sld bus is used by the pbc/pic to interface with the subscriber line devices. a s erial i nterface p ort (sip) is used for the transfer of all digital voice and data, feature control and signaling information between the individual subscriber line devices, the pcm highways and the control backplane. the sld approach provides a common interface for analog or digital per-line components. through the pbc/pic, which is the key device in the sld architecture, the pcm data is transparently switched onto the pcm highways. the pbc will make analog and digital subscriber line boards plug-compatible in a line equipment rack. there are three leads connecting each subscriber line device and the pbc/pic: two common clock signals shared among all devices, and a unique bidirectional data lead for each of the eight sip lines. the dir ection signal (dir) is an 8-khz clock output from the pbc (master) that serves as a frame sync to the subscriber line devices (slave) as well as a transfer indicator. the data are transferred at a 512-khz rate, clocked by the s ubscriber cl oc k (sclk). when dir is high (first half of the sld 125 m s frame), four bytes of digital data are transmitted on the sld bus from the pbc/pic to the slave (receive direction). during the second half of the frame when dir is low, four bytes of data are transferred from the slave back to the pbc/pic (transmit direction). channel a and b are 64-kbit/s channels reserved for voice or data to be routed to and from the pcm highways. in an application where one sicofi is connected to a sip, voice is received on channel a and transmitted on channel a and b. for a three-party conference, channel b is the third-party voice channel. if two sicofis are connected to one sip, channel a is assigned to one and channel b to the other sicofi. conferencing is not possible in this configuration. with digital subscriber line devices the two bytes can be used to carry 64-kbit/s data channels. the third and sixth byte locations are used to transmit and receive control information for programming the slave devices. the last byte in each direction is reserved for signaling data.
semiconductor group 21 overview on architecture and devices frame structure of the sld interface because of the unique requirements of isdn systems, siemens developed an interchip interface especially for these applications. as part of their joint definition of isdn components, the "group of four" (alcatel, siemens, plessey and italtel systems houses) adapted this siemens semiconductor interface and suggested some compatible additional features. the resulting iom-2 interface has become the standard for interchip communication in isdn terminals, terminal adaptors, network terminations, transmission repeaters and line cards for digital exchange systems. the iom-2 interface is a four wire interface with: a bit clock, a frame clock and one data line per direction. it has a flexible data clock. in this way, data transmission requirements are optimized for different applications.
semiconductor group 22 overview on architecture and devices on line cards, a 4096-khz clock has been selected so that up to eight iom channels and thus, eight isdn or 16 analog subscribers can be multiplexed over a single iom-2 bus. the channel structure of the iom-2 interface is as follows: l the first two octets constitute the two 64 kbit/s b channels. l the third octet is the monitor channel. it is used for the exchange of data between devices using the iom-2 monitor channel protocol. l the fourth octet (control channel) contains C two bits for the 16 kbit/s d channel C a four-bit command/indication channel, in isdn applications or C a six bit command/indication channel for analog subscriber applications C two bits mr and mx for supporting the monitor channel protocol. multiplexed frame structure of the iom ? -2 interface
semiconductor group 23 overview on architecture and devices 2 device overview 2.1 pcm interface controller (pbc/pic/epic ? ) the key device in the sld architecture is the p eripheral b oard c ontroller (pbc) peb 2050. basically the pbc is a highly intelligent multiplexer/demultiplexer chip which performs the variable time-slot assignment for up to 16 pcm channels and handles the data streams for control and signaling. it constitutes the interface between the subscriber line devices such as codec filter or isdn communication controller, the pcm lines, the central control unit and the optional onboard microprocessor. due to the importance of reliability in system design, the pbc provides a backplane interface with two fully redundant pcm highways. for the exchange of information between a central control unit and the pbc working as a "slave" in a point-to-multipoint configuration, the device supports a subset of the ccitt's high level data link control (hdlc) communications protocol so that it can respond to certain hdlc frames without microprocessor intervention or software supervision. the hardwired implementation of the physical level of the hdlc protocol (e.g. cyclic redundancy check) and of parts of this logical level (e.g. evaluation of hdlc commands and preparation of response packets) in the on-chip hdlc controller permits very high data rates of up to 4 mbaud via the serial link to the central processor. by using a local standard microprocessor, such as the sab 8051, it is possible to expand the range of the hdlc protocol to the full x.25 level, while still maintaining procedure handling, buffering and distribution of data packets hardwired in the pbc. furthermore, the pbc is able, in conjunction with a microprocessor, to take over the "primary" function of a high speed hdlc communication link. the pbc communicates with the subscriber line devices via a three-wire subscriber line data (sld) bus based on a ping-pong type of protocol. the sld bus ensures reduced line board wiring. to cover a broad range of applications the pbc is adaptable to all standard commercial pcm systems (with 24, 32, 48, 64 channels per frame). independently of the system clock used, the circuit computes all timing signals required for the standardized sld bus, thus decoupling the subscriber line devices from the system clock. the pbc is an excellent example of the efficient realization of standard functions through the use of hardwired logic in order to increase realtime processing and speed without loss of flexibility. a further device for interfacing subscriber line devices with pcm lines is the p cm i nterface c ontroller (pic) peb 2052. this cmos device performs the time-slot assignment (tsa) and the pcm interface functions. it is pin and software-compatible to the pbc peb 2050, but leaves out the hdlc controller and the hardwired last look logic.
semiconductor group 24 overview on architecture and devices the e xtended p cm i nterface c ontroller (epic) peb 2055 is intended to be used as central pcm processor in the iom architecture. the cmos device can be programmed to operate at different data rates between 128 and 8192 kbit/s. the system interface consists of up to four duplex ports with a tristate indication signal for each output line. the configurable interface can be selected to incorporate either four duplex (iom) or eight bidirectional i/o ports (sld). the epic can therefore be programmed to communicate either with sld or with iom (isdn oriented modular) and iom ? -2 compatible devices. in both cases the device handles the layer- 1 functions of buffering the c/i and monitor channels for iom-compatible devices and the feature control and signaling channels for sld compatible devices. the epic can handle up to 32 isdn subscribers with their 2b + d channel structure or 64 analog subscribers in iom configuration or up to 16 subscribers in sld configuration. since its interfaces can operate at different data rates, the epic is an ideal device for data rate adaptation. moreover, the epic is one of the fundamental building blocks for networks with either central, decentral or mixed signaling and packet data handling architectures. the epic-2 peb 2056 is a smaller version of the epic. the functions that are performed remain essentially the same but the epic-2 peb 2056 has been optimized for time-slot assignment and switching functions on line cards with up to 8 isdn or 16 analog subscriber lines. siemens semiconductor therefore offers the optimal solution of pcm interface controller for every application. C pbc peb 2050: for up to eight isdn and 16 analog subscribers. especially suitable for powerful pabx. C pic peb 2052: for up to eight isdn and 16 analog subscribers. ideal for price sensitive systems, e.g. small pabx and public exchanges (co). C epic peb 2055: for up to 32 isdn and 64 analog subscribers. suitable as the central pcm processor in iom architectures. C epic-2 peb 2056: for up to 8 isdn or 16 analog subscribers in iom architectures. 2.2 signal processing codec/filter (sicofi ? /sicofi ? -2) the codec/filter used in the advantageous analog line board architecture is the programmable si gnal processing co dec fi lter (sicofi) peb 2060, fabricated in advanced cmos technology. based on digital signal processing (dsp) methods, in addition to the standard functions of pcm coding and voice-band limitation that any codec filter features, the sicofi provides a variety of user-programmable filters for impedance matching, 2/4-wire hybrid balancing, analog and digital gain adjustment as well as frequency response correction.
semiconductor group 25 overview on architecture and devices a sophisticated level of performance can therefore be achieved under complete software control. the use of external components or trimming procedures is completely avoided. for impedance adjustments, the related filter implements a feedback loop to modify the slic's termination impedance. it can handle complex impedances, resulting in optimized return loss for almost all subscriber line conditions. in a similar manner, the hybrid balance filter can be programmed for optimal balance between the transmit and receive side and for minimum echoes. for accurate adjustment of the gain in receive and transmit directions, four independently programmable filters can vary the level of the analog voice signal in a range of 22 db. similar to the level control, the sicofi contains digital filters in receive and transmit directions, which allow modification of the frequency response characteristics. further features attractive for the realization of flexible exchange systems are selectable a/ m law coding, three-party conference support, supply voltage supervision, hardware and software reset, power-down mode and on-chip reference voltage. different loopback modes enable both the line board and the total system to be tested during operation. the sicofi can hook up directly to virtually any commercial slic, because of its flexible signaling interface consisting of ten ports. three are dedicated to the status of voice transmissions and three to receptions. the remaining four can be programmed individually as either transmit or receive ports. due to the fact that the sicofi needs extended control information, a message-oriented protocol is used for byte transfer via the sld bus. two bits in each control byte are used to define three different classes of commands, which contain information about the configuration of the sicofi, the coefficient exchange and the number of subsequently transmitted data bytes. per frame and direction, one control byte is transferred between the sicofi and the pbc. with the appropriate commands, data can be written into or read back from the sicofi. selection of one of the two sicofis connected to one sld port is accomplished by an address bit in the feature control byte. for programming the device the information usually is transferred via the hdlc link to the pbc, but all programming can also be done by means of an on-board microprocessor. there are numerous good reasons why, the world over, major attention is given to digital signal processing methods. compared to analog filtering, digital processing does not need precision elements, allows much higher accuracy along with precisely predictable transmission behavior including noise. it makes the device less sensitive to parameter fluctuations such as drift with temperature or aging and, moreover, it provides excellent power supply rejection, better testability and crosstalk behavior of the circuit.
semiconductor group 26 overview on architecture and devices in addition, the dsp technique allows a better and easier shrinking of the device and the implementation of codec/filter functions for two and more subscribers on one chip, which is not economic or completely impossible with switched capacitor methods. the next development stage has produced a dual channel codec filter (sicofi-2) peb 2260 that performs the functions of the sicofi-1 peb 2060 for two subscribers in one chip. the sharing of the same digital signal processor part allows a reduced die size per line and leads to reduced line-card costs. moreover the cmos device can be programmed to communicate either with sld (pbc/pic) or with iom-2 (epic) compatible pcm interface controller. as shown with the sicofi the dsp approach, in a cost-saving and programmable manner, allows the realization of new functions which would be very expensive or impractical in the analog domain. optimized board controller concept circuit interface sld controller peb 2050 (pcb) with hdlc controller max. subscriber 16 analog or 8 isdn highways 2 pcm (4 mbit/s) 1 hdlc sld peb 2052 (pic) low cost pbc for analog line cards with sicofi 16 analog or 8 isdn 2 pcm (4 mbit/s) iom-2/ (sld) peb 2055 (epic-1) key device for mixed isdn/analog systems 64 analog or 32 isdn 4 pcm (8 mbit/s) iom-2 peb 2056 (epic-2) low cost epic 16 analog or 8 isdn 2 pcm (4 mbit/s)
semiconductor group 27 overview on architecture and devices optimal solutions for every application
semiconductor group 28 overview on architecture and devices mixed use of isdn and analog subscribers with epic ?
semiconductor group 29 overview on architecture and devices 3 advantages of siemens semiconductor analog line card concept l advanced signal processing codec filter sicofi family based on dsp technique. l matching to different line conditions under complete software control (global line-card solution). l modular architecture (iom-2/sld compatible). l reduced line card wiring, per line structure avoids cross wiring. l optimized board controller family. l cost optimized design/high volume production. l effective application support tools (hardware/software).
semiconductor group 30 signal processing codec filter (sicofi ? ) peb 2060 03.92 type version ordering code package peb 2060-p v 4.4 q67100-z170 p-dip-22 peb 2060-n v 4.4 q67100-h8393 p-lcc-28-r (smd) features l single chip codec and filter l band limitation according to all ccitt and at & t recommendations l digital signal processing techniques l digital voice transmission C pcm encoded (a-law or m -law) C linear (16 bit 2's complement) l programmable digital filters for C impedance matching C transhybrid balancing Cgain C frequency response correction l configurable three pin serial interface C 512-khz-sld-bus (e.g. to peb 2050/52) C burst mode with bit rates up to 4 mbit/s l programmable signaling interface to peripherals (e.g. slic) l high performance a/d and d/a conversion l programmable analog gain l advanced test capabilities C three digital loop back modes C two analog loop back modes C on chip tone generation l no trimming or adjustments l no external components l variable clock selection l signaling expansion possible l prepared for three-party conferencing l advanced low power 2 m cmos technology l power supply + / C 5 v l meets or exceeds ccitt and lssgr recommendations cmos ic p-dip-22 p-lcc-28-r
semiconductor group 31 peb 2060 general description the signal processing codec filter (sicofi) peb 2060 is a fully integrated pcm codec (coder/decoder) and transmit/receive filter fabricated in advanced cmos technology for applications in digital telecommunication systems. based on a digital filter concept, the peb 2060 provides improved transmission performance and high flexibility. the digital signal processing approach supports software controlled adjustment of the analog behavior, including attractive features such as programmable transhybrid balancing, impedance matching, gain and frequency response correction. pin configuration (top view) p-dip-22 p-lcc-28-r
semiconductor group 32 peb 2060 pin definitions and functions v dd 1 i + 5 v power supply 1 symbol p-dip-22 input (i) output (o) function p-lcc-28-r pin no. v ss 4 i C 5 v power supply 6 gnda 3 i ground analog, not internally connected to gndd all analog signals are referred to this pin 5 gndd 5 i ground digital, not internally connected to gnda all digital signals are referred to this pin 7 vin 22 i analog voice input to transmit path 28 vout 2 o analog voice output of the received digital voice 3 sclk 12 i slave clock 16 dir 10 i frame synchronisation signal (direction signal) 13 sip 17 i/o serial interface port, bidirectional serial data port 21 rs 9 i reset input, rs forces the sicofi to power down mode and initializes the configuration registers 12 test 18 i test input, normally connected to gndd 23 pll 11 i clock selection (see appendix a) 14 si1 19 i signaling inputs. data present at si is sampled and transmitted via the serial interface 24 si2 20 i 26 si3 21 i 27 so1 8 o signaling outputs. data received via the serial interface is latched and fed to these outputs 10 so2 7 o 9 so3 6 o 8 sa 16 i/o programmable i/o signaling pins. each of these pins may be declared input individually with adequate sicofi status settings. if 2 sicofis are connected to 1 serial interface, pin sa (high/low) assigns voice, control and signaling bytes 20 sb 15 i/o 19 sd 13 i/o 17 sc 14 i/o 18
semiconductor group 33 peb 2060 sicofi ? principles the sicofi codec filter solution is a highly digital approach utilizing the advantages of digital signal processing such as excellent performance, high flexibility, easy testing, no sensitivity to fabrication and temperature variations, no problems with crosstalk and power supply rejection. sicofi ? signal flow graph transmit direction the analog input signal is a/d converted, digitally filtered and transmitted either pcm-encoded or linear. antialiasing is done with a 2 nd order sallen-key prefilter (prefi). the a/d converter (adc) is a modified slopeadaptive interpolative sigmadelta modulator with a sampling rate of 128 khz. digital downsampling to 8 khz is done by subsequent decimation filters d1 and d2 together with the pcm bandpass filter (bp). receive direction the digital input signal is received pcm-encoded or linear, digitally filtered and d/a converted to generate the analog output signal. digital interpolation up to 128 khz is done by the pcm lowpass filter (lp) and the interpolation filters i1 and i2. the d/a converter (dac) output is fed to the 2 nd order sallen-key postfilter (pofi). programmable functions the high flexibility of the sicofi is based on a variety of user programmable filters, which are analog gain adjustment agr and agx, digital gain adjustment gr and gx, frequency response adjustment r and x, impedance matching filter z and the transhybrid balancing filter b.
semiconductor group 34 peb 2060 sicofi ? block diagram the sicofi bridges the gap between analog and digital voice signal transmission in modern telecommunication systems. high performance oversampling analog-to-digital converter (adc) and digital-to-analog converter (dac) provide the conversion accuracy required. an analog antialiasing prefilter (prefi) and smoothing postfilter (pofi) is included. the dedicated on chip digital signal processor (dsp) handles all the algorithms necessary, e.g. pcm bandpass filtering, sample rate conversion and pcm companding. the three pin serial sld-bus interface handles digital voice transmission and sicofi feature control. specific filter programming is done by downloading coefficients to the coefficient ram (cram). the ten pin parallel signaling interface provides for a powerful per line slic control. prefi vin dsp vout pofi interface 433 si signaling sa...sd so sclk dir sip s l d u s b ram coeff. itb00635 a d a d
semiconductor group 35 peb 2060 serial line data interface (sld interface) the exchange of data on the sld-bus is based on a bidirectional, bitserial interface consisting of three pins: sip, dir and sclk. data is written or read out on the serial interface port sip under control of the frame synchronization signal dir with a period of 125 m s *) . the interface clock frequency supplied at the slave clock pin sclk is 512 khz *) . the rate of the serial data stream on the sip pin is 512 kbit/s, that is 64 bits per each 8 khz frame *) . starting with the rising edge of dir, four bytes of information are transferred on the sld-bus to the sicofi, followed by four bytes from the sicofi to the sld-bus. bit 7 (msb) is the first bit transferred and bit 0 (lsb) is the last one of each byte. byte sequence and timing at serial interface port sip *) for applications with other clock rates see appendix a itd00636 channel a channel b control signaling channel a channel b control signaling channel b linear voice channel a signaling control channel b channel a linear voice control signaling linear voice control signaling 125 s m sip sip sip dir sld-bus sicofi receive transmit sld-bus sicofi 00 01 10 lio dir sclk sip bit 00 bit 63 bit 62 lio : field lio (linear operating mode) in cr 3 r r
semiconductor group 36 peb 2060 programming a message-orientated byte transfer is used, due to the fact that the sicofi needs extended control information. one control byte per frame and direction is transferred. with the appropriate received commands, data can be written to the sicofi or read from the sicofi onto the sld-bus. data transfer to the sicofi starts with a write command, followed by up to 8 bytes of data. the sicofi responds to a read command with the requested information, starting at the next transmission period. if no status modification or data exchange is required a nop byte is transferred ( see programming procedure ). control bytes the 8-bit control bytes consist of either commands, status information or data. there are three different classes of sicofi commands: nop no operation: no status modification or data exchange sop status operation: sicofi status setting/monitoring cop coefficient operation: filter coefficient setting/monitoring the class of command is selected by bit 2 and 3 of the control byte as shown below. due to the extended sicofi feature control facilities, sop- and cop-commands contain additional information. nop command if no status modification of the sicofi or control data exchange is required, a no operation byte nop is transferred. 1 1 1 1 1 1 1 1 0 1 x 0 nop sop cop x don't care 6 5 4 3 2 1 0 7 bit 1 1 1 1 1 1 1 1 6 5 4 3 2 1 0 7 bit
semiconductor group 37 peb 2060 sop command to modify or evaluate the sicofi status, the contents of up to four configuration registers cr1, cr2, cr3 and cr4 may be transferred to or from the sicofi. this is done by a sop- command (status operation command). ad address ad = 0 a-sicofi addressed information ad = 1 b-sicofi addressed this bit is evaluated if two sicofis are connected to one sld-port. a sicofi is accessed, if ad is consistent with the level at pin sa ( see signaling byte, programming procedure ). r/w read/write r/w = 0 write to sicofi information r/w = 1 read from sicofi enables reading from the sicofi or writing information to the sicofi. pu power up/ pu = 1 sets the sicofi to power-up mode (operating) power down pu = 0 resets the sicofi to power-down (standby mode) ( see also cr3 ) tr three party tr = 1 the received voice bytes of channel a conference and channel b are added (a + b). the result is filtered, d/a converted and transferred to analog output vout ( see also cr3 ). lsel length select information, identifies the number of subsequent data bytes ( see also programming procedure ) lsel = 0 0 no byte following lsel = 1 1 cr1 is following lsel = 1 0 cr2 and cr1 are following lsel = 0 1 cr4, cr3, cr2 and cr1 are following in this case the pu and tr bits are not overwritten. r/w pu tr 0 1 ls el ad 6 5 4 3 2 1 0 7 bit
semiconductor group 38 peb 2060 cr1 configuration register 1 this configuration register is used for enabling/disabling the programmable digital filters (db ... rg) and for accessing testmodes (tm1). db disable b-filter db = 0 b-filter enabled db = 1 b-filter disabled rz restore z-filter rz = 0 z-filter disabled rz = 1 z-filter enabled rx restore x-filter rx = 0 x-filter disabled rx = 1 x-filter enabled rr restore r-filter rr = 0 r-filter disabled rr = 1 r-filter enabled rg restore rg = 0 gx-gr-filter disabled gx-gr-filter rg = 1 gx-gr-filter enabled other codes are reserved for future use. rz rx rr rg db 6 5 4 3 2 1 0 7 bit tm1 tm1 test modes 000 no test mode 001 analog loop back via z-filter (h (z) = 1) 1) 010 disable highpass filter (part of bandpass bp) 011 cut off receive path 100 initialize data ram with 0x0000 110 digital loop back via b-filter (h (b) = 1) 2) 111 digital loop back via pcm-register 3) 1) output of the interpolation filter i1 is set to 0. value of transfer function of the z-filter is 1 (not programmable). 2) output of the low pass decimation filter d2 is set to 0. value of transfer function of the b-filter is 1 (not programmable). 3) pcm in = pcm out. this testmode is also available in standby mode.
semiconductor group 39 peb 2060 cr2 configuration register 2 the first four bits d ... a in this register, program the four bidirectional signaling pins sd ... sa. with two sicofis on one sld-port only pin sd can be used, pin sa is always input in this case and indicates the address of the sicofi. sa = 0 : a-sicofi, sa = 1 : b-sicofi ( see also bit ad in sop-command ). d signaling d = 0 sd is output pin sd d = 1 sd is input c signaling c = 0 sc is output pin sc c = 1 sc is input b signaling b = 0 sb is output pin sb b = 1 sb is input a signaling a = 0 sa is output pin sa a = 1 sa is input el signaling el = 0 no expansion logic expansion logic el = 1 expansion logic provided signaling expansion logic is only possible with one sicofi on port ( see also signaling byte ) am address mode am = 0 two sicofis on sld port am = 1 one sicofi on sld port the sicofi access to the sld-bus voice channel is controlled by am and tr. m /a pcm-law m /a = 0 a-law m /a = 1 m -law ( m 255 pcm) pcs b-filter pcs = 0 programmed coefficients coefficients pcs = 1 fixed coefficients c b a el am m /a pcs d 6 5 4 3 2 1 0 7 bit am tr sicofi a sicofi a sicofi b sicofi b receive (sld-bus t sicofi) transmit (sicofi t sld-bus) 00 channel a channel a channel b channel b 01 channel b channel b channel a channel a 10 channel a, b 1) channel a ------ ------ 11 channel a, b 1) channel a + b 2) ------ ------ 1) the sicofi transmits the same byte in channel a and b. 2) three party conference.
semiconductor group 40 peb 2060 cr3 configuration register 3 tr three party conference/reverse operating mode ( see cr2 ) 1) (change of linear mode becomes valid in the next dir-cycle). lio pu tr 6 5 4 3 2 1 0 7 bit agr agx agx = 0 0 0db agx = 0 1 6.03 db amplification agx analog gain control transmit-path agx = 1 0 12.06 db amplification agx = 1 1 14 db amplification agr = 0 0 0db agr = 0 1 6.03 db attenuation agr analog gain control receive-path agr = 1 0 12.06 db attenuation agr = 1 1 14 db attenuation pu = 0 power down (standby) pu = 1 power up (operating) pu power up / power down 1) 1) the bits pu and tr may also be overwritten by a sop command with lsel 1 01 (pu and tr are part of the sop command). with lsel = 0 1, the bits pu and tr in the sop command are ignored. 2) subsequent to a sop/cop-read command the control and signaling information is transmitted instead of linear voice. lio = 0 0 pcm mode lio = 0 1 linear mode 1 2) lio linear operating mode ( see serial interface ) lio = 1 0 linear mode 2
semiconductor group 41 peb 2060 cr4 configuration register 4 other codes are reserved for future use. 0 0 6 5 4 3 2 1 0 7 bit tm4 tm3 tm3 test modes 000 no test mode 001 additional + 6 db digital gain in transmit direction (gx) 011 additional + 12 db digital gain in transmit direction (gx) 100 enable on chip tone generation 1) 110 far analog loop back 2) 1) with the r-filter disabled a 2 khz, 0 dbm0 sinusoidal signal is fed to the input of the receive lowpass filter lp (other frequencies see appendix b). 2) the output of the x-filter is fed to the input of the r-filter (8 khz, 16 bit linear). tm4 test modes 000 no test mode 100 digital loop back via analog port (vin = vout)
semiconductor group 42 peb 2060 cop command with a cop command coefficients for the programmable filters can be written to the sicofi coefficient ram or transmitted on the sld-bus for verification. ad address ad = 0 a-sicofi addressed information ad = 1 b-sicofi addressed this bit is evaluated with two sicofis on one sld-port only. with two sicofis on port, a sicofi is identified, if ad is consistent with the level at pin sa ( see signaling byte, programming procedure ). r/w read/write r/w = 0 write to sicofi information r/w = 1 read from sicofi this bit indicates whether filter coefficients are written to the sicofi or read from the sicofi. other codes are reserved for future use. 6 5 4 3 2 1 0 7 bit r/w ad co de code 000011 b-filter coefficients part 1 001011 b-filter coefficients part 2 010011 z-filter coefficients 011000 b-filter delay coefficients 100011 x-filter coefficients 101011 r-filter coefficients 110000 gx- and gr-filter coefficients *) (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 4 bytes of data) (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 4 bytes of data) *) in the range C 8 db to 8 db gain adjustment is possible in steps 0.25 db
semiconductor group 43 peb 2060 signaling byte the signaling interface of the sicofi consists of 10 pins. 3 transmit signaling inputs: si1, si2 and si3 3 receive signaling outputs: so1, so2 and so3 4 bidirectional programmable signaling pins: sa, sb, sc and sd data present at si1 si3 and possibly at some or all of sa sd (if programmed as inputs) are sampled and transferred serially on sip onto the sld-bus. data received serially on sip from the sld-bus are latched and fed to so1 so3 and possibly to some of sa sd if programmed as output. the signaling field format is generally: in receive direction: in transmit direction: where sel is the signaling expansion bit if el = 1 in cr2. for the different cases possible, the signaling byte format at sip is z high impedance, x dont care so2 so3 sd sc sb sa sel so1 6 5 4 3 2 1 0 7 bit si2 si3 sd sc sb sa sel si1 6 5 4 3 2 1 0 7 bit receive signaling byte transmit signaling byte bit case 76543210 1 so1so2so3xxxxx si1 si2 si3 sd sc sb sa 0 76543210 2 so1so2so3xxxxx si1 si2 si3 sd sc sb sa z 3 so1 so2 so3 sd sc sb sa x si1si2si300000 4 so1 so2 so3 sd sc sb sa x si1si2si3zzzzz 5a-sic so1so2so3xxxxx si1si2si3sdzzzz b-sic xxxxso1so2so3x zzzzsi1si2si3sd 6a-sic so1so2so3sdxxxx si1si2si30zzzz b-sic xxxxso1so2so3sd zzzzsi1si2si30
semiconductor group 44 peb 2060 cases 1 one sicofi is connected to one sld port, el = 0 (no signaling expansion logic provided); sa sd are programmed as transmit signaling inputs. 2 one sicofi connected to one sld port, el = 1 (signaling expansion logic provided); sa sd are programmed as transmit signaling inputs. 3 one sicofi is connected to one sld port; el = 0 (no signaling expansion logic provided); sa sd are programmed as receive signaling outputs. 4 one sicofi is connected to one sld port; el = 1 (signaling expansion logic provided); sa sd are programmed as receive signaling outputs. if a signaling expansion logic is provided (see case 2 and 4), the signaling bits sa sd which are programmed as signaling inputs or outputs can be used as additional expansion bits in receive or transmit direction, respectively. as far as sicofi is concerned, sip is in a high-impedance (z) state or "don't care" (y) state while these bits are transferred. 5 two sicofis are connected to one sld port; sd is programmed as transmit signaling input. 6 two sicofis are connected to one sld port; sd is programmed as receive signaling output. if two sicofis are connected to one sld port, no signaling expansion logic is possible. sa is programmed as input automatically, and defines the addressed sicofi: sa = 0 : a-sicofi sa = 1 : b-sicofi . sb and sc are not usable with two sicofis on one sld port.
semiconductor group 45 peb 2060 programming procedure the following table shows some control byte sequences. if the sicofi has to be configured completely during initialization, up to 60 bytes will be transferred. dir x don't care db1, db2 db8 coefficient data byte 1 8 itd02445 receive transmit receive transmit receive transmit receive transmit receive transmit receive dir no operation nop nop nop nop nop nop nop nop nop nop sop write nop sop nop sop cr1 nop nop sop cr2 nop cr1 nop nop sop cr4 nop cr3 nop cr2 nop cr1 nop lsel = 00 lsel = 11 lsel = 10 lsel = 01 sop read nop sop cr1 sop cr2 sop x cr1 cr4 sop x cr3 x cr2 x cr1 lsel = 00 lsel = 11 lsel = 10 lsel = 01 cop write nop cop db4 nop db3 nop db2 nop db1 nop nop cop db8 nop db7 nop db1 nop 4 bytes 8 bytes cop read db4 cop x db3 db1 x cr2 x cr1 db8 cop x db7 db1 x cr2 x cr1 4 bytes 8 bytes
semiconductor group 46 peb 2060 operating modes basic setting upon initial application of v dd or reseting pin rs to "1" while operating, the sicofi enters a basic setting mode. basic setting means, that the sicofi configuration registers cr1 cr4 are initialized. all cr1 bits are set to "0" (all programmable filters are disabled except the b- filter where fixed coefficients are used, no test mode); cr2 is set to "1" (sa sd are inputs, signaling expansion logic is provided, one sicofi on sld-port, m -law chosen and fixed b- filter coefficients used). all cr3 and cr4 bits are reset to "0" (no additional amplification or attenuation, no linear mode, power down, no test mode). receive signaling registers are cleared. sip is in high-impedance state, the analog output vout and the receive signaling outputs so1 so3 are forced to ground. the serial interface is active to receive commands starting with the next 8-khz sld-bus frame. the serial interface port sip remains in high-impedance state until cr2 has been defined. if two sicofis are connected to one sld port, both sicofi's get the same sop and cr2 information during initialization. the subsequent cr1 byte is assigned to the addressed sicofi only. if the two sicofi's need different cr2 information, the sop-cr2 sequence has to be provided once again (each sicofi knows its address now). if any voltage is applied to any input before initial application of v dd , the sicofi may not enter the basic setting mode. in this case it is necessary either to reset the sicofi via the rs pin or to initialize the configuration registers cr1, cr2, cr3, cr4. standby mode upon reception of a sop command to load cr2 from the basic setting, the sicofi enters the standby mode (basic setting replaced by individual cr2). being in the operating mode, the sicofi is reset to standby mode with a power-up bit pu = 0 (in cr3 or in the sop-command directly). the serial interface is active to receive and transmit new commands and data. operating mode from the standby mode, the operating mode is entered upon recognition of a power-up bit pu = 1 (in cr3 or in the sop-command directly).
semiconductor group 47 peb 2060 transmission characteristics the target figures in this specification are based on the subscriber-line board requirements. the proper adjustment of the programmable filters (transhybrid balancing: b; impedance matching: z; frequency-response correction: x, r) needs a complete knowledge of the sicofis analog environment. unless otherwise stated, the transmission characteristics are guaranteed within the test condition below. t a = 0 c to 70 c; v dd = 5 v 5%; v ss = C 5 v 5 %; gnda = gndd = 0 v r l > 10 k w ; c l < 50 pf; h(z) = h(b) = 0; h(x) = h(r) = 1; gx = 0 to 8 db; gr = 0 to C 8 db; agx = 0, 6.03, 12.06, 14 db; agr = 0, C 6.03, C 12.06, C 14 db; f = 1000 hz; 0 dbm0; a-law or m -law; a 0 dbm0 signal is equivalent to 1.5763 [1.5710] vrms. a 3.14 [3.17] dbm0 signal is equivalent to 2.263 vrms which corresponds to the overload point of 3.2 v (a-law, [ m -law]). unit limit values parameter symbol min. typ. max. db total harmonic distortion, 0dbm0; f = 300 hz to 3400 hz thd C50 C44 db db crosstalk 0dbm0; f = 300 hz to 3400 hz transmit to receive receive to transmit ct xr ct rx C85 C85 C80 C80 dbm0p dbrnc dbm0p dbrnc idle channel noise, transmit, psophometric, a-law vin = 0 v transmit, c-message, m -law vin = 0 v receive, psophometric, a-law idle code + 0 receive, c-message, m -law idle code + 0 n tp n tc n rp n rc C82 8 C67.4 17.5 C78 12 db db db gain (either value) 1) gain absolute (agr = agx = 0) t a =25c, v dd = 5 v, v ss = C 5 v t a =0C70c, v dd = 5 v 5%, v ss = C 5 v 5% gain absolute (agr = 0 to 14 db, agx = 0 to 14 db) t a =0C70c; v dd = 5 v 5%, v ss = C 5 v 5% g g C0.2 C0.3 C0.4 0.06 0.10 0.2 0.3 0.4 db db intermodulation 2 f 1C f 2 2) 2 f 1C f 2 3) imd C42 C56 1) r l =300 w causes an additional attenuation in the range between C 0.1 to 0 db. 2) equal input levels in the range between C 4 dbm0 and C 21 dbm0; different frequencies in the range between 300 hz and 3400 hz. 3) input level C 9 dbm0, frequency range 300 hz to 3400 hz and C 23 dbm0, 50 hz.
semiconductor group 48 peb 2060 attenuation distortion attenuation deviations stay within the limits in the figures below. receive: reference frequency 1 khz, input signal level 0 dbm0 transmit: reference frequency 1 khz, input signal level 0 dbm0 itd00637 -1.0 -0.5 0 0.5 1.0 1.5 2.0 db 5678910 2 3 4 56789 2 khz 4 -1 10 0 0.650 0.125 -0.125 3.4 attenuation f
semiconductor group 49 peb 2060 group delay maximum delays for operating the sicofi with h(b) = h(z) = 0 and h(r) = h(x) = 1, including delay through a/d- and d/a converters. specific filter programming may cause additional group delays. group delay deviations stay within the limits in the figures below. group delay absolute values: input signal level 0 dbm0 group delay distortion: input signal level 0 dbm0, reference frequency = 1.4 khz unit limit values parameter symbol min. typ. max. m s transmit delay d xa 300 m s receive delay d ra 240 test condition f = 1.4 khz f = 300 hz itd00639 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 100 200 300 400 500 m s khz t f 250 70 0.7 2.8 3.1
semiconductor group 50 peb 2060 out-of-band signals at analog input with an out-of-band sine wave signal with frequency f and level a applied to the analog input, the level of any resulting frequency component at the digital output will stay at least x db below level a. out-of-band signals at analog output with a 0 dbm0 sine wave of frequency f applied to the digital input, the level of any resulting out-of-band signal at the analog output will stay at least x db below a 0 dbm0, 1 khz sine wave reference signal at the analog output. itd00640 -18 10 -2 0 10 -1 1 10 2 5 5 5 khz 10 f -12 -6 db 61018 attenuation itd00641 0 10 -2 db 10 -1 1 10 2 5 5 5 khz 10 f 10 20 30 40 0.06 4.6 attenuation itd00642 0 10 -2 10 20 30 40 50 db 10 -1 1 10 2 5 5 5 khz 10 f 15 4.6 attenuation
semiconductor group 51 peb 2060 gain tracking (receive and transmit) the gain deviations stay within the limits in the figures below gain tracking: measured with noise signal according to ccitt recommendations, reference level is C 10 dbm0, agx = agr = 0 gain tracking: measured with sine wave in the range 700 to 1100 hz, reference level is C 10 dbm0, agx = agr = 0 itd00643 -70 -60 -50 -40 -30 -20 -10 0 10 -1.0 -0.5 0 0.5 1.0 -55 -35 dbm0 0.4 0.25 0.2 0.2 0.25 0.4 db input level g d itd00644 -70 -2 -60 -50 -40 -30 -20 -10 0 10 -1 0 1 2 db -1.4 -0.5 -0.2 0.2 0.5 1.4 0.25 -0.25 d g input level 3 -55 dbm0
semiconductor group 52 peb 2060 total distortion the signal-to-distortion ratio exceeds the limits in the following figures. receive: measured with noise signal according to ccitt recommendations transmit: measured with noise signal according to ccitt recommendations itd00645 -60 -50 -40 -30 -20 -10 0 10 20 30 40 -55 -34 -27 -6 -3 -24 36.0 34.3 29.7 14.7 36.7 28.4 dbm0 db input level s/d 0 itd00646 -60 -50 -40 -30 -20 -10 0 10 20 30 40 -55 -34 -27 -6 -3 -24 35.4 33.3 28.7 13.7 36.3 27.4 dbm0 db input level s/d 0
semiconductor group 53 peb 2060 the signal to distortion ratio exceeds the limits in the following figures. receive & transmit: measured with sine wave in the range 700 to 1100 hz excluding submultiples of 8 khz signal to total distortion ccitt noise signal digital-digital (a-law and m -law) itd00647 -60 -50 -40 -30 -20 -10 0 10 20 30 40 35.5 dbm0 db input level s/d -45 31.0 27.0 24.5 36.4 29.5 -28 m - law a - law 0 parameter total distortion digital loop back via b-filter or digital loop back via analog port input level min. unit unit 0 C30 C40 C45 31 31 25 20 dbm0 dbm0 dbm0 dbm0 db db db db
semiconductor group 54 peb 2060 transhybrid loss the quality of transhybrid-balancing is very sensitive to deviations in gain and group delay C deviations inherent to the sicofi a/d- and d/a-converters as well as to all external components used on a line card (slic, op's etc.) the sicofi transhybrid loss is measured in the following way: a sine wave signal with level 0 dbm0 and a frequency in the range of 300 C 3400 hz is applied to the digital input. the resulting analog output signal at pin vout is directly connected to vin, e.g. with the sicofi testmode "digital loop back via analog port" ( see cr4 ). the programmable filters r, gr, x, gx and z are disabled, the balancing filter b is enabled with coefficients optimized for this configuration ( v out = v in ). the resulting echo measured at the digital output is at least x db below the level of the digital input signal as shown in the table below. b-filter coefficients recommended for transhybrid loss measurement with v out = v in cop-write coefficients (83) (8b) (98) b-filter part 1 b-filter part 2 b-filter delay fd 29 fb 38 a1 a0 3c 42 00 af 62 2b cf d1 ca a4 19 19 11 19 unit limit values parameter symbol min. typ. db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 33 29 27 45 40 35 test condition t a =25c, v dd =5v, v ss =C5v, agr = agx = 0 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 29 27 25 40 35 30 t a = 0 to 70 c, v dd =5v 5%, v ss =5v 5%, agr = agx = 0 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 27 25 23 40 35 30 t a = 0 to 70 c, v dd =5v 5%, v ss =C5v 5%, agr = agx = 6.03, 12.06, 14.00 db
semiconductor group 55 peb 2060 absolute maximum ratings operating range t a = 0 to 70 c; v dd = 5 v 5%; v ss = C 5 v 5%; gndd = 0 v; gnda = 0 v unit limit values parameter symbol min. max. v v dd referred to gndd C 0.3 5.5 v gnda to gndd C 0.6 0.6 v v analog input and output voltage referred to v dd = 5 v, v ss = C5v referred to v ss = C5v, v dd = 5 v v in v in C10.3 C0.3 0.3 10.3 v v ss referred to gndd C 5.5 0.3 v v all digital input voltages referred to gndd = 0 v, v dd = 5 v referred to v dd = 5 v, gndd = 0 v v in v in C0.3 C5.3 5.3 0.3 ma dc input and output current at any input or output pin i dc 10 c storage temperature t stg C60 125 w power dissipation p d 1 c ambient temperature under bias t a C10 80 unit limit values parameter symbol min. typ. max. ma ma v dd supply current stand by operating i dd 2.1 8 4 12 test condition ma ma v ss supply current stand by operating i ss 1.7 5 3 8 db power supply rejection (of either supply/direction) psrr 30 44 1khz 80 mvrms ripple mw mw power dissipation stand by power dissipation operating p ds p do 20 70 37 105
semiconductor group 56 peb 2060 electrical characteristics digital interface t a = 0 to 70 c; v dd = 5 v 5%; v ss = C5v 5%; gndd = 0 v; gnda = 0 v analog interface t a = 0 to 70 c; v dd = 5 v 5%; v ss = C 5 v 5%; gndd = 0 v; gnda = 0 v unit limit values parameter symbol min. max. v l-input voltage v il C0.3 0.8 test condition v h-input voltage v ih 2.0 v l-output voltage v ol 0.45 i 0 =C2ma v h-output voltage v oh 2.4 i 0 =400 m a m a input leakage current i il 1 C0.3 v in v dd unit limit values parameter symbol min. max. m w analog input resistance r i 10 test condition w analog output resistance r o 10 mv input offset voltage v io 50 mv output offset voltage v oo 50 v input voltage range v ir 3.2 v output voltage range v or 3.1 r l 3 300 w ; c l 50 pf
semiconductor group 57 peb 2060 sip interface timing (sld-bus) switching characteristics itt00649 t sclk t dirxs t dirxh t dir t sclk t dinxs t dinxh t dout 2 sclk t 2 high imp. sclk dir sip data in sip data out 90% 10% t ddhz unit limit values parameter symbol min. typ. max. period sclk t sclk 1/512 khz % duty cycle 20 50 80 m s period dir t dir 125 ns dir setup time t dir s 20 0 C80 ns dir hold time t dir h 250 ns sip data in setup time t din s 20 ns sip data in hold time t din h 100 ns sip data out delay t ddout 150 250 ns sip data out high impedance delay vs. sclk t ddhz 50 70
semiconductor group 58 peb 2060 signaling interface timing switching characteristics itd02446 t dsig t dsigz t sig t sig out inxs inxh last control bit out first signaling bit out last control bit in last signaling bit in sclk sip data in sip data in sip data in sig out sig out sig in 10% 90% unit limit values parameter symbol min. typ. max. ns delay signaling out vs. sclk 1) t dsigout 250 350 ns sig in setup time 2) t sigin s 50 ns sig in hold time 2) t sigin h 100 ns reset pulse width 3) t res 500 ns delay signaling high impedance vs. sclk t dsigz 150 200 1) pins so1 so3; pins sa sd as output 2) pins si1 si3; pins sa sd as input 3) sicofi is ready to accept sop/cop commands in the next dir cycle. spikes shorter than 244 ns will be ignored.
semiconductor group 59 peb 2060 appendix a specific interface types the sicofi can be used with three different sld-bus type interfaces. a specific interface type is selected with three pins: test, si3 and pll. 1) sld-bus interface 1) 2) sld-bus interface with variable clock frequencies 2) test si3 pll 0 x x itd00651 f = 256 khz = 4096 khz f = 512 khz f f = 8 khz dir sclk mclk sip data test si3 *) pll 1 0 0 *) si3 cannot be used as signaling pin itd00652 f / 16 khz f f f / 512 khz dir sclk mclk sip data 1) 4096-khz masterclock mclk is generated from 512-khz sclk by on chip pll 2) maximum mclk-frequency = 8 mhz
semiconductor group 60 peb 2060 3) burst mode interface 1) test si3 *) pll 1 0 1 *) si3 cannot be used as signaling pin itd00653 f / 2 khz f f f / 512 khz dir sclk mclk sip data 1) maximum mclk-frequency = 8 mhz
semiconductor group 61 peb 2060 in burst-mode 8- or 16-bit bursts are received or transmitted, depending on the linear mode selected ( see field lio in cr3 ). detail a a voice a c control b voice b s signaling msb bit 15-8 of linear in- or output lsb bit 7-0 of linear in- or output itd00654 voice a voice b control signaling voice a voice b control signaling abcsabcsa a lsb msb b a s c b a msb + lsb c + s c + s msb + lsb msb + lsb detail a sip field lio field lio sip field lio sip dir = = = 00 01 10 itd00655 76543210 voice a voice a 0 1 2 3 4 5 6 7 15 14 13 12 11 10 9 8 linear voice 0 1 2 3 4 5 6 7 sip field lio field lio sip field lio sip sclk dir = = = 00 01 10
semiconductor group 62 peb 2060 appendix b on chip tone generation by setting field tm3 in cr4 to '100' the on-chip tone generator is activated with a fixed frequency of 2 khz. the frequency f tone may be programmed via the r-filter coefficients (r- filter enabled) in the range of 0 to 4 khz. the gain may be adjusted with the programmable gr- filter. the trapezoidal tone generation algorithm used, provides for a harmonic distortion better than 27 db. calculation of the r-filter coefficients: f tone : = 8192 inc/ f mclk with f mclk , f tone [khz] inc : = s r1 2 Cexp r1 (1 + s r2 2 Cexp r2 (1 + s r3 2 Cexp r3 (((1 + s r9 2 Cexp r9 ))) s sign, exp exponent a 1 := inc for i : = 1 to 9 do find s i , exp i : for ( a i Cs i 2 Cexp i ) = min; s i ? (C 1, 1), exp i ? (0 7) a i+1 := (a i /s i 2 Cexp i ) C1 r i := [(Cs i +1)/2), bin(exp i ) ] (to be transferred to the sicofi) next i programming byte sequence for selected frequencies itd00656 + + + + + + + + r9 r8 r7 r6 r5 r4 r3 r2 r1 inc 1 coefficients frequency hz 2000 1000 800 697 770 852 941 1209 1336 1477 1633 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab 2b/ab cop write *) 00 00 00 00 00 00 00 00 00 00 00 xx 00 00 00 00 00 00 00 00 00 00 00 xx 00 00 00 00 00 00 00 00 00 00 00 xx 00 10 10 20 10 10 10 10 10 10 00 r 1x 8f 8f aa a1 ca 3b cc b2 22 d1 1b r 3 r 2 8f 8f aa 2b 32 c1 bb 22 a1 c1 5c r 5 r 4 8f 8f aa 4b 2d bb 12 5f 5f bb ca r 7 r 6 8f 8f aa b1 b3 12 da 8f 1b 12 13 r 9 r 8 x dont care *) 2b for sicofi a, ab for sicofi b.
semiconductor group 63 dual channel codec filter (sicofi ? -2) peb 2260 pef 2260 03.92 features l dual channel single chip codec and filter l band limitation according to all ccitt and at&t recommendations l digital signal processing techniques l pcm encoded digital voice transmission (a-law or m -law) l programmable digital filters for C impedance matching C transhybrid balancing Cgain C frequency response correction l two digital interfaces C three pin serial sld interface (eg. to peb 2050/52) C four pin serial iom ? -2 interface with two different clock-frequencies and time-slot assignment (e.g. to peb 2055/56) l programmable signaling interface to peripherals (e.g. slic) l high performance a/d and d/a conversion l programmable analog gain adjustment l advanced test capabilities C three digital loop back modes C two analog loop back modes C two programmable tone generators cmos ic p-lcc-28-r l no trimming or adjustments l no external components l advanced low power 2 m cmos technology l power supply + / C 5 v l meets or exceeds ccitt and lssgr recommendations l two types are available: C peb 2260 with standard temperature range 0...70 o c C pef 2260 with extended temperature range -40...85 o c type version ordering code package pef 2260-n v 2.0 q67100-h6261 p-lcc-28-r (smd) peb 2260-n v 2.0 q67100-h6191 p-lcc-28-r (smd)
peb 2260 pef 2260 semiconductor group 64 general description the dual channel codec filter peb 2260 (sicofi ? -2) is a fully integrated pcm codec and filter fabricated in low power 2 m cmos technology for applications in digital communication systems. based on an advanced digital filter concept, the peb 2260 provides excellent transmission performance and high flexibility. the digital signal processing approach includes attractive programmable features such as transhybrid balancing, impedance matching, gain and frequency response correction. pin configuration for sld mode pin configuration for iom ? -2 mode (top view) (top view)
peb 2260 pef 2260 semiconductor group 65 pin definitions and functions for sld interface mode function symbol pin no. input (i) output (o) + 5 v power supply 22 v dd i C 5 v power supply 8 v ss i ground digital. not internally connected to gnda or gndb. all digital signals are referred to this pin 24 gndd i ground analog channel a. not internally connected to gndd or gndb. all channel a analog signals are referred to this pin 1 gnda i ground analog channel b. not internally connected to gndd or gnda. all channel b analog signals are referred to this pin 15 gndb i channel a analog voice input 27 vina i channel a analog voice output 3 vouta o channel b analog voice input 17 vinb i channel b analog voice output 13 voutb o operating mode selection, sld or iom-2 interface: connected to '0' for sld interface mode 25 mode i slave clock, 512 khz 21 sclk i direction signal, 8-khz frame synchronisation 20 dir i serial interface port, bidirectional serial data port 19 sip i/o reset input, rs forces the sicofi-2 to basic setting mode 23 rs i 2 si1a i 28 si2a i 26 si3a i 14 si1b i 16 si2b i 18 si3b i signaling inputs: data present at si1a ... si3b are sampled and transmitted via the serial interface
peb 2260 pef 2260 semiconductor group 66 pin definitions and functions for sld interface mode (continued) pin definitions and functions for iom ? 2 interface mode function symbol pin no. input (i) output (o) bidirectional signaling pins: sba, sbb pins may be programmed as input or output individually with adequate sicofi-2 status settings 5 so1a o 6 so2a o 7 so3a o 11 so1b o 10 so2b o 9 so3b o signaling outputs: data received via the serial interface are latched and fed to so1a ... so3b 4 sba i/o 12 sbb i/o function symbol pin no. input (i) output (o) + 5 v power supply 22 v dd i C 5 v power supply 8 v ss i ground digital. not internally connected to gnda or gndb. all digital signals are referred to this pin 24 gndd i ground analog channel a. not internally connected to gndd or gndb. all channel a analog signals are referred to this pin 1 gnda i ground analog channel b. not internally connected to gndd or gnda. all channel b analog signals are referred to this pin 15 gndb i channel a analog voice input 27 vina i channel a analog voice output 3 vouta o channel b analog voice input 17 vinb i channel b analog voice output 13 voutb o operating mode selection, sld or iom-2 interface: connected to '1' for iom-2 interface mode 25 mode i
peb 2260 pef 2260 semiconductor group 67 pin definitions and functions for iom ? 2 interface mode (continued) data clock, 512 khz or 4096 khz 21 dcl i frame synchronisation clock, 8 khz 20 fsc i data upstream 19 du o reset input, rs forces the sicofi-2 to basic setting mode 23 rs i data downstream 18 dd i function symbol pin no. input (i) output (o) 28 i1a i 16 i1b i indication inputs: data present at i1a ... i1b are sampled and transmitted via the serial interface 5 c1a o 6 c2a o 26 c3a o 11 c1b o 10 c2b o command outputs: data received via the serial interface are latched and fed to c1a ... c3a and c1b ... c2b 2 ci1a i/o 4 ci2a i/o 14 ci1b i/o 12 ci2b i/o bidirectional command/indication pins: ci1a ... ci2b may be programmed as input or output individually with adequate sicofi-2 status settings 7 ts1 i 9 ts2 i time-slot selection pins 1 ... 2 with ternary logic
peb 2260 pef 2260 semiconductor group 68 sicofi ? -2 principles the sicofi-2 codec filter solution is a highly digital approach utilizing the advantages of digital signal processing such as excellent performance, high flexibility, easy testing, no sensitivity to fabrication and temperature variations, no problems with crosstalk and power supply rejection. sicofi ? -2 signal flow graph (for either channel) transmit direction the analog input signal is a/d converted, digitally filtered and transmitted pcm-encoded. antialiasing is done with a 2 nd order sallen-key prefilter (prefi). the a/d converter (adc) is a modified slopeadaptive interpolative sigma-delta modulator with a sampling rate of 128 khz. digital downsampling to 8 khz is done by subsequent decimation filters d1 and d2 together with the transmit pcm lowpass filter (lpx). receive direction the digital input signal is received pcm-encoded, digitally filtered and d/a converted to generate the analog output signal. digital interpolation up to 128 khz is done by the receive pcm lowpass filter (lpr) and the interpolation filters i1 and i2. the d/a converter (dac) output is fed to the 2 nd order sallen-key postfilter (pofi). programmable functions the high flexibility of the sicofi-2 is based on a variety of user programmable filters, which are analog gain adjustment agr and agx, digital gain adjustment gr and gx, frequency response adjustment r and x, impedance matching filter z and the transhybrid balancing filter b. its02447 agx prefi a/d d1 d2 gx hp i2 i1 gr lpr zb x r tg exp comp d/a agr pofi transmit receive + + vin vout lpx pcmout pcmin 1, 2
peb 2260 pef 2260 semiconductor group 69 sicofi ? -2 block diagram the sicofi-2 bridges the gap between analog and digital voice signal transmission in modern telecommunication systems. high performance oversampling analog-to-digital converters (adc) and digital-to-analog converters (dac) provide the conversion accuracy required. analog antialiasing prefilters (prefi) and smoothing postfilters (pofi) are included. the dedicated on chip digital signal processor (dsp) handles all the algorithms necessary, e.g. pcm bandpass filtering, sample rate conversion and pcm companding. the sld or iom-2 interface handles digital voice transmission, sicofi-2 feature control and access to the sicofi-2 signaling pins. specific filter programming is done by downloading coefficients to the coefficient ram (cram). prefi vin a adc dsp dac vout b pofi iom -2 slic-interface scl/dcl dir/fsc sip/du ram coeff. itb00659 sld/ interface dd adc vin b prefi pofi vout a dac channel b channel a r
peb 2260 pef 2260 semiconductor group 70 sicofi ? -2 digital interfaces the sicofi-2 digital interface section consists of a serial interface bus which can be configured to be compatible to sld or the iom-2 standard (with two different data clock frequencies), and a powerful signaling interface. selecting between the iom-2 and sld interfacing mode is simply performed by strapping the mode pin. mode = '0' : sld interface mode = '1' : iom-2 interface for better understanding, pin names are quoted with their interface specific name. e.g. pin sip/du: sip for sld interface mode, du for iom-2 interface mode. sld interface the sld serial interface consists of a bidirectional pin sip, a data clock input sclk, and a synchronization input dir. data bits are loaded or read out by the serial interface pin sip. bits are clocked in at the falling edge and clocked out at the rising edge of the slave clock pin sclk (512 khz). dir and sclk inputs must be phase locked. a sld frame lasts 125 m s and consists of 32 bits transferred to the sicofi-2 followed by 32 bits transferred from the sicofi- 2 to the sld bus. the sld interface thus provides a full duplex 256 kbit/s communication channel. this channel is subdivided in two 64 kbit/s voice/data channels, a 64 kbit/s feature control channel and an other 64 kbit/s signaling channel per direction. bytes in all channels are serialized msb first. itd02448 channel a channel b control signaling channel a channel b control signaling 125 m s bit 00 bit 63 bit 62 dir sclk sip dir sclk sip receive transmit sld - bus sicofi - 2 r sicofi - 2 r sld - bus
peb 2260 pef 2260 semiconductor group 71 iom ? -2 interface the iom-2 interface consists of two data lines and two clock lines. du (data upstream) carries data from the sicofi-2 to a master device. dd (data downstream) carries data from the master device to the sicofi-2. a 8 khz fsc (frame synchronization clock) signal as well as a 512 khz or 4096 khz dcl (data clock) signal is supplied. the sicofi-2 implements all functions for analogue devices as described in the iom-2 specification. iom ? -2 interface, dcl = 512 khz (one channel per frame) iom ? -2 interface, dcl = 4096 khz (eight channels per frame) itd02449 b1 detail a 125 m s fsc dd du dcl 512 khz b2 monitor data c/i 6:1 b1 b2 monitor data c/i 6:1 m rx m m x r m itd02450 ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 detail a detail b 125 m s fsc dd du dcl 4096 khz
peb 2260 pef 2260 semiconductor group 72 detail a detail b itd02451 bit n bit 0 bit 1 fsc dcl dd/du itd02452 mr mx c/i 6:1 monitor data b1 b2 dd du b2 b1 monitor data c/i 6:1 mx mr
peb 2260 pef 2260 semiconductor group 73 with a dcl frequency of 4096 khz assignment of 8 time slots is possible. the iom-2 operating mode and time-slot selection is set completely by pin-strapping of two pins ts1 and ts2, which work with ternary logic (C 5 v [n], 0 v [0] and + 5 v [p]). iom ? -2 monitor channel data structure the monitor channel is used for the transfer of maintenance information between two functional blocks. by use of two monitor control bits (mr and mx) per direction, the data are transferred in a complete handshake procedure. the messages transmitted in the monitor channel may have different kinds of data structures. therefore, the first byte of the message is used to indicate the structure of the following data. messages to and from the sicofi-2 are started with the following byte: thus providing information for two analog lines, the sicofi-2 is one device on one iom-2 channel. monitor data for a specific analog channel is selected by the sicofi-2 specific command following. for more details on iom-2 monitor channel data structure, and an iom-2 specific identification command see appendix b . ts2 ts1 iom-2 operating mode n n iom-2, dcl = 512 khz 0 0 iom-2, dcl = 4096 khz, time slot 0 n 0 iom-2, dcl = 4096 khz, time slot 1 0 p iom-2, dcl = 4096 khz, time slot 2 n p iom-2, dcl = 4096 khz, time slot 3 p 0 iom-2, dcl = 4096 khz, time slot 4 0 n iom-2, dcl = 4096 khz, time slot 5 p p iom-2, dcl = 4096 khz, time slot 6 p n iom-2, dcl = 4096 khz, time slot 7 0 0 0 0 0 0 1 1 6 5 4 3 2 1 0 7 bit
peb 2260 pef 2260 semiconductor group 74 programming a message oriented byte transfer is used, due to the fact that the sicofi-2 needs extended control information. with the appropriate commands, data can be written to the sicofi-2 or read from the sicofi-2 via the sld or via the iom-2 interface monitor channel. data transfer to the sicofi-2 starts with a write command, followed by up to 8 bytes of data. the sicofi-2 responds to a read command with the requested information, that is up to 8 bytes of data. ( see programming procedure ). the same command structure is used both in sld and iom-2 interface mode. if the sicofi- 2 is operating in iom-2 interface mode, any new command sequence starts with a sicofi-2 specific address-byte. the following command is the same in sld and iom-2 mode. if the command requests an answer, in sld mode the sicofi-2 will start immediately (next transmission period) with the requested data. in iom-2 mode the sicofi-2 specific address byte will be sent first, followed by the requested data. attention: in iom-2 mode, each byte on the monitor channel, is sent twice at least. example for a programming sequence in sld and iom-2 interface mode: sld interface iom-2 interface receive transmit receive transmit address cr2 cr1 address sop-write cr2 cr1 sop-read cr2 cr1 sop-write cr2 cr1 sop-read
peb 2260 pef 2260 semiconductor group 75 control bytes the 8-bit control bytes consist of either commands, status information or data. there are three different classes of sicofi-2 commands: nop no operation: no status modification or data exchange sop status operation: sicofi-2 status setting/monitoring cop coefficient operation: filter coefficient setting/monitoring the class of command is selected by bit 3 and 2 of the control byte as shown below. due to the extended sicofi-2 feature control facilities, sop and cop commands contain additional information for programming and verifying the sicofi-2. programmable devices 3 configuration registers per channel: cr1, cr2, cr3 1 coefficient ram per channel: cram 1 common configuration register: cr4 is only available in iom-2 mode the contents of cr4 is valid for both channels to obtain more clarity, bit fields containing different informations for sld and iom-2 interface are high lighted in subsequent chapters. 1 1 0 1 x 0 nop sop cop x don't care 6 5 4 3 2 1 0 7 bit
peb 2260 pef 2260 semiconductor group 76 nop command if no status modification of the sicofi-2 is required, a no operation byte nop may be transferred. nop receive, not useful in iom-2 interface mode nop transmit, only available in sld interface mode pda pda = 1 if channel a is in power-down mode pda = 0 if channel a is in power-up mode pdb pdb = 1 if channel b is in power-down mode pdb = 0 if channel b is in power-up mode version four bit sicofi-2 version identification version = 1111 for peb2260 v1.x, v2.0 x x x 1 1 x x x 6 5 4 3 2 1 0 7 bit 1 pda pdb version 1 6 5 4 3 2 1 0 7 bit
peb 2260 pef 2260 semiconductor group 77 sop command to modify or evaluate the sicofi-2 status, the contents of up to three (four) configuration registers cr1, cr2, cr3 (and cr4) may be transferred to or from the sicofi-2. this is done by a sop-command (status operation command). in sld interface mode three configuration registers per channel are accessible. if the sicofi-2 is operating with iom-2 interface an additional fourth configuration register (cr4) can be written or read. ad address information ad = 0 channel a is addressed with this command ad = 1 channel b is addressed with this command r/w read/write information: enables reading from the sicofi-2 or writing information to the sicofi-2. r/w = 0 write to sicofi-2 r/w = 1 read from sicofi-2 pu power up/power down pu = 1 sets the assigned channel (see bit ad) of sicofi-2 to power-up mode (operating) pu = 0 resets the assigned channel of sicofi-2 to power-down (standby mode) rst reset sicofi-2 rst = 1 forces sicofi-2 to enter the basic setting mode ( see operating modes ). lsel length select information ( see also programming procedure ) this two bit field identifies the number of subsequent data bytes lsel = 0 0 no byte following lsel = 1 1 cr1 is following lsel = 1 0 cr2 and cr1 are following t lsel = 0 1 cr3, cr2 and cr1 are following in sld interface mode t cr4 *) , cr3, cr2, cr1 are following in iom-2 interface mode r/w pu rst 0 1 ad 6 5 4 3 2 1 0 7 bit ls el *) commands concerning cr4 are independent of bit ad in sop command.
peb 2260 pef 2260 semiconductor group 78 cr1 configuration register 1 configuration register cr1 defines the basic sicofi-2 settings, which are: enabling/disabling the programmable digital filters, programming of signaling pins, and selection of the pcm companding characteristics. b enable b - filter b = 0 b - filter disabled, h(b) = 0 b = 1 b - filter enabled z enable z - filter z = 0 z - filter disabled, h(z) = 0 z = 1 z - filter enabled x enable x - filter x = 0 x - filter disabled, h(x) = 1 x = 1 x - filter enabled r enable r - filter r = 0 r - filter disabled, h(r) = 1 r = 1 r - filter enabled gr enable gr - filter gr = 0 gr - filter disabled, h(gr) = 1 gr = 1 gr - filter enabled gx enable gx - filter gx = 0 gx - filter disabled, h(gx) = 1 gx = 1 gx - filter enabled sb/ c3a sld interface mode: program bidirectional signaling pin sba or sbb t sb = 0 programmable signaling pin sbx is input t sb = 1 programmable signaling pin sbx is output sb /c3a iom-2 interface mode: operation mode of pin c3a *) t c3a = 0 pin c3a is programmed as command output t c3a = 1 pin c3a is detector select output ( see cr4 ) law pcm - law selection law = 0 a - law law = 1 m - law ( m 255 pcm) z x r gx gr b 6 5 4 3 2 1 0 7 bit sb/c3a law *) setting bit c3a to '1' for either channel forces pin c3a to be detector select output.
peb 2260 pef 2260 semiconductor group 79 cr2 configuration register 2 configuration register cr2 sets analog gain control and enables two on-chip tone- generators. in iom-2 operating mode two bidirectional command/indication pins are controlled. agr analog gain control receive-path agr = 0 0 0 db agr = 0 1 6 db attenuation agr = 1 0 11.95 db attenuation agr = 1 1 13.9 db attenuation agx analog gain control transmit-path agx = 0 0 0 db agx = 0 1 6 db amplification agx = 1 0 11.95 db amplification agx = 1 1 13.9 db amplification tg2 enable on chip tone generation 2 with the r-filter disabled a 1 khz, C 6 dbm0 sinusoidal signal is fed to the input of the receive lowpass filter lp. frequency and gain can be set, by programming the r and gr-filter. tg2 = 0 on chip tone generator 2 disabled tg2 = 1 on chip tone generator 2 enabled tg1 enable on chip tone generation 1 with the r-filter disabled a 2 khz, C 6 dbm0 sinusoidal signal is fed to the input of the receive lowpass filter lp. frequency and gain can be set, by programming the r and gr-filter. tg1 = 0 on chip tone generator 1 disabled tg1 = 1 on chip tone generator 1 enabled 0/ ci1 sld interface mode: this bit is reserved for future use and has to be set to '0' 0 /ci1 iom-2 interface mode: command/indication pin ci1a or ci1b t ci1 = 0 programmable signaling pin ci1x is indication input t ci1 = 1 programmable signaling pin ci1x is command output 0/ ci2 sld interface mode: this bit is reserved for future use and has to be set to '0' 0 /ci2 iom-2 interface mode: command/indication pin ci2a or ci2b t ci1 = 0 programmable signaling pin ci2x is indication input t ci1 = 1 programmable signaling pin ci2x is command output agx tg2 tg1 agr 6 5 4 3 2 1 0 7 bit 0/ci1 o/ci2
peb 2260 pef 2260 semiconductor group 80 cr3 configuration register 3 this register is for accessing testmodes only swp swap channels 1) swp = 0 vouta and vina are assigned to sld/iom-2 channel a voutb and vinb are assigned to sld/iom-2 channel b swp = 1 vouta and vina are assigned to sld/iom-2 channel b voutb and vinb are assigned to sld/iom-2 channel a dhp disable transmit highpass dhp = 0 highpass enabled dhp = 1 highpass disabled cor cut off receive path (analog voice output vouta or voutb is set to '0') cor = 0 receivepath enabled cor = 1 analog voice output is set to '0' dts disable transmit signaling 1) dts = 0 transmission of signaling/indication data (on sip/du) is enabled dts = 1 transmission of signaling/indication data (on sip/du) is disabled. sip/du is in high impedance state. alb analog loop back 2) alb = 0 0 no analog loop back established alb = 0 1 analog loop back via z-filter. h(z) = 1 if z-filter is disabled alb = 1 1 far analog loop back (via 8 khz, 16 bit linear) dlb digital loop back dlb = 0 0 no digital loop back established dlb = 0 1 digital loop back via pcm-register (via 8 khz, pcm) dlb = 1 0 digital loop back via b-filter (via 16 khz), h(b) = 1 if b-filter is disabled dlb = 1 1 digital loop back via analog port (vin = vout) dhp cor dts alb dlb swp 6 5 4 3 2 1 0 7 bit 1) setting bits swp, dts to '1' for either channel enables the function. 2) all other codes are reserved for future use.
peb 2260 pef 2260 semiconductor group 81 cr4 configuration register 4 (available in iom ? -2 interface mode only) register cr4 configures the data-upstream command/indication channel. the content of cr4 is valid for both channels a and b. upstream update interval n to restrict the rate of upstream c/i-bit changes, persistance checking of the status information from the slic may be applied. new status information will be transmitted upstream, after it has been stable for n milliseconds. n is programmable in the range of 1 to 15 ms in steps of 1 ms, with n = 0 the persistance checking is disabled. n t 6 5 4 3 2 1 0 7 bit field n update interval time 0 persistance checking is disabled 0 upstream transmission after 1 ms 0 upstream transmission after 2 ms . . . . 1 upstream transmission after 14 ms 1 upstream transmission after 15 ms 0 0 0 . . 1 1 0 0 1 . . 1 1 0 1 0 . . 0 1
peb 2260 pef 2260 semiconductor group 82 detector select sampling interval t slics with multiplexed loop- and ground-key-status, which have a single status output pin for carrying the loop- and ground-key-status information, need a special detector select input . *) 1 2 3 c/i i1a ci2a c3a 6 5 4 i1b *) ci2b programmable t slic detector select control sicofi -2 slic-a slic-b its02453 - indication upstream *) connection available with 512-khz iom -2 interface only loop/gnd key input from slic loop/gnd key input from slic r r
peb 2260 pef 2260 semiconductor group 83 sicofi-2 pin c3a can be programmed as detector select output in cr1. this command output pin is normally set to logical '0', such that the slic outputs loop status, which is passed to c/i-bits 1 and 4 via indication pins i1a and i1b. every t microseconds, the detector select output changes to logical '1' for a time of 15.63 m s. during this time the ground key status is read from the slic and transferred upstream using c/i-bits 2 and 5 via indication pins i1a and i1b. the time interval t is programmable from 250 m s to 1.875 ms in 125 m s steps. it is possible to program the output to be permanently logical '0' or '1'. field t time interval t between detector select high states 0 detector select output c3a is programmed to '0' permanently 0 time interval t is 250 m s 0 time interval t is 375 m s . . . . 1 time interval t is 1.875 ms 1 detector select output c3a is programmed to '1' permanently 0 0 0 . . 1 1 0 0 1 . . 1 1 0 1 0 . . 0 1
peb 2260 pef 2260 semiconductor group 84 cop command with a cop command coefficients for the programmable filters can be written to the sicofi-2 coefficient ram or transmitted on the sld or iom-2 interface for verification ad address information ad = 0 channel a is addressed with this command ad = 1 channel b is addressed with this command r/w read/write information this bit indicates whether filter coefficients are written to the sicofi-2 or read from the sicofi-2. r/w = 0 write to sicofi-2 r/w = 1 read from sicofi-2 all other codes are reserved for future use. r/w code ad 6 5 4 3 2 1 0 7 bit code 000011 b-filter coefficients part 1 001011 b-filter coefficients part 2 010011 z-filter coefficients 011000 b-filter delay coefficients 100011 x-filter coefficients 101011 r-filter coefficients 110000 gx-filter coefficients (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 4 bytes of data) (followed by 8 bytes of data) (followed by 8 bytes of data) (followed by 4 bytes of data) *) 111010 gr-filter coefficients (followed by 2 bytes of data) *) *) in the range of 0 to 8 db (0 to C 8 db) gain adjustment is possible in steps 0.25 db
peb 2260 pef 2260 semiconductor group 85 slic interface the connection between sicofi-2 and a slic is performed by the sicofi-2 signaling and command/indication pins. in sld interface mode, the receive signaling byte is transferred to the signaling output pins. data present at signaling input pins are transferred to the transmit signaling byte. operating the sicofi-2 with iom-2 interface, data received from the downstream c/i byte are transferred to command output pins (c, c/i). data on input pins (i, c/i) are transferred to the upstream c/ i-byte. sld interface signaling byte the sicofi-2 offers a 7 pin parallel signaling interface per channel. channel a: si1a, si2a, si3a signaling input pins so1a, so2a, so3a signaling output pins sba programmable bidirectional signaling pin. channel b: si1b, si2b, si3b signaling input pins so1b, so2b, so3b signaling output pins sbb programmable bidirectional signaling pin. data present at si1a ... si3b and sba, sbb (if programmed as input) are sampled and transferred to the sld bus. data received from the sld bus are latched and fed to so1a ... so3b and sba, sbb (if programmed as output). signaling byte format in receive direction: signaling byte format in transmit direction: so3b so2b so1b sba 1) so3a so2a so1a sbb 1) 6 5 4 3 2 1 0 7 bit si3b si2b si1b sba 2) si3a si2a si1a sbb 2) 6 5 4 3 2 1 0 7 bit 1) don't care, if pin programmed as input ( see cr1 ). 2) '0', if pin programmed as output ( see cr1 ).
peb 2260 pef 2260 semiconductor group 86 the four possible cases of the signaling byte format are listed below. case 1: sba and sbb are programmed as signaling outputs case 2: sba is programmed as output, sbb is programmed as signaling input case 3: sbb is programmed as output, sba is programmed as signaling input case 4: sba and sbb are programmed as signaling inputs iom ? -2 interface command/indication byte the sicofi-2 offers a 11 pin parallel command/indication slic interface indication input pins: i1a (associated with channel a) i1b (associated with channel b) command output pins: c1a, c2a (associated with channel a) c1b, c2b (associated with channel b) c3a programmable command/indication pins: ci1a, ci2a (associated with channel a) ci1b, ci2b (associated with channel b) data present at i1a, i1b and ci1a ... ci2b (if programmed as input) are sampled and transferred upstream. data received downstream from iom-2 interface are latched and fed to c1a ... c2b and ci1a ... ci2b (if programmed as output). case receive signaling byte 1 7 6 5 4 3 2 1 0 sbb so3b so2b so1b sba so3a so2a so1a 2 x so3b so2b so1b sba so3a so2a so1a 3 sbb so3b so2b so1b x so3a so2a so1a 4 x so3b so2b so1b x so3a so2a so1a case transmit signaling byte 1 7 6 5 4 3 2 1 0 0 si3b si2b si1b 0 si3a si2a si1a 2 sbb si3b si2b si1b 0 si3a si2a si1a 3 0 si3b si2b si1b sba si3a si2a si1a 4 sbb si3b si2b si1b sba si3a si2a si1a x ... don't care
peb 2260 pef 2260 semiconductor group 87 data-downstream c/i channel byte format (receive): in data-downstream direction, the 6 bit c/i field is split into an address bit and a 5 bit data-word. depending on the adr bit, data are transmitted to pins associated to channel a or channel b, and to pin c3a in either case. data-upstream c/i channel byte format (transmit): in data-upstream direction, the 6 bit c/i field is partioned in two 3 bit fields. the three bits c/i 1 ... 3 and 4 ... 6 contain the command/indication data associated with an analogue channel. typical examples for the c/i byte are listed below. case 1: ci2a/b and ci1a/b are programmed as command outputs case 2: ci2a/b is programmed as output, ci1a/b is programmed as indication input case 3: ci2a/b is programmed as input, ci1a/b is programmed as command output case 4: ci2a/b and ci1a/b are programmed as indication inputs c3a 2) ci2a/b 1) ci1a/b 1) c2a/b c1a/b adr 5 4 3 2 1 6 bit ci1b 3) i1b ci2a 3) ci1a 3) i1a ci2b 3) 5 4 3 2 1 6 bit case data-downstream (receive) byte 1 6 5 4 3 2 1 adr c3a ci2a/b 4) ci1a/b 4) c2a/b 4) c1a/b 4) 2 adr c3a ci2a/b 4) x c2a/b 4) c1a/b 4) 3 adr c3a x ci1a/b 4) c2a/b 4) c1a/b 4) 4 adr c3a x x c2a/b 4) c1a/b 4) x ... don't care case data-upstream (transmit) byte 1 6 5 4 3 2 1 1 1 i1b 1 1 i1a 2 1 ci1b i1b 1 ci1a i1a 3 ci2b 1 i1b ci2a 1 i1a 4 ci2b ci1b i1b ci2a ci1a i1a 1) don't care, if pin programmed as input ( see cr2 ) 2) don't care, if pin c3a is programmed as detector select output ( see cr1 ) 3) '0', if pin programmed as output ( see cr2 ) 4) a for adr = 0, b for adr = 1
peb 2260 pef 2260 semiconductor group 88 sld interface programming procedure the following table shows typical control byte sequences. if the sicofi-2 has to be configured completely during initialization, up to 60 bytes will be transferred. dir db1 ... db8 coefficient data byte 1 ... 8 x don't care itd02445 receive transmit receive transmit receive transmit receive transmit receive transmit receive dir no operation nop nop nop nop nop nop nop nop nop nop sop write nop sop nop sop cr1 nop nop sop cr2 nop cr1 nop nop sop cr3 nop cr2 nop cr1 nop lsel = 00 lsel = 11 lsel = 10 lsel = 01 sop read nop sop cr1 sop cr2 sop x cr1 cr3 sop x cr2 x cr1 lsel = 00 lsel = 11 lsel = 10 lsel = 01 cop write nop cop db4 nop db3 nop db2 nop db1 nop nop cop db8 nop db7 nop db1 nop 4 bytes 8 bytes cop read db4 cop x db3 db1 x cr2 x cr1 db8 cop x db7 db1 x cr2 x cr1 4 bytes 8 bytes
peb 2260 pef 2260 semiconductor group 89 iom ? -2 interface programming procedure example for a typical iom-2 interface programming procedure, consisting of identification request and answer, a sop write command with four byte following, and sop read to verify the programming. frame monitor mr/mx monitor mr/mx data down data up 11111111 idrqt.1 st byte idrqt.1 st byte idrqt.2 nd byte idrqt.2 nd byte 11111111 11111111 11111111 11111111 11111111 11111111 address address sop write sop write cr4 cr4 cr3 cr3 cr2 cr2 cr1 cr1 sop read sop read 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11 10 10 11 10 11 11 01 01 11 01 10 10 11 10 11 10 11 10 11 10 11 10 11 10 11 11 01 01 11 01 11 01 11 01 11 01 11111111 11111111 11111111 11111111 11111111 11111111 idans.1 st byte idans.1 st byte idans.2 nd byte idans.2 nd byte 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 address address cr4 cr4 cr3 cr3 cr2 cr2 cr1 cr1 11111111 11 11 01 01 11 01 10 10 11 10 11 11 01 01 11 01 11 01 11 01 11 01 11 01 11 01 10 10 11 10 11 10 11 10 11 10 11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 idrqt ... identification request (80 h , 00 h ) idans ... answer to identification request (80 h , 80 h ) address ... sicofi-2 specific address byte (81 h ) crx ... data for/of configuration register x.
peb 2260 pef 2260 semiconductor group 90 operating modes basic setting mode upon initial application of v dd or resetting pin rs to '1' during operation, or by software-reset ( see sop command ), the sicofi-2 enters a basic setting mode. basic setting means, that the sicofi-2 configuration registers cr1 ... cr4 are initialized to '0' for both channel a and b. all programmable filters are disabled, a-law is chosen, all programmable signaling or command/indication pins are inputs. analog gains are set to 0 db amplification or attenuation respectively. the two tone-generators as well as any testmodes are disabled. there is no persistance checking and pin c3a is programmed command output if iom-2 mode is selected. receive signaling registers are cleared. sip/du is in high impedance state, the two analog outputs vouta and voutb and the receive signaling outputs are forced to ground. the serial sld or iom-2 interface is ready to receive commands, starting with the next 8 khz frame. in sld interface mode the serial interface port sip remains in high impedance state, until reception of a valid sop or cop command. if any voltage is applied to any input-pin before initial application of v dd , the sicofi-2 may not enter the basic setting mode. in this case it is necessary to reset the sicofi-2 or to initialize the sicofi-2 configuration registers to '0'. standby mode the sicofi-2 is forced to standby mode with a power-down command by the 1 st sop-byte. both channels a and b must be programmed separately. during standby mode the serial sicofi-2 interface is ready to receive and transmit commands and data. operating mode the operating mode for any of the two channels is entered upon recognition of a power-up bit '1' in a sop command for the specific channel.
peb 2260 pef 2260 semiconductor group 91 transmission characteristics the target figures in this specification are based on the subscriber-line board requirements. the proper adjustment of the programmable filters (transhybrid balancing, impedance matching, frequency-response correction) needs a complete knowledge of the sicofi-2's analog environment. unless otherwise stated, the transmission characteristics are guaranteed within the test condition below. t a = 0 to 70 c (peb 2260); t a = -40 to 85 c (pef 2260) ; v dd = 5 v 5%; v ss = C 5 v 5 %; gnda = gndb = gndd = 0 v r l > 10 k w ; c l < 50 pf; h(z) = h(b) = 0; h(x) = h(r) = 1; gx = 0 to 8 db; gr = 0 to C 8 db; agx = 0, 6.00, 11.95, 13.90 db; agr = 0, C 6.00, C 11.95, C 13.90 db; f = 1000 hz; 0 dbm0; a-law or m -law; a 0 dbm0 signal is equivalent to 1.5763 [1.5710] vrms. a 3.14 [3.17] dbm0 signal is equivalent to 2.263 vrms which corresponds to the overload point of 3.2 v (a-law, [ m -law]). unit limit values parameter symbol min. typ. max. db total harmonic distortion, 0dbm0, f = 1000 hz; 2 nd , 3 rd order thd C50 C44 db db crosstalk 0dbm0, f = 300 hz to 3400 hz transmit to receive receive to transmit ct xr ct rx C85 C85 C80 C80 dbm0p dbrnc dbm0p dbrnc idle channel noise, transmit, a-law, psophometric v in =0v transmit, m -law, c-message v in =0v receive, a-law, psophometric idle code + 0 receive, m -law, c-message idle code + 0 n tp n tc n rp n rc C85 5 C67.4 17.5 C78.0 12.0 db db gain (either value) 1) gain absolute (agr = agx = 0) t a = 25 c, v dd = 5 v, v ss = C 5 v t a = 0C70c, v dd = 5 v 5%, v ss = C 5 v 5% g C0.20 C0.30 0.06 0.20 0.30 db db intermodulation 2 f 1C f 2 2) 2 f 1C f 2 3) imd C42 C56 db gain absolute (agr = 0 to 13.9o db, agx = 0 to 13.90 db) t a = 0C70c, v dd = 5 v 5%, v ss = C 5 v 5% g C 0.40 0.40 1) r l =300 w causes an additional attenuation in the range between C 0.1 to 0 db. 2) equal input levels in the range between C 4 dbm0 and C 21 dbm0; different frequencies in the range between 300 hz and 3400 hz. 3) input level C 9 dbm0, frequency range 300 hz to 3400 hz and C 23 dbm0, 50 hz.
peb 2260 pef 2260 semiconductor group 92 attenuation distortion attenuation deviations stay within the limits in the figures below. receive: reference frequency 1 khz, input signal level 0 dbm0 transmit: reference frequency 1 khz, input signal level 0 dbm0 itd00637 -1.0 -0.5 0 0.5 1.0 1.5 2.0 db 5678910 2 3 4 56789 2 khz 4 -1 10 0 0.650 0.125 -0.125 3.4 attenuation f itd00638 -1.0 -0.5 0 0.5 1.0 1.5 2.0 db 5678910 2 3 4 5678910 2 4 -1 0 3.4 0.650 -0.125 0.125 attenuation f khz
peb 2260 pef 2260 semiconductor group 93 group delay maximum delays for operating the sicofi-2 with h(b) = h(z) = 0 and h(r) = h(x) = 1 including delay through a/d- and d/a converters. specific filter programming may cause additional group delays. group delay deviations stay within the limits in the figures below. group delay absolute values: input signal level 0 dbm0 group delay distortion: input signal level 0 dbm0, reference frequency = 1.4 khz unit limit values parameter symbol min. typ. max. m s transmit delay d xa 300 m s receive delay d ra 240 test condition f = 1.4 khz f = 300 hz itd00639 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 100 200 300 400 500 m s khz t f 250 70 0.7 2.8 3.1
peb 2260 pef 2260 semiconductor group 94 out-of-band signals at analog input with an out-of-band sine wave signal with frequency f and level a applied to the analog input, the level of any resulting frequency component at the digital output will stay at least x db below level a. out-of-band signals at analog output with a 0 dbm0 sine wave of frequency f applied to the digital input, the level of any resulting out-of-band signal at the analog output will stay at least x db below a 0 dbm0, 1 khz sine wave reference signal at the analog output. itd00640 -18 10 -2 0 10 -1 1 10 2 5 5 5 khz 10 f -12 -6 db 61018 attenuation itd00641 0 10 -2 db 10 -1 1 10 2 5 5 5 khz 10 f 10 20 30 40 0.06 4.6 attenuation itd00642 0 10 -2 10 20 30 40 50 db 10 -1 1 10 2 5 5 5 khz 10 f 15 4.6 attenuation
peb 2260 pef 2260 semiconductor group 95 gain tracking (receive and transmit) the gain deviations stay within the limits in the figures below gain tracking: measured with noise signal according to ccitt recommendations, reference level is C 10 dbm0, agx = agr = 0 gain tracking: measured with sine wave in the range 700 to 1100 hz, reference level is C 10 dbm0, agx = agr = 0 itd00643 -70 -60 -50 -40 -30 -20 -10 0 10 -1.0 -0.5 0 0.5 1.0 -55 -35 dbm0 0.4 0.25 0.2 0.2 0.25 0.4 db input level g d itd00644 -70 -2 -60 -50 -40 -30 -20 -10 0 10 -1 0 1 2 db -1.4 -0.5 -0.2 0.2 0.5 1.4 0.25 -0.25 d g input level 3 -55 dbm0
peb 2260 pef 2260 semiconductor group 96 total distortion the signal-to-distortion ratio exceeds the limits in the following figures. receive: measured with noise signal according to ccitt recommendations transmit: measured with noise signal according to ccitt recommendations itd00645 -60 -50 -40 -30 -20 -10 0 10 20 30 40 -55 -34 -27 -6 -3 -24 36.0 34.3 29.7 14.7 36.7 28.4 dbm0 db input level s/d 0 itd00646 -60 -50 -40 -30 -20 -10 0 10 20 30 40 -55 -34 -27 -6 -3 -24 35.4 33.3 28.7 13.7 36.3 27.4 dbm0 db input level s/d 0
peb 2260 pef 2260 semiconductor group 97 the signal to distortion ratio exceeds the limits in the following figure. receive & transmit: measured with sine wave in the range 700 to 1100 hz excluding submultiples of 8 khz transhybrid loss the quality of transhybrid-balancing is very sensitive to deviations in gain and group delay C deviations inherent to the sicofi-2 a/d- and d/a-converters as well as to all external components used on a line card (slic, op's etc.) the sicofi-2 transhybrid loss is measured the following way: a sine wave signal with level 0 dbm0 and a frequency in the range of 300 C 3400 hz is applied to the digital input. the resulting analog output signal at pin vout is directly connected to vin, e.g. with the sicofi- 2 testmode "digital loop back via analog port" ( see cr3 ). the programmable filters r, gr, x, gx and z are disabled, the balancing filter b is enabled with coefficients optimized for this configuration (vout = vin). the resulting echo measured at the digital output is at least x db below the level of the digital input signal as shown in the table below. itd00647 -60 -50 -40 -30 -20 -10 0 10 20 30 40 35.5 dbm0 db input level s/d -45 31.0 27.0 24.5 36.4 29.5 -28 m - law a - law 0 parameter total distortion digital loop back via b-filter or digital loop back via analog port input level min. unit unit 0 C30 C40 C45 31 31 25 20 dbm0 dbm0 dbm0 dbm0 db db db db
peb 2260 pef 2260 semiconductor group 98 b-filter coefficients recommended for transhybrid loss measurement with vout = vin cop-write coefficients (03)/(83) (0b)/(8b) (18)/(98) b-filter part 1 b-filter part 2 b-filter delay fd 29 fb 38 a1 a0 3c 42 00 af 62 2b cf d1 ca a4 19 19 11 19 unit limit values parameter symbol min. typ. db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 33 29 27 45 40 35 test condition t a =25c; v dd =5v, v ss =C5v; agr = agx = 0 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 29 27 25 40 35 30 t a = 0 to 70 c; v dd =5v 5%; v ss =C5v 5%; agr = agx = 0 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 27 25 23 40 35 30 t a = 0 to 70 c; v dd =5v 5%; v ss =C5v 5%; agr = agx = 6.03, 12.06, 14.00 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 29 17 15 40 25 20 t a = 0 to 85 c; v dd =5v 5%; v ss =C5v 5%; agr = agx = 0 db db db db transhybrid loss at 500 hz transhybrid loss at 2500 hz transhybrid loss at 3000 hz thl 500 thl 2500 thl 3000 27 15 13 40 25 20 t a = 0 to 85 c; v dd =5v 5%; v ss =C5v 5%; agr = agx = 6.03,12.06, 14.00 db
peb 2260 pef 2260 semiconductor group 99 absolute maximum ratings unit limit values parameter symbol min. max. v v dd referred to gndd C0.3 5.5 v gnda to gndd C 0.6 0.6 v v analog input and output voltage referred to v dd = 5 v; v ss = C5v referred to v ss = C5v; v dd = 5 v v in v in C10.3 C0.3 0.3 10.3 v v ss referred to gndd C 5.5 0.3 v v all digital input voltages referred to gndd = 0 v; v dd = 5 v referred to v dd = 5 v; gndd = 0 v v in v in C0.3 C5.3 5.3 0.3 ma dc input and output current at any input or output pin i dc 10 c storage temperature t stg C60 125 w power dissipation p d 1 c ambient temperature under bias t a C10 80
peb 2260 pef 2260 semiconductor group 100 operating range t a = 0 to 70 c; v dd = 5 v 5%; v ss = C 5 v 5 %; gndd = 0 v; gnda = 0 v unit limit values parameter symbol min. typ. max. ma ma v dd supply current standby operating i dd 0.5 22 0.8 28 test condition ma ma v ss supply current standby operating i ss 0.05 12 0.08 18 db power supply rejection (of either supply/direction) psrr 30 1khz 80 mvrms ripple mw mw mw power dissipation standby power dissipation operating power dissipation operating p ds p do1 p do2 2.75 110 170 4.4 150 230 1 channel 2 channels ma ma v dd supply current standby operating i dd 0.6/0.65 26/28 0.95/1.1 34/37 -25 o c/-40 o c -25 o c/-40 o c ma ma v ss supply current standby operating i ss 0.06/0.065 14/16 0.08 18 db power supply rejection (of either supply/direction) psrr 30 1khz 80 mvrms ripple mw mw mw power dissipation standby power dissipation operating power dissipation operating p ds p do1 p do2 3.3/3.6 132/143 200/220 5.2/6.1 180/195 280/305 1 channel 2 channels t a = 0 to 85 c; v dd = 5 v 5%; v ss = C 5 v 5 %; gndd = 0 v; gnda = 0 v
peb 2260 pef 2260 semiconductor group 101 electrical characteristics digital interface t a = 0 to 70 c (peb 2260) ; t a = -40 to 85 c (pef 2260); v dd = 5 v 5%; v ss = C 5 v 5 %; gndd = 0 v; gnda = 0 v analog interface t a = 0 to 70 c (peb 2260) ; t a = -40 to 85 c (pef 2260); v dd = 5 v 5%; v ss = C 5 v 5 %; gndd = 0 v; gnda = 0 v reset timing to reset the sicofi-2 to basic setting mode, positive pulses applied to pin rs have to be longer than 2 t sclk for sld interface mode, or 2 t dcl for iom-2 interface mode. the sicofi- 2 is resetted, if a clock is applied at pin 21 (sclk/dcl). spikes shorter than t sclk ( t -dcl ) will be ignored. unit limit values parameter symbol min. max. v l-input voltage v il C0.3 0.8 test condition v h-input voltage v ih 2.0 v l-output voltage v ol 0.45 i 0 =C2ma v h-output voltage v oh 2.4 i 0 =400 m a m a input leakage current i il 1 C0.3 v in v dd v negative-input voltage v in C3.5 unit limit values parameter symbol min. max. m w analog input resistance r i 10 test condition w analog output resistance r o 10 mv input offset voltage v io 50 mv output offset voltage v oo 50 v input voltage range v ir 3.2 v output voltage range v or 3.1 r l 3 300 w , c l 50 pf
peb 2260 pef 2260 semiconductor group 102 sip interface timing (sld) switching characteristics itt00649 t sclk t dirxs t dirxh t dir t sclk t dinxs t dinxh t dout 2 sclk t 2 high imp. sclk dir sip data in sip data out 90% 10% t ddhz unit limit values parameter symbol min. typ. max. period sclk *) t sclk 1/512 khz % sclk duty cycle 20 50 80 m s period dir *) t dir 125 ns dir setup time t dir s 40 t sclkh ns dir hold time t dir h 250 ns sip data in setup time t din s 20 ns sip data in hold time t din h 100 ns sip data out delay t ddout 150 250 ns sip data out high impedance delay t ddhz 50 70 *) t dir = 64 t sclk
peb 2260 pef 2260 semiconductor group 103 signaling interface timing (sld) switching characteristics itd02446 t dsig t dsigz t sig t sig out inxs inxh last control bit out first signaling bit out last control bit in last signaling bit in sclk sip data in sip data in sip data in sig out sig out sig in 10% 90% unit limit values parameter symbol min. typ. max. ns delay signaling out t dsigout 250 350 ns sig in setup time t sigin s 50 ns sig in hold time t sigin h 100 ns delay signaling active t dsiga 150 200 ns delay signaling high impedance t dsigz 150 200 1) pins so1 so3; pins sa sd as output 2) pins si1 si3; pins sa sd as input 3) for programmable signaling pins sba/sbb
peb 2260 pef 2260 semiconductor group 104 iom ? -2 interface timing switching characteristics itd03389 t dcl t dclh t fsc_s t fsc_h t fsc tt dd_h t ddu t dduhz dd_s high imp. dcl fsc dd du 10% 90% unit limit values parameter symbol min. typ. max. period dcl 'slow' mode 1) t dcl 1/512 khz % dcl duty cycle 40 60 m s period fsc 1) t fsc 125 ns fsc setup time t fsc s 70 t dclh ns fsc hold time t fsc h 40 ns dd data in setup time t dd s 20 ns dd data in hold time t dd h 50 ns du data out delay t ddu 150 2) 250 period dcl 'fast' mode 1) t dcl 1/4096 khz 1 ) iom-2 interface mode, dcl = 512 khz: t fsc =64 t dcl iom-2 interface mode, dcl = 4096 khz: t fsc = 512 t dcl 2 ) depending on pull up resistor (typical 10 k w )
peb 2260 pef 2260 semiconductor group 105 iom ? -2 command/indication interface timing switching characteristics itt02454 10% 90% t lin t lin x h x s last monitor bit out first indication bit out high imp. t dca t dcz high imp. one frame later last monitor bit in old command valid new command valid t dc out mx mr last c/i bit dcl dd command out dd command out du command out ind. in unit limit values parameter symbol min. typ. max. ns command out delay t dcout 0 ns indication in setup time t lin s 50 ns indication in hold time t lin h 100 ns command out active t dca 150 200 ns command out high impedance t dcz 150 200
peb 2260 pef 2260 semiconductor group 106 detector select timing iom ? -2 interface, dcl = 512 khz (one channel per frame) iom ? -2 interface, dcl = 4096 khz (eight channels per frame) detail a switching characteristics itt02455 c3a dd/du 512 khz dcl a b monitor data c/i 6:1 t c3ads detail a c3ah t m x r mm x itt02456 t c3adf detail a abm ci dcl 4096 khz dd/du c3a itd02457 t lin t lin x h x s dcl c3a i1a/b unit limit values parameter symbol min. typ. max. m s detector select high time t c3ah 15.6 ns indication in setup time t lin s 50 ns indication in hold time t lin h 100 m s detector select delay, 'fast' mode t c3adf C46.8 m s detector select delay, 'slow' mode t c3ads 82.0
peb 2260 pef 2260 semiconductor group 107 appendix a on chip tone generation with bit tg2, tg1 in configuration register cr2 two tone generators per channel can be activated in receive direction; the r-filter output is set to '0' with any tone generator activated. each tone generator frequency and amplitude is programmable individually via r-filter coefficients. every byte sequence is started with 2b/ab depending on the channel to be programmed note: the generated tones are sinewaves with harmonic distortion < C 25 db f[hz] gain [db] 2000 0 frequency gain frequency gain f[hz] gain [db] tg1 byte sequence tg2 tg2-coefficient tg1-coefficient 2000 0 01 11 11 01 01 11 11 01 1000 0 1000 0 01 11 12 01 01 11 12 01 800 0 800 0 aa aa a1 01 aa aa a1 01 697 0 770 0 b2 ba 12 01 d3 2c a1 01 852 0 941 0 bc 13 b1 01 2b bc c1 01 1209 0 1336 0 f2 2b 21 01 fa 12 21 01 1477 0 1633 0 bc 1d 11 01 a5 c1 b0 01 2000 0 1000 0 01 11 11 01 01 11 12 01 1000 0 500 0 01 11 12 01 01 11 13 01 1000 C2.5 500 +3.5 01 11 12 11 01 11 13 10 1000 C6 500 +6 01 11 12 02 01 11 13 00 1000 C5 500 +6 01 11 12 31 01 11 13 00 1000 C4.1 500 +3.5 01 11 12 21 01 11 13 10 1000 C2.5 500 1.9 01 11 12 11 01 11 13 20 1000 C1.5 500 1 01 11 12 b0 01 11 13 30
peb 2260 pef 2260 semiconductor group 108 appendix b iom ? -2 interface monitor transfer protocol the monitor channel is used for the transfer of maintenance information between two functional blocks. by use of two monitor control bits (mr and mx) per direction, the data are transferred in a complete handshake procedure. the mr and mx bits in the fourth octet (the control channel) of the iom-2 frame are used for the handling of the monitor channel. l a pair of mr and mx in the inactive state for two or more consecutive frames indicates an idle state on the monitor channel and the end of message (eom) l a start of transmission is initiated by the transmitter with the transmission of the mx bit form the inactive state to the active state together with the first byte sent on the monitor channel. the receiver acknowledges the first byte by setting the mr bit in the other direction to active and keeping it active for at least one more frame. l the same byte is sent continuously in each frame until either a new byte is transmitted, the end of message or an abort l flow control, in the form of transmission delay, can only take place when the transmitters mx and the receivers mr bit are in active state. l any false mx or mr bit received by the receiver or transmitter leads to a request for abort or abort, respectively. l since the receiver is able to receive the monitor data at least twice (in two consecutive frames), it is able to check for data errors. if two different bytes are received the receiver will wait for the receipt of two identical successive bytes (last look function). l a collision resolution mechanism is implemented in the transmitter. this is done by looking for the idle phase of the mx-bit and making a per bit collision check on the transmitted monitor data. l any abort leads to a reset of the sicofi-2 command stack, the device is ready to receive new commands. l to obtain a maximum speed data transfer, the transmitter anticipates the falling edge of the receivers acknowledgement. l due to the inherent sld-programming structure, duplex operation is not possible.
peb 2260 pef 2260 semiconductor group 109 identification command in order to be able to unambiguously identify different devices by software, a two byte identification command is defined for analog line iom-2 devices. each device will then respond with its specific identification code. for the sicofi-2 this two byte identification code is: each byte is transferred at least twice (in two consecutive frames). 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1
peb 2260 pef 2260 semiconductor group 110 state diagram of the sicofi ? -2 monitor transmitter mr ... mr-bit received mx ... mx-bit calculated and expected on du-line mxr ... mx-bit sampled on du-line cls ... collision within the monitor data byte rqt ... request for transmission form internal source abt ... abort request/indication itd02458 idle mx = 1 mx = 0 1st byte mx = 1 nth byte ack mx = 0 wait for ack wait mx = 1 mx = 1 abort eom mx = 1 mr mr mr mr initial state cls/abt any state rqt . . rqt mr . rqt mr mr rqt . . rqt mr mr + mxr mxr mr mxr . . mxr mr mr
peb 2260 pef 2260 semiconductor group 111 state diagram of the sicofi ? -2 monitor receiver mr ... mr-bit transmitted on du-line mx ... mx-bit received data downstream ll ... last lock of monitor byte received abt ... abort indication to internal source itd02459 idle mr = 1 mr = 0 1st byte rec new byte mr = 1 abort byte valid mx mx mx mx mx initial state mr = 0 wait for ll mx mx mx mx mx abt any state nth byte rec ll . . ll mx . ll mx mx ll . . ll mx . ll mx mr = 1 wait for ll mr = 0 mr = 0 mr = 1
peb 2260 pef 2260 semiconductor group 112 sicofi ? sicofi ? , sicofi ? -2 plastic dual-in-line package, p-dip-22 approx. weight 2.1 g plastic-leaded chip carrier, p-lcc-28-r (smd) dimensions in mm smd = surface mounted device package outlines
semiconductor group 113 development support tools 1 general overview on hardware / software tools designation hardware software ordering code user boards sicofi testboard sicofi-2 module 1) stut 2060 sipb 5135 a a C C q67100-h6058 q67100-h6149 slic boards harris hc 5502/5504 harris hc 5509 stm l3000 + l3030 stm l3000 + l3090 ericsson pbl 3762 ericsson pbl 3736 transformer series feeding transformer transverse feeding stus 5502 stus 5509 stus 3030 stus 3090 stus 3762 stus 3736 stus 1000 stus 1001 a a a a a u u a a a a a a a a a q67100-h6175 q67100-h6270 q67100-h6178 q67100-h6179 q67100-h6180 q67100-h6181 q67100-h6176 q67100-h6177 s oftware s icofi coefficient a nd simulation program f or peb 2060/peb2260 sts 2060 C a related boards 1) m ain board iom-2 line card m odule pcm4 digital a daptor sipb 5000 sipb 5121 sipb 5311 a a a a 2) C C q67100-h8647 q67100-h8656 q67100-h6126 1) for the isdn pc userboard system (sipb) 2) mainboard firmware and menu software a = available u = under development
semiconductor group 114 development support tools
semiconductor group 115 development support tools 2 sicofi ? coefficients program (sts 2060) 2.1 features l coefficients program available on floppy disk for pc at or compatible l calculates the coefficients for all digital filters in sicofi peb 2060/peb 2260 (z, r, x, b, gr, gx) l menu driven program surface l graphic screen output for various slic/sicofi transfer functions l direct programming of sicofi testboard stut 2060 l slic program parts for various standard slics included l analog simulation program for modelling new user specific slics included 2.2 general overview the high flexibility of the sicofi is based on a variety of user programmable filters, which consist of analog gain adjustment agr and agx, digital gain adjustment gr and gx, frequency response adjustment r and x, impedance matching filter z and the transhybrid balancing filter b. to gain an optimum result within a given environment while observing existing prescriptions, siemens offers to the sicofi user the software packet sts 2060, which performs the calculation of the filter coefficients by using an overall optimizing approach. because of the modularity of the sicofi software program, it is possible to use the sicofi together with C transformer slics with series or transverse feeding C fixed electronic slics (boards and slic program parts are available from siemens semi- conductor) C new user specific slics the sts 2060 software runs on any ibm-at compatible pc under md-dos version 3.0 or later providing 640 kbyte available ram, a 1.2 mbyte floppy disk drive, and the math coprocessor 80287 (optional). the sts 2060 software consists of the two major sections: slic program (slic.exe) and sicofi program (sicofi.bat). a transfer file (slic.sli) provides the interface between these two programs. instead of slic.exe it is possible to use a special analog simulation program (s.bat) for modelling new user specific slics. all the specific values concerning the slic and its external circuitry (physical data, filter dimensions, ... ) are gathered in an input file slic.inp. the slic program slic.exe models the slic and its external circuitry in order to create a file slic.sli which contains their transmission characteristics. slic.sli is a transfer file (output/input file) between the slic program and the sicofi program to introduce the slic circuit data into the sicofi program. country.spe is an input file of the sicofi program describing the customer's specification (ccitt etc ... ) and measurement configuration parameters (e.g. termination impedance).
semiconductor group 116 development support tools ref.byt is an optional input file of the sicofi program. it is a reference file which defines a frame in which the program can write the calculated coefficients with some predefined com- mands. these commands are the macrocommands necessary to send the sicofi coefficients from the pbc/pic (peb 2050/52) to the sicofi (peb 2060/2260) by means of the sld-bus control byte. after a calculation the actual sicofi coefficients may be stored in an output file called e.g. user.byt. this file contains the commands from the ref.byt file together with updated coefficients. sicofi.ctl is the control file of the sicofi program. it contains the data controlling the opti- mization and simulation processes. sicofi.bat is the sicofi batch program which starts an execution program to generate the sicofi coefficients and calculate the theoretical transfer functions of the set of slic-sicofi. result.res is the output file of sicofi.bat. it contains the coefficients for programming the sicofi according to the slic used. the calculated results corresponding to various measurements to be taken on the set sicofi + slic are listed. (e.g. return loss, frequency response, echo return loss, etc.) this result file can also be used as control file of sicofi.bat. sicofi ? software structure
semiconductor group 117 development support tools 3 sicofi ? test board (stut 2060) 3.1 features l two sicofi peb 2060 and one pbc peb 2050 or pic peb 2052 onboard l sab 8031 microprocessor system l serial interface l two interfaces for connecting customer specific slic boards l adapter for connecting sicofi-2 peb 2260 included 3.2 general overview the sicofi ? test board stut 2060 is a stand alone board which offers the possibility of connecting any external customer specific slics with the sicofi for evaluation of customer specific combinations of slic and sicofi. this setup allows measurements and tests covering the transfer functions of the complete subscriber line module. the board is programmable via an rs 232 interface by a terminal or pc. the registers of the pbc or pic and sicofi can be accessed and therefore the slic can be programmed. different customer specific slics or ready designed slic boards available from siemens semiconductor may be connected to the sicofi testboard stut 2060 via a 64-pin connector. with this setup it is possible to make the following investigations: C to test the slic hardware C to verify the programmed coefficients, which are calculated with the sicofi coefficients program C to measure many different slics in a short time
semiconductor group 118 development support tools
semiconductor group 119 development support tools 4 sicofi ? -2 module (sipb 5135) 4.1 features l compatible to sipb 5000 userboard system l two interfaces for connecting customer specific slic boards l same slic connector as on the sicofi testboard stut 2060 l sicofi-2 can be operated in two different interface modes (sld or iom ? -2) 4.2 general overview the use of the siemens isdn pc development system provides significant savings in r & d time when designing a customer specific isdn application. the system consists of modular hardware in the form of the siemens isdn pc user board (sipb) and of several software packages. with the sicofi-2 peb 2260 the sicofi-2 module already provides a ready to use codec/filter and interfaces to two slics. thus this module offers the outstanding advantage of enabling immediate starting with experiments on a subscriber line board. the sicofi-2 module sipb 5135 is developed to be used in connection with the line card module sipb 5121. if at the secondary side of the line card module a pcm4 adaptor sipb 5311 is connected, a very useful development and testing tool for the analog line card is built up. using a pcm4 of wandel & goltermann the following measurements are possible: C return loss C level in a/d- and d/a-direction C gain tracking in a/d- and d/a-direction C noise in a/d- and d/a-direction C echo return loss
semiconductor group 120 development support tools measuring set up with sicofi ? -2 module
semiconductor group 121 software description sts 2060 software description sts 2060 contents page 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 2 sicofi ? software principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 3 slic program description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 3.1 program functions, m-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 3.2 input file description for harris slic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 3.3 output file description, format of the m-parameter table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 4 sicofi program description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 4.1 program functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 4.2 control file: sicofi.ctl. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 4.2.1 listing of the control file harris.ctl. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 4.3 specification file: country.spe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 4.3.1 sign convention for relative levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 4.3.2 circuit library. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 4.3.3 listing of the specification file brd.spe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 4.4 byte file: user.byt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 4.5 listing and description of the result.res file . . . . . . . . . . . . . . . . . . . . . . . 162 5 using the software packet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 5.1 installation of sicofi ? software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 5.2 sts 2060 main menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 5.3 sts 2060 slic menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 5.4 sts 2060 rs 232 menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 5.5 using sicofi ? program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 5.6 sts 2060 sicofi ? menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 6 example: how to obtain sicofii ? coefficients for a special slic application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 6.1 calculation of m-parameters for harris slic . . . . . . . . . . . . . . . . . . . . . . . . . 180 6.2 working method for calculating sicofi ? coefficients . . . . . . . . . . . . . . . . . . . . 184
semiconductor group 122 software description sts 2060 contents (contd) page 7 extended sicofi ? calculation features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 7.1 special variables in the control file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 7.2. special variables in the specification file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189 7.2.1 listing of the specification file brd1.spe with special variables . . . . . . . . . . . 190 7.2.2 format of the impedance file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191 7.3. k-parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 7.3.1 format of the k-parameter table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196 7.4 running sicofi ? calculation program in batch mode . . . . . . . . . . . . . . . . . . 197 8 measurements and specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199 8.1 measurements for verification of sicofi ? -slic transfer functions . . . . . . . . . 199 8.2 extract of slma specifications valid for the "deutsche bundespost" . . . . . . . . 203 9 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 9.1 new features in sicofi ? software version 3.0 . . . . . . . . . . . . . . . . . . . . . . . . . 206 9.2 gain tables for programming transmit gx of sicofi ? v3.x. values from + 12 db ... 0 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208 9.3 gain tables for programming receive gr of sicofi ? . values from 0 db ... C 12 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 9.4 index of the variables used in the software . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
semiconductor group 123 software description sts 2060 1 introduction how to use this manual if you are already familiar with the former sicofi software version 2.0, we suggest starting having a look at the 'new features in sicofi software version 3.0' described in the appendix 9.1. the background and some theory is described in chapters 2, 3 and 4. if you want to start straightaway with the program, begin directly with chapter 5. an example in chapter 6 explains how to obtain sicofi coefficients for a special slic application. some tricks to take advantage of all the possibilities of the program are explained in chapter 7. measurements of sicofi-slic transfer functions and some specifications are described in chapter 8. the modularity and flexibility of the software introduces a large amount of files and variables. an alphabetical index is available at the end of this document in chapter 10: 'index of the variables used in the software' an idea of how to proceed in any case is suggested by the following figure 1 .
semiconductor group 124 software description sts 2060 figure 1 general suggestions for using this manual
semiconductor group 125 software description sts 2060 the sicofi provides separate input and output ports for transmit and receive direction. transmit direction the analog input signal is a/d converted, digitally filtered and transmitted either pcm-encoded or linear. the a/d converter used is a modified slope adaptive interpolative sigma-delta mod- ulator with a sampling rate of 128 khz. to remove resulting noise, antialiasing is done with a 2nd order sallen-key prefilter (prefi). subsequently the signal is downsampled to 8 khz by decimation filters d1 and d2 together with the pcm bandpass filters (lpx, hp). receive direction the digital input signal is received pcm-encoded or linear, digitally filtered and d/a converted to generate the analog output signal. digital interpolation up to 128 khz is done by the pcm lowpass filter (lpr) and the interpolation filters i1 and i2. the d/a converter output is fed to the 2nd order sallen-key postfilter (pofi). programmable function the high flexibility of the sicofi is based on a variety of user programmable filters, which are analog gain adjustment agr and agx, digital gain adjustment gr and gx, frequency re- sponse adjustment r and x, impedance matching filter z and the transhybrid balancing filter b. to gain an optimum result within a given environment while observing existing prescriptions, siemens offers to the sicofi user the software packet sts 2060, which performs the calcu- lation of the filter coefficients by using an overall optimizing approach. because of the modularity of the sicofi software program, it is possible to use the sicofi together with C transformer slics with series or transverse feeding C fixed electronic slics ( see chapter 9.2: available sicofi / slic documentation ) C new user specific slics the sts 2060 software runs on any ibm-at compatible pc under ms-dos version 3.0 or later providing 640 kbyte available ram, a 1.2 mbyte floppy disk drive, and the math copro- cessor 80297 (optional). the purpose of the following pages is to given an overview on the sicofi software and its background. for more details on the sicofi hardware, refer to the sicofi data sheets. a list of the available sicofi software and hardware tools will be found in chapter 9.2.
semiconductor group 126 software description sts 2060 2 sicofi ? software principle the hardware can be split into two parts: slic and its external circuitry on the one hand and sicofi on the other ( see figure 2 ). figure 2 slic-sicofi ? hardware accordingly the sts 2060 software consists of two major sections: slic program and sicofi program. a transfer file (slic file) provides the interface between these two programs ( see figure 3 ). figure 3 software structure
semiconductor group 127 software description sts 2060 details of the sicofi software structure are shown in the following figure: figure 4 details of the software structure all the specific values concerning the slic and its external circuitry (physical data, filter dimensions, ... ) are gathered in an input file slic.inp. the slic program slic.exe models the slic and its external circuitry in order to create a file slic.sli which contains their transmission characteristics. slic.sli is a transfer file (output/input file) between the slic program and the sicofi program to introduce the slic circuit data into the sicofi program. country.spe is an input file of the sicofi program describing the customer's specification (ccitt etc ... ) and measurement configuration parameters (e.g. termination impedance).
semiconductor group 128 software description sts 2060 ref.byt is an optional input file of the sicofi program. it is a reference file which defines a frame in which the program can write the calculated coefficients with some predefined commands. these commands are the macrocommands necessary to send the sicofi coefficients from the peripheral board controller pbc (peb 2050) to sicofi (peb 2060) by means of the sld-bus control byte. after a calculation the actual sicofi coefficients may be stored in an output file called e.g. user.byt. this file contains the commands from the ref.byt file together with updated coefficients. sicofi.ctl is the control file of the sicofi program. it contains the data controlling the optimization and simulation processes. sicofi.bat is the sicofi batch program which starts a execution program to generate the sicofi coefficients and calculate the theoretical transfer functions of the set of slic-sicofi. result.res is the output file of sicofi.bat. it contains the coefficients for programming the sicofi according to the slic used. the calculated results corresponding to various measurements to be taken on the set sicofi + slic are listed. (e.g. return loss, frequency response, echo return loss, etc.). this result file can also be used as control file of sicofi.bat.
semiconductor group 129 software description sts 2060 3 slic program description 3.1 program functions, m-parameter the slic program slic.exe generates a model of the slic and its external circuitry to provide the sicofi program with the transfer functions of this circuit. the slic and its external circuitry are accessible through three ports as shown in figure 5 . figure 5 slic and its external circuitry as a three-port i 1 , i 2 and i 3 are port currents and v 1 , v 2 and v 3 are port voltages. this circuit can be described by the following set of equations: (1) i 1 = m11 v 1 + m12 v 3 + m13 i 2 (2) v 2 = m21 v 1 + m22 v 3 + m23 i 2 (3) i 3 = m31 v 1 + m32 v 3 + m33 i 2 note: definition of a port when the slic is connected to the sicofi, we can assume that: C i 2 = 0 because of the high sicofi input impedance. (in special cases the sicofi input impedance can be included in the three-port model.) C i 3 is not relevant in the following calculations because the sicofi works as an ideal voltage generator. (in special cases the sicofi output impedance of about 10 w may be included in the slic model.) according to the above remarks the equations can be simplified as follows: (4) i 1 = m11 v 1 + m12 v 3 (5) v 2 = m21 v 1 + m22 v 3
semiconductor group 130 software description sts 2060 the four remaining parameters m11, m12, m21, m22 fully describe the slic and its external circuitry. they are determined as follows: figure 6 definition of m-parameters m11 = i 1 / v 1 with v 3 = 0 m12 = i 1 / v 3 with v 1 = 0 m21 = v 2 / v 1 with v 3 = 0 m22 = v 2 / v 3 with v 1 = 0
semiconductor group 131 software description sts 2060 each m-parameter is then expressed in the slic program as an algebraic equation, containing a combination of the various slic parameters which are provided by the slic input file slic.inp. according to the values of the slic input data the slic program calculates the values of the m-parameters as a function of frequency and writes them to an output file slic.sli. the values of each m-parameter for frequencies between 10 hz and 3990 hz in steps of 10 hz are written into a table ( see chapter 3.3 ). slic.sli then serves for the interface between the slic program and the sicofi program. the slic program slic.exe and its source file slic.for are provided for fixed slics (see hereunder listed slic programs) and can be modified by the user to suit his peculiar application. slic programs provided on the siemens floppy disk sts 2060: harris.exe execution program of harris slic hc 5502 trafos.exe execution program of a transformer slic trafot.exe with series or transverse feeding. the following slic programs are also available on request: sgs.exe execution program of sgs slic l3030 nsgs.exe execution program of sgs slic l3090 eric.exe execution program of ericsson slic pbl 3762 the user can also develop his own slic program using any programming language. the only condition is to respect the standard format defined for the tables of slic.sli ( see chapter 3.3 ). chapter 3.2 shows an example of the slic input file for the harris slic 5502. the format of the slic program output file slic.sli is shown in chapter 3.3 .
semiconductor group 132 software description sts 2060 3.2 input file description for harris slic this description is an example of the slic input file for the harris slic hc 5502. figure 7 shows the interconnection of the harris slic and the sicofi. figure 7 connection sicofi ? -harris slic note: sicofi version v 4.x already includes a programmable attenuation (agr) in the receive path. the input file harris.inp of the harris slic program contains the following variables, which may be changed prior to a new run of the harris.exe program: variable name: vor function: indicates the voltage amplification factor between sicofi and slic in receive path value: real number ( v 1 / v 0 = r 2 / r 1 + r 2 ) if r 1 , r 2 << r ir e.g. r 1 = r 2 = 300 w variable name: rir function: input resistor of the harris slic in the receive path value: in w , e.g. r ir = 90000 w (data sheet) variable name: ckr function: decoupling capacitor of the receive path value: in farad
semiconductor group 133 software description sts 2060 variable name: vox function: indicates the voltage amplification factor between slic and sicofi in transmit (xmit) path. value: real number ( v 3 / v 2 ) variable name: rix function: input resistor in the transmit (xmit) path value: in ohm variable name: ckx function: decoupling capacitor of the transmit (xmit) path. value: in farad variable name: r 0 ( r 0 = r b1 + r b2 + r b3 + r b4 ) function: controls the impedance matching (with help of sicofi z-filter it can be very simple (real)) value: in ohm (real value) variable name: zsli function: minimal attenuation (resp. maximal gain) of the slic 4-wire side. used by the sicofi program during automatic calculation of z- filter coefficients to check any possible overload in sicofi z-filter C slic loop ( see figure 8 ) value: in db (must be expressed as attenuation: C 20 log ( v t / v r )) practical use: must be measured before using the slic and the sicofi programs. it can be changed with an editor.
semiconductor group 134 software description sts 2060 note: the attenuation of the closed loop "z filter C slic" must be greater than 1 (gain < 0 db) in the frequency band 0 C 16 khz in order to avoid any overload or oscillation. the user has to measure the attenuation of the loop "slic input to slic output" over the whole frequency band 0 C 16 khz for different terminating impedances. the worst case (the smallest attenuation resp. the greatest gain) has then to be declared under the variable named zsli. figure 8 zsli definition example: 3.5 db gain in the loop " slic input to slic output": zsli = C 3.5
semiconductor group 135 software description sts 2060 3.3 output file description, format of the m-parameter table the output file of the slic program has to be named "***.sli". the sicofi program expects a table as shown in figure 9 . figure 9 format of the m-parameter table the first comment lines beginning with "*" document the external slic components. these lines are copied to the sicofi result file. * harris slic * vor = 0.50000 rir = 90000. ckr = 1.000e-06 * vox = 1.0000 rix = 0.10000e+06 ckx = 1.000e-06 * r0 = 600.00 zsli worst case half loop value 0.50000 freq real imag m11-table keyword 10.000000 1.666667e-03 0.000000e+00 20.000000 1.666667e-03 0.000000e+00 table ........... ............ ............ 3980.000000 1.666667e-03 0.000000e+00 400 steps 3990.000000 1.666667e-03 0.000000e+00 of 10 hz each. m12-table 10.000000 -1.616127e-03 -2.857940e-04 20.000000 -1.653738e-03 -1.462225e-04 ... 3980.000000 -1.666666e-03 -7.405309e-07 3990.000000 -1.666666e-03 -7.386749e-07 m21-table 10.000000 9.752955e-01 1.552231e-01 20.000000 9.937073e-01 7.907671e-02 ... 3980.000000 9.999999e-01 3.998867e-04 3990.000000 9.999999e-01 3.988845e-04 m22-table 10.000000 -9.191039e-01 -3.177564e-01 20.000000 -9.790611e-01 -1.656447e-01 ... 3980.000000 -9.999995e-01 -8.442052e-04 3990.000000 -9.999995e-01 -8.420893e-04 comment lines beginning with "*".
semiconductor group 136 software description sts 2060 the first column indicates the frequency value, the second one the real part value of the m- parameter at this frequency and the third one the imaginary part value. these three values are separated by at least a single space character. every real number must contain a decimal point (e.g. 2. or 2.00). the value of the variable zsli of the slic input file is obligatorily declared again in this file.
semiconductor group 137 software description sts 2060 4 sicofi ? program description the actual sicofi program section starts with an overview of the sicofi program features. then it describes the different input files of the sicofi program like the control file, specification file and the byt file. at the end of this chapter you will find a description of the sicofi result file with additional explaining comments. 4.1 program functions the sicofi program has been developed to help the user in adapting the sicofi to his particular application. it allows him: C to find the optimal set of coefficients of each sicofi filter and to calculate the theoretical transfer functions of the whole circuit sicofi-slic (return loss, transhybrid loss, frequency responses, ) (command opt). C to simulate the transfer functions of a part of the circuit sicofi-slic and to perform some tolerance analysis (command sim). the sicofi program is user friendly. without exiting the program one can: C modify the value of the variables in the control file (sicofi.ctl) and interchange input files (command data). C C use abbreviations for the variable units (powers of ten). C store a calculation session in a file (command echo). C generate a user.byt file newest to the set of coefficients optimized (command byt). C store in a file some intermediate results or the final ones (command res). C access help files (command help). C use dos commands (command dos). C start a slic calculation without leaving the program. C program the sicofi testboard with a rs232 interface program. a command line which shows the above mentioned commands is always presented after a filter calculation run at the bottom of the screen. 4.2 control file: sicofi.ctl this file contains the data controlling the optimization and simulation processes. a control file harris.ctl is given at the end of this variable list on chapter 4.2 . if not adversely noted, vari- ables may be changed during a session (use command data). variable name: spec abbreviation meaning: specification file name.
semiconductor group 138 software description sts 2060 function: indicates in which file the specifications to be fulfilled are described. value: the name of an existing file! practical use: the file has to be prepared with the editor before running the program. for different countries peculiar spec-files may be prepared. the spec file name can be changed during the session (command data). the extension name must be ***.spe. variable name: slic abbreviation meaning: slic program output file. function: indicates the name of the output file of the slic which contains the slic parameters. value: give the name of an existing file! practical use: the file is generated by the slic program and it can be changed during the session by changing the name (slic = other.sli) with command data. the extension name must be ***.sli. variable name: version abbreviation meaning: version of the sicofi which coefficients have to be calculated. function: indicates the version of the sicofi in order that the program can take the adequate sicofi transfer functions into account. value: vx.y (e.g. v3.1, v4. x ) variable name: rel abbreviation meaning: relative question flag function: indicates whether the values of the transfer functions in simulation mode are relative (refering to values at fref) or absolute. value: y (relative) or n (absolute)
semiconductor group 139 software description sts 2060 variable name: byte abbreviation meaning: reference byte file. function: indicates the name of the reference file used to generate a new file consisting of the peripheral board controller macrocommands combined with the newly calculated coefficients. value: give the name of an existing file! practical use: the reference file must be prepared with an editor before running the session but the name can be changed during the session (com- mand data). the extension name must be ***.byt. variable name: chnr abbreviation meaning: channel nummber. function: indicates for which sip-line (0 7) and which channel (a or b) the macrocommands of the reference file have to be updated. value: chnr = 0, a for sip line 0 and voice channel a. variable name: plq abbreviation meaning: plot question flag. function: the calculated transfer functions zin, ad, da and dd are stored to- gether with the corresponding specification masks by the command res. this will provide the possibility to plot the result curves together with the specification masks. value: y or n. practical use: note: you may generate a plot table with the command 4 sim. this plot file is stored with the command 6 res. the screen plot program is not available with the present program version (3.0), but the user may use his own plot program to display the prepared plot data. variable name: fsta abbreviation meaning: plot frequency start. function: defines at which frequency the plot starts. value: in hz (fsta > 0 hz). practical use: data valid only when plq = y.
semiconductor group 140 software description sts 2060 variable name: fsto abbreviation meaning: plot frequency stop. function: defines at which frequency the plot stops. value: in hz (fsto < 4000 hz). practical use: data valid only when plq = y. you must define: fsto > fsta. variable name: step abbreviation meaning: plot frequency step. function: defines the frequency step used for calculation of the plot results. value: in hz. practical use: data valid only when plq = y. variable name: on abbreviation meaning: sicofi filters switched on. function: defines which filters are switched on for the optimization and simu- lation process. value: all or a combination of z, x, r, gx, gr and b: e.g. on=z or on=z+r+x+b or on=all practical use: you must declare variables on or off. variable name: off abbreviation meaning: sicofi filters switched off. function: defines which filters are switched off during the optimization and simulation process. value: all or a combination of z, x, r, gx, gr and b: e.g. off = r + x + b or off = all practical use: you must declare variables on or off.
semiconductor group 141 software description sts 2060 variable name: short abbreviation meaning: short display flag function: flag which indicates that the results will be displayed in a short form. no: display of the calculated coefficients and of all the transfer func- tions. yes: neither the calculated coefficients nor the return loss and tran- shybrid loss are displayed. for z and b filters only the minimum reserve to or the maximum vi- olation of corresponding specifications are displayed. value: y (yes) or n (no) variable name: opt abbreviation meaning: optimization of the sicofi filter coefficients function: indicates the filters for which the program will calculate the coefficients. value: all or a combination of z, x, r and b e.g. opt = z or opt = z + r + x + b or opt = all. gr and gx filters are optimized at the same time as the r and x filters respectively. practical use: an optimization starts with the command opt. variable name: sim abbreviation meaning: simulation of different transfer paths. function: indicates the path of the circuit sicofi-slic which transfer function will be simulated. the different transfer functions, which can be simulated, are explained in chapter 5.6 (command sim). value: all or a combination of zin, ad, da, dd, asi, aso, dsi, dso (e.g. zin + dsi) practical use: a simulation starts with the command sim.
semiconductor group 142 software description sts 2060 variable name: zxrb abbreviation meaning: calculation status of the z-, x-, r- and b-filter respectively. function: indicates the calculation status: which filter coefficients have already been calculated? value: n (new), o (old) or x (not calculated). "new" means that the coefficients of the corresponding filter have been calculated during the last run. "old" means that the coefficients of the corresponding filter have been calculated before the last run. practical use: is simply an indicator to the user which must not be changed during the session. variable name: zauto abbreviation meaning: automatic calculation flag of the z filter coefficients. function: indicates whether the program is to use mathematical algorithms to optimize the z filter coefficients (automatic calculation), or the sampling points fzp defined by the variables pzin, psp, wfz (no automatic calculation). value: y (automatic) or n (no automatic calculation) practical use: note: zauto was previously defined by pzin = 0. during the automatical calculation, an iteration number appears on the screen to show the progression of the program and indicates how close the program is to a satisfying result. as soon as the iteration number turns negative, the result is fulfilling the required specifications. the more negative the result is, the better it is. variable name: pzin abbreviation meaning: number of sampling points for z-filter calculation within the speechband. function: indicates the number of frequency sampling points of the z filter within the speech band (100 hz < freq < 3400 hz) if the z filter coefficients are not automatically optimized (zauto = n). value: between 5 and 20 (one must have: 5 < pzin + psp < 20). practical use: experience has shown that the optimum value for pzin is between 8 and 13.
semiconductor group 143 software description sts 2060 variable name: psp abbreviation meaning: number of sampling points in stop band function: indicates the number of frequency sampling points of the z filter out of the speech band (3400 hz < freq < 16000 hz) if the z filter coefficients are not automatically optimized (zauto = n). value: psp must fulfill the following condition: 5 < pzin + psp < 20. practical use: experience has shown that psp = 3 is the optimum value. variable name: fzp abbreviation meaning: frequency points for z-filter calculation function: indicates the frequency of the sampling points of the z filter in non- automatic (zauto = n) optimization mode (pzin + psp values are expected). value: between 100 and 16000 hz. practical use: fzp (2) = 500,2.0 changes z-filter frequency point (2) to new frequency (500 hz) and new weighting factor (2.0). the user may also change all sampling frequency points: fzp = 350, 450, 1000, 1300, 1600, 2000, 2500, 2800, 3000, 3200, 3400, 8000, 10000, 13000 variable name: wfz abbreviation meaning: weighting factors for z filter. function: indicates the weighting factors assigned to individual frequency sampling points fzp of the z filter in non automatic optimization mode (zauto = n). pzin and psp weighting factors are expected. value: integer value. practical use: experience has shown that the values of wfz preferably are between 0.1 and 10.0. they can be changed during the session (command data). wfz = 1.0, 1.5, 1.5, 2.0, 2.0, 1.5, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0 changes all the weighting factors for the frequency points defined in fzp. if different frequency points have a relative high weighting factor, the program tries to calculate good results at this points, but the results at other frequencies may become worse.
semiconductor group 144 software description sts 2060 variable name: fz abbreviation meaning: frequency range for z-filter calculation. in automatic optimization mode (zauto = y) fz indicates the frequency band to which optimization applies (2 values are expected). value: the range should be within the limits defined in the actual specification file: fz = 300 3400 practical use: fz = 500 3200 defines a new optimization range for the z-filter. variable name: zlim the value of this variable has to be changed only in special cases see its description in chapter 7.1 . variable name: zrep abbreviation meaning: repeat flag of z filter automatic calculation function: indicates whether or not the automatic optimization of z filter coefficients will be restarted from precalculated values. value: y (yes) or n (no). variable name: zsign the value of this variable has to be changed only in special cases. see its description in chap- ter 7.1 . most of the time zsign = 1.
semiconductor group 145 software description sts 2060 variable name: fr abbreviation meaning: frequency band for r filter calculation function: indicates the frequency band which the optimization of the r filter coefficients applies. value: two integer values within the speech band. the range should be within the limits defined in the actual specification file: fr = 300 3400 variable name: rdisp abbreviation meaning: r filter frequency response display flag function: indicates whether or not the absolute frequency response of the r filter alone will be displayed. value: y (yes) or n (no). practical use: note: in software versions prior to v3.0 rdisp was defined by rfil. variable name: rrefq the value of this variable has to be changed only in special cases see its description in chapter 7.1 . most of the time rrefq = n. variable name: rref the value of this variable has to be changed only in special cases see its description in chapter 7.1 . variable name: fx abbreviation meaning: frequency band for x filter calculation function: indicates the frequency band to which the optimization of the x filter coefficients applies. value: two integer values within the speech band: fx = 300 3400
semiconductor group 146 software description sts 2060 variable name: xdisp abbreviation meaning: x filter frequency response display flag function: indicates whether or not the absolute frequency response of the x filter alone will be displayed. value: y (yes) or n (no). practical use: note: xdisp was previously defined by xfil variable name: xrefq the value of this variable has to be changed only in special cases see its description in chapter 7.1 . in general xrefq = n. variable name: xref the value of this variable has to be changed only in special cases see its description in chapter 7.1 . variable name: bauto abbreviation meaning: automatic calculation flag of the b filter coefficients. function: indicates whether the program uses mathematical algorithms to optimize the b filter coefficients (automatic calculation) or the sampling points fbp defined by the variables pb, gwfb, wfb (non-automatic calculation). (see also zauto) value: y (automatic) or n (non-automatic) practical use: note: bauto was previously defined by pb = 0 variable name: pb abbreviation meaning: number of sampling points for b filter calculation function: indicates the number of frequency sampling points of the b filter within the speech band (100 hz < freq < 3400 hz) if the b filter coefficients are not automatically optimized (bauto = n). value: between 10 and 20. practical use: the program uses the sampling points defined in the control file to calculate the b filter coefficients. experience has shown that the optimum value for pb is around 10.
semiconductor group 147 software description sts 2060 variable name: gwfb abbreviation meaning: general weighting factors for b filter. function: indicates the general weighting factor of the b filter in non-automatic optimization mode (bauto = n). value: real. practical use: experience has shown that the optimum value for gwfb is between 0.01 and 0.1. variable name: fbp abbreviation meaning: frequencies of sampling points for b filter calculation function: indicates the frequencies of the sampling points for b filter calculation in non-automatic optimization mode (pb values are expected). value: value between 100.0 and 3400.0 hz. practical use: fbp (3) = 800, 1.5 changes b-filter frequency point (3) to new frequency (800 hz) and new weighting factor (1.5). the user may also change all sampling frequency points: fbp = 350, 450, 800, 1000, 1600, 2000, 2500, 2800, 3200, 3300 variable name: fb abbreviation meaning: frequency range for b filter calculation function: in automatic optimization mode (bauto = y) fb indicates the sampling frequency band (2 values are expected): fb = 300 3400 value: the range should be within the limits defined in the actual specification file. practical use: fb = 500 3200 defines a new optimization range for the b filter.
semiconductor group 148 software description sts 2060 variable name: wfb abbreviation meaning: weighting factors for b filter. function: indicates the weighting factors of the individual sampling frequency points of the b filter in non-automatic optimization mode (bauto = n). value: real value. practical use: experience has shown that the values of wfb are between 0.5 and 5.0. wfb = 3.0, 2.5, 2.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0 changes all the weighting factors for the frequency points defined in fbp. if different frequency points have a relative high weighting factor, the program tries to calculate good results at this points, but the results at other frequencies may become worse. variable name: bdf abbreviation meaning: b-delay filter function: indicates the delay factor of the b filter in multiples of 62.5 micro sec. value: 0, 1, 2 or 3 ( 62.5 micro sec.). practical use: experience has shown that the optimum value is mostly bdf = 1. practical use: note: in software versions prior to v3.0 bdf was defined by tbm. variable name: blim the value of this variable has to be changed only in special cases ... see its description in chapter 7.1 . variable name: brep abbreviation meaning: repeat flag of b filter automatic calculation function: indicates whether or not the automatic optimization of b filter coefficients will be restarted from already calculated values. value: y (yes) or n (no). variable name: bsign the value of this variable has to be changed only in special cases see its description in chapter 7.1 . in general bsign = 1.
semiconductor group 149 software description sts 2060 variable name: dpof abbreviation meaning: supplementary delay after the sicofi post-filter function: allows the insertion of an additional group delay in receive path between the slic and the sicofi. value: in seconds. practical use: see also special application described in chapter 7.1 . variable name: dpre abbreviation meaning: supplementary delay before the sicofi pre-filter function: allows the insertion of an additional group delay in transmit path between the slic and the sicofi. value: in seconds. practical use: see also special application described in chapter 7.1 . variable name: apof abbreviation meaning: supplementary amplification after the sicofi post-filter function: allows the insertion of an additional attenuation in receive path between the slic and the sicofi. value: in db. practical use: see also special application described in chapter 7.1 . variable name: apre abbreviation meaning: supplementary amplification before the sicofi pre-filter function: allows the insertion of an additional attenuation in transmit path between the slic and the sicofi. value: in db. practical use: see also special application described in chapter 7.1 .
semiconductor group 150 software description sts 2060 variable name: agx abbreviation meaning: analog gain control transmit-path (xmit) of sicofi. function: allows an additional amplification in transmit path of sicofi. value: agx = 00 0 db agx = 01 6 db amplification agx = 10 12 db amplification agx = 11 14.2 db amplification practical use: agx is used for sicofi versions v 4.1 or later. it is programmed by the sicofi configuration register cr3. variable name: agr abbreviation meaning: analog gain control receive-path of sicofi. function: allows an additional attenuation in receive path of sicofi. value: agr = 00 0 db agr = 01 6 db attenuation agr = 10 12 db attenuation agr = 11 14.2 db attenuation practical use: agr is used for sicofi versions v 4.1 or later. it is programmed by the sicofi configuration register cr3. variable name: tm3 abbreviation meaning: test mode of sicofi: additional digital gain in transmit path function: allows an additional digital amplification in transmit path of sicofi. value: tm3 = 000 0 db tm3 = 001 6 db amplification tm3 = 011 12 db amplification practical use: tm3 is used for sicofi versions v 4.1 or later. it is programmed by the sicofi configuration register cr4. the quantization steps of the sicofi gx filter are relative high in the range of 8 to 12 db. by programming tm3 you may find a gx amplification range with smaller quantization steps in the range 0 to 8 db. additional programming of tm3 is allowed which is not used in the sicofi coefficients program: tm3 = 100 enable on chip sine wave generation tm3 = 110 far analog loop back
semiconductor group 151 software description sts 2060 4.2.1 listing of the sicofi control file harris.ctl spec = brd.spe slic = harris.sli byte = ref.byt chnr = 0,a version = 4.2 rel = y on = all opt = z+x+r+b zxrb = nnnn zauto = n pzin = 11 psp = 3 fzp = 300.0 500.0 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = 0.100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr 300.00 3400.0 rdisp = y rrefq = n fx 300.00 3400.0 xdisp = y xrefq = n bauto = n pb = 10 gwfb = 0.500e-01 bdf = 1 fbp = 300.0 500.0 700.0 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.000 2.000 1.000 5.000 1.000 2.000 1.000 5.000 1.000 1.000 apre = 0.0 dpre = 0.0 apof = 0.0 dpof = 0.0 agr = 00 agx = 00 tm3 = 000 ;
semiconductor group 152 software description sts 2060 4.3 specification file: country.spe this file defines the national specifications which must be fulfilled. a specification file brd.spe containing the particular specifications for the federal republic of germany is given at the end of this variable list on chapter 4.3.3 . values of variables may be changed by using a common editor (using command dos). variable name: fref abbreviation meaning: frequency reference. function: indicates the reference frequency all calculations and frequency responses are referred to. value: in hz, e.g. fref = 1014. practical use: once defined for an application it does not need to be modified. variable name: law abbreviation meaning: compression/expansion law. function: defines the law according to which the 16 bit word is compressed (resp. the 8 bit word is expanded). value: a or u. practical use: once defined for an application it does not need to be modified. variable name: vref abbreviation meaning: reference voltage. function: equals the reference voltage defined by the ptt (telecom authority). the reference voltage is the resulting voltage at the reference impedance zr, if 1 mw of power of frequency fref are applied. vref = sqrt (0.001* zr ). value: in v. practical use: once defined for an application it does not need to be modified. instead of using this reference voltage vref you may use the country specific reference impedance zr (see zrrp1, zrcp1, zrrp2, zrcp2, zrrs, zrcs). then the sicofi program automatically calculates the corresponding reference voltage.
semiconductor group 153 software description sts 2060 variable names: zrrp1, zrcp1, zrrp2, zrcp2, zrrs, zrcs abbreviation meaning: resistors and capacitors of the impedance zr (see circuit library in chapter 4.3 . 2 ). function: zr defines the impedance used to calculate the reference voltage if this one is not explicitly declared. value: resistors in ohm and capacitors in farad. variable name: rlx abbreviation meaning: relative level of the xmit signal. function: indicates the relative levels on the a,b line of the transmit signal with the reference level (0 dbm0) on the digital side. value: in dbr. practical use: see sign convention explained in chapter 4.3.1 . variable name: rlr abbreviation meaning: relative level of the receive signal. function: indicates the relative level on the a,b line of the receive signal with the reference level (0 dbm0) on the digital side. value: in dbr. practical use: see sign convention explained in chapter 4.3.1 . variable name: abimp abbreviation meaning: a, b -wire impedance function: indicates the terminating impedance of the a,b line used for the measurements of the frequency response. value: "zi" or "z3". practical use: this impedance is not being considered in calculating the return loss and transhybrid loss. (see zirp1, zicp1, zirp2, zicp2, zirs, zics and z3rp1, z3cp1, z3rp2, z3cp2, z3rs, z3cs).
semiconductor group 154 software description sts 2060 variable names: zirp1, zicp1, zirp2, zicp2, zirs, zics abbreviation meaning: resistors and capacitors of impedance equivalent circuit "zi" (see circuit library in chapter 4.3.2 ). function: "zi" defines the input impedance which the line card has to present from a,b line. value: resistors in ohm and capacitors in farad. variable names: zlrp1, zlcp1, zlrp2, zlcp2, zlrs, zlcs abbreviation meaning: resistors and capacitors of impedance equivalent circuit "zl" (see circuit library in chapter 4.3.2 ). function: "zl" defines the load impedance used for digital to digital measurements and calculations (e.g. echo return loss). value: resistors in ohm and capacitors in farad. variable names: z3rp1, z3cp1, z3rp2, z3cp2, z3rs, z3cs abbreviation meaning: resistors and capacitors of impedance equivalent circuit "z3" (see circuit library in chapter 4.3.2 ). function: "z3" defines a terminating impedance used for analog to digital and digital to analog measurements when abimp = z3. value: resistors in ohm and capacitors in farad.
semiconductor group 155 software description sts 2060 the following variables define specification masks. a mask can be described as a table as follows: fr defines the frequency at which the mask value changes. atC defines the lower threshold value of the mask at the frequency fr. at+ defines the higher threshold value of the mask at the frequency fr. example: figure 10 defines the mask of the return loss. figure 10 specification mask in the specification file the following specification masks can be described: variable name: zre function: defines the mask of the return loss. value: fr in hz, atC and at+ in db. variable name: zmir this variable does not need to be modified by the user. it is described in chapter 7.1 . variable name: da, upper function: defines the upper bound of the specification mask of the frequency response in receive path (d/a). value: fr in hz, atC and at+ in db. zre fr 300 600 3khz3.4khz atC 0 15 20 15 at+ 15 20 20 0
semiconductor group 156 software description sts 2060 variable name: da, lower function: defines the lower bound of the specification mask of the frequency response in receive path (d/a). value: fr in hz, atC and at+ in db. variable name: da, delay function: defines the specification mask of the group delay in receive path (d/ a). value: fr in hz, atC and at+ in ms. variable name: ad, upper function: defines the upper bound of the specification mask of the frequency response in transmit path (a/d). value: fr in hz, atC and at+ in db. variable name: ad, lower function: defines the lower bound of the specification mask of the frequency response in transmit path (a/d). value: fr in hz, atC and at+ in db. variable name: ad, delay function: defines the specification mask of the group delay in transmit path (a/d). value: fr in hz, atC and at+ in ms. variable name: dd function: defines the mask of the transhybrid loss value: fr in hz, atC and at+ in db.
semiconductor group 157 software description sts 2060 4.3.1 sign convention for relative levels for a transmission system the relative levels are defined in dbr corresponding to the reference level 0 dbm0 of the signal at the reference point as shown below. this convention is used in the sicofi program and has to be applied to the circuit sicofi- slic to determine the correct signs of the variables rlx and rlr. the circuit sicofi-slic can be described with separated transmit and receive paths as shown below. or drawn from another viewpoint: if a is the gain in transmit direction (a = 20 log ), then rlx = C a dbr. if b is the gain in receive direction (b = 20 log ), then rlr = + b dbr. v 0 v ab v ab v 0
semiconductor group 158 software description sts 2060 4.3.2 circuit library the impedance used in the sicofi coefficient program are all described in terms of the equiv- alent circuit diagram shown below: impedance z * is e.g. z i , z l , z 3 or z r . C zi defines the input impedance which the line card has to present to a,b line. C zl is the load impedance used for digital to digital measurements. C z3 defines a terminating impedance used for analog to digital and digital to analog measurements when abimp = z3. C zr is the reference impedance for calculation of the reference voltage v ref (zr or v ref may be used to define the reference).
semiconductor group 159 software description sts 2060 4.3.3 listing of the sicofi ? specification file brd.spe fref = 1014.0 law = a vref = 0.9480 rlx = 0. rlr = C7.0 abimp = zi zlrp1 = 820. zlcp1 = 0. zlrp2 = 0. zlcp2 = 0.115e-06 zlrs = 220. zlcs = 0. zirp1 = 820. zicp1 = 0. zirp2 = 0. zicp2 = 0.115e-06 zirs = 220. zics = 0. z3rp1 = 820. z3cp1 = 0. z3rp2 = 0. z3cp2 = 0.115e-06 z3rs = 220. z3cs = 0. zrrp1 = 820. zrcp1 = 0. zrrp2 = 0. zrcp2 = 0.115e-06 zrrs = 220. zrcs = 0. zre fr 300 500 3k 3.4k atC 0 20 20 16 at+ 16 20 20 0 zmir fr 4k 12k atC 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 da,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100
semiconductor group 160 software description sts 2060 listing of the sicofi ? specification file brd.spe (contd) ad,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k atC 0 27 27 23 at+ 23 27 27 0
semiconductor group 161 software description sts 2060 4.4 byte file: user.byt this file contains the commands used by the program rs 232 to program the sicofi test board stut 2060 from the peripheral board controller pbc ( see chapter 5.4 ). the calculated sicofi coefficients are the same as in the sicofi-application: harris slic hc 5502. the table below gives the meaning of the different commands. command meaning psr = 36 defines the phase shift on pcm highway between the frame synchronization pulse syp of the pbc and the pcm time slots. cam00 = 41 assignment of the time slots. cam20 = 40 assignment of the time slots. ciwo = 26, f4, 80 deactivates all sicofi filters. ciwo = 13, 20, ba, ea, 25, 23, writes z filter coefficients 20, 41, c1, bb ba, ea, 25, 23, 41, c1, bb in sicofi a of sip0 line. ciwo = 23, 50, c8, b5, 4a, c2, writes x filter coefficients 21, 04, 90 50, c8, b5, a4, c2, 21, 04, 90 ciwo = 2b, d0, c8, 84, dc, b1, writes r filter coefficients 93, 02, 1d d0, c8, 84, dc, b1, 93, 02, 1d ciwo = 30, a0, 11, 20, 92 writes gx and gr filter coefficients a0, 11, 20, 92 ciwo = 03, c4, 12, 23, 32, 72, writes b filter coef. (1st part) b9, b2, ba c4, 12, 23, 32, 72, b9, b2, ba ciwo = 0b, 00, 97, fd, c8, dd, writes b filter coef. (2nd part) 4c, c2, bc 00, 97, fd, c8, dd, 4c, c2, bc ciwo = 18, 19, 19, 11, 19 writes b-delay filter coefficients 19, 19, 11, 19 sig0 = c0 writes signaling byte c0. ciwo = 26, f4, 78 activates all sicofi filters.
semiconductor group 162 software description sts 2060 4.5 listing and description of the result.res file the following pages comment the contents of the result file harris.res. control file section of sicofi program quantized values of the optimized coefficients input_file_name: harris.ctl date: 31.01.89 15:56 spec = brd.spe slic = harris.sli byte = ref.byt chnr = 0,a plq = n on = all version = 4.2 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = n zrep = n zsign = 1 fz = 300.00 3400.0 zlim = 2.00 pzin = 11 psp = 3 fzp = 300.00 500.00 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = .100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr = 300.00 3400.0 rdisp = y rrefq = n rref = .18639 fx = 300.00 3400.0 xdisp = y xrefq = n xref = C6.1268 bauto = n brep = n bsign = 1 fb = 300.00 3400.0 blim = 2.00 bdf = 1 pb = 10 gwfb = .500e-01 fbp = 300.00 500.00 700.00 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 apre = .00 dpre = .00 apof = .00 dpof = .00 agx = 00 agr = 00 tm3 = 000 xzq = .16406250e+00 .26757810e+00 .21679690e+00 .97656250eC01 .13183590eC01 xrq = .94531250e+00 .44921880eC01 C.50781250eC01 .29296880eC02 C.29296880eC02 xxq = .15078130e+01 .65625000e+00 .68359380eC01 .23681640eC01 .48828130eC03 xbq = C.11132810e+00 C.35937500e+00 .82031250eC01 .19531250e+00 C.60607910eC01 C.80078130eC01 .60058590eC01 .15487670eC01 C.33691410eC01 .14160160eC01 xgq = .57226560e+00 .13046880e+01
semiconductor group 163 software description sts 2060 run # 1 z-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: separator to indicate the end of the control file hexadecimal codes of the optimized coefficients (see *.byt file) input file of the slic program ; bytes for z-filter (13): 60,2b,a3,2b,4b,42,33,22 bytes for r-filter (2b): f0,29,97,c2,1b,15,0b,bc bytes for x-filter (23): 70,c8,a5,4d,14,21,02,61 bytes for gain-factors (30): 31,23,20,b2 2nd part of bytes b-filter (0b): 00,c6,d1,24,f6,43,2d,2c 1st part of bytes b-filter (03): c3,dd,a2,4b,22,1a,bb,bb bytes for b-filter delay (18): 19,19,11,19 * harris slic * vor = .50000 rir = 90000. ckr = .10000e-05 * vox = 1.0000 rix = .10000e+06 ckx = .10000e-05 * r0 = 600.00 xz = .16507 .26725 .21631 .09693 .01324 xzq = .16406 .26758 .21680 .09766 .01318 bytes for z-filter (13): 60,2b,a3,2b,4b,42,33,22 return loss freq (hz) loss (db) freq (hz) loss (db) 100. 33.772 2000. 21.902 200. 31.952 2100. 22.372 300. 29.816 2200. 22.981 400. 28.025 2300. 23.756 500. 26.560 2400. 24.740 600. 25.362 2500. 25.993 700. 24.374 2600. 27.601 800. 23.558 2700. 29.665 900. 22.886 2800. 32.059 1000. 22.337 2900. 33.430 1100. 21.897 3000. 31.760 1200. 21.555 3100. 28.591 1300. 21.305 3200. 25.633 1400. 21.138 3300. 23.126 1500. 21.052 3400. 21.005 1600. 21.049 3500. 19.171 1700. 21.125 3600. 17.558 1800. 21.290 3700. 16.123 1900. 21.543 3800. 14.832 optimized coefficients of z filter quantized values of the optimized coefficients of z filter hexadecimal codes of the optimized coefficients of z filte r hexadecimal code of the coefficient operation command cop used to program the z filter theoretical return loss expected to be measured when sicofi is programmed with the quantized values of the optimized coefficients of z filter
semiconductor group 164 software description sts 2060 run # 1 x-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: gx results: min. z-loop reserve: 2.944 db at frequency: 500.0 hz min. z-loop mirror reserve: 11.341 db at frequency: 4000.0 hz minimal reserve in the z loop minimal reserve of the mirror signal in the z loop xx = 1.51053 .65349 .06808 .02365 .00057 xxq = 1.50781 .65625 .06836 .02368 .00049 bytes for x-filter (23): 70,c8,a5,4d,14,21,02,61 x-filter attenuation function (in db), (always absolute values) freq (hz) loss (db) gd (msec) freq (hz) loss (db) gd (msec) 100. C7.059 .048 2000. C3.933 .009 200. C7.030 .047 2100. C3.675 .006 300. C6.982 .047 2200. C3.411 .003 400. C6.915 .046 2300. C3.143 .000 500. C6.830 .045 2400. C2.869 C.003 600. C6.726 .043 2500. C2.589 C.006 700. C6.606 .041 2600. C2.304 C.009 800. C6.469 .039 2700. C2.014 C.013 900. C6.318 .037 2800. C1.719 C.018 1000. C6.151 .035 2900. C1.420 C.022 1100. C5.972 .033 3000. C1.119 C.028 1200. C5.780 .030 3100. C.818 C.034 1300. C5.577 .028 3200. C.521 C.040 1400. C5.364 .025 3300. C.234 C.047 1500. C5.143 .022 3400. .039 C.054 1600. C4.913 .020 3500. .290 C.061 1700. C4.677 .017 3600. .511 C.068 1800. C4.435 .014 3700. .695 C.074 1900. C4.187 .011 3800. .832 C.078 optimized coefficients of x filter quantized values of the optimized coefficients of x filter hexadecimal codes of the optimized coefficients of x filter hexadecimal code of the coefficient operation command used to program the x filter absolute frequency response of the x filter alone (attenuation + group delay). this table is displayed only with the sicofi control file variable xdisp = y. gd = group delay all attenuation values (in db) refer to fref = 1014. hz rlx slic+z agx vref/vsic xref tm3 gx .00 C 3.85 C .00 C 4.41 C C6.13 C .00 = C2.32 ideal .01 = 3.85 + .00 + 4.41 + C6.13 + .00 + C2.31 quant second byte for gain: ,20,b2 reminder of the reference frequency ideal value of gx starting from the desired value of r lx from obtained value of r lx quantized value of gx hexadecimal code of the optimized coefficient of gx
semiconductor group 165 software description sts 2060 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .232 ms tgref cb = .245 ms group delay in transmit direction (a/d) for the voice channel a and b resp. at the reference frequency fref. freq (hz) loss (db) gd (msec) freq (hz) loss (db) gd (msec) 100. 13.831 2.520 2000. .049 .009 200. .346 1.784 2100. .053 .014 300. .015 .587 2200. .055 .019 400. .037 .286 2300. .057 .025 500. .034 .164 2400. .059 .032 600. .023 .102 2500. .062 .041 700. .012 .066 2600. .066 .051 800. .003 .043 2700. .072 .063 900. C.003 .028 2800. .081 .076 1000. C.006 .018 2900. .095 .092 1100. C.006 .011 3000. .113 .112 1200. C.003 .006 3100. .137 .136 1300. .002 .003 3200. .171 .166 1400. .008 .001 3300. .218 .207 1500. .016 .000 3400. .291 .260 1600. .024 .000 3500. .412 .337 1700. .031 .001 3600. .640 .455 1800. .038 .003 3700. 1.145 .648 1900. .044 .006 3800. 2.476 .984 frequency response in transmit direction (a/d) of the set sicofi+slic+external circuitry. these are the theoretical values expected to be measured when sicofi is programmed with the quantized values of the optimized coefficients of x filter.
semiconductor group 166 software description sts 2060 run # 1 r-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: gr results: xr = .94728 .04531 C.05067 .00264 C.00258 xrq = .94531 .04492 C.05078 .00293 C.00293 bytes for r-filter (2b): f0,29,97,c2,1b,15,0b,bc r-filter attenuation function (in db), (always absolute values) freq (hz) loss (db) gd (msec) freq (hz) loss (db) gd (msec) 100. .537 C.008 2000. .052 .011 200. .522 C.007 2100. .078 .011 300. .497 C.006 2200. .113 .011 400. .465 C.005 2300. .156 .011 500. .425 C.003 2400. .208 .010 600. .381 C.002 2500. .269 .009 700. .334 .000 2600. .339 .008 800. .286 .002 2700. .418 .006 900. .238 .003 2800. .505 .004 1000. .192 .005 2900. .600 .002 1100. .151 .006 3000. .701 C.000 1200. .113 .008 3100. .807 C.003 1300. .082 .009 3200. .915 C.006 1400. .056 .009 3300. 1.022 C.009 1500. .037 .010 3400. 1.126 C.013 1600. .025 .011 3500. 1.222 C.016 1700. .021 .011 3600. 1.307 C.019 1800. .023 .011 3700. 1.378 C.021 1900. .034 .011 3800. 1.431 C.023 optimized coefficients of r filter quantized values of the optimized coefficients of r filter hexadecimal codes of the optimized coefficients of r filter hexadecimal code of the cop-command used to program the r filter absolute frequency response of the r filter alone (attenuation + group delay). this table is displayed only with the sicofi control file variable r disp = y. all attenuation values (in db) refer to fref = 1014. hz Crlr slic+z agr vsic/vref rref gr 7.00 C 6.38 C .00 C C4.41 C .19 = 4.84 ideal 7.01 = 6.38 + .00 + C4.41 + .19 + 4.85 quant first byte for gain (30) : 31,33 reminder of the reference frequency ideal value of gr starting from the desired value of r lr from obtained value of r lr quantized value of gr hexadecimal code of the optimized coefficient of gr
semiconductor group 167 software description sts 2060 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .235 ms tgref cb = .218 ms group delay in transmit direction (d/a) for the voice channel a and b resp. at the reference frequency fref. freq (hz) loss (db) gd (msec) freq (hz) loss (db) gd (msec) 100. .059 .011 2000. .047 .041 200. .056 .001 2100. .050 .048 300. .050 .000 2200. .052 .055 400. .042 .000 2300. .053 .062 500. .034 .001 2400. .053 .071 600. .025 .002 2500. .054 .081 700. .017 .004 2600. .055 .092 800. .010 .005 2700. .058 .106 900. .006 .007 2800. .063 .121 1000. .003 .009 2900. .071 .139 1100. .003 .011 3000. .084 .161 1200. .005 .013 3100. .105 .188 1300. .008 .015 3200. .136 .221 1400. .013 .018 3300. .185 .264 1500. .019 .021 3400. .267 .321 1600. .026 .024 3500. .408 .401 1700. .033 .028 3600. .671 .522 1800. .038 .032 3700. 1.231 .718 1900. .043 .036 3800. 2.640 1.056 frequency response in transmit direction (d/a) of the set sicofi+slic+external circuitry. these are the theoretical values expected to be measured when sicofi is programmed with the quantized values of the optimized coefficients of r filter.
semiconductor group 168 software description sts 2060 run # 1 b-filter calculation results reference impedance for optimization: zlrp1= 820. zlcp1= .000 zlrp2= 0. zlcp2= .115e-06 zlrs = 220. zlcs = .000 calculated and quantized coefficients: trans hybrid loss freq (hz) loss (db) freq (hz) loss (db) 100. 48.629 2000. 45.730 200. 39.496 2100. 46.340 300. 42.330 2200. 47.186 400. 45.483 2300. 48.631 500. 48.880 2400. 50.950 600. 52.046 2500. 53.760 700. 53.650 2600. 57.230 800. 53.233 2700. 61.328 900. 52.387 2800. 61.702 1000. 51.862 2900. 59.872 1100. 51.637 3000. 57.133 1200. 51.332 3100. 53.136 1300. 50.575 3200. 49.168 1400. 49.624 3300. 45.697 1500. 48.489 3400. 42.616 1600. 47.357 3500. 40.181 1700. 46.503 3600. 38.344 1800. 45.826 3700. 37.331 1900. 45.592 3800. 38.242 note: theoretical values of the transhybrid loss greater than 40 db are only calculated but may not be measurable exactly! theoretical transhybrid loss expected to be measured when sicofi is programmed with the quantized values of the optimized coefficients of b filter. xb = C.11222 C.35881 .08265 .19353 C.06063 C.08070 .05988 .01549 C.03382 .01419 xbq = C.11133 C.35938 .08203 .19531 C.06061 C.08008 .06006 .01549 C.03369 .01416 2nd part of bytes b-filter (0b) : 00,c6,d1,24,f6,43,2d,2c 1st part of bytes b-filter (03) : c3,dd,a2,4b,22,1a,bb,bb optimized coefficients of b filter quantized values of the optimized coefficients of b filter hexadecimal codes of the second part of the optimized coefficients of b filter hexadecimal codes of the first part of the optimized coefficients of b filter hexadecimal code of the cop-command used to program the second part of b filter hexadecimal code of the cop-command used to program the first part of b filter additonal b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18) : 19,19,11,19 hexadecimal code of the cop-command used to program the b-delay filter value of the delay of b filter hexadecimal code of the b-delay filter coefficients
semiconductor group 169 software description sts 2060 5 using the software packet note: to aid comprehensibility the following symbol < > has been introduced. any text enclosed within this symbol has to be typed from the pc keyboard. 5.1 installation of sicofi ? software the sicofi program sts 2060 requires the following environment: C an ibm-at personal computer or compatible running ms-dos version 3.0 or later C a coprocessor 80287 C 640 kbyte ram available memory C 1.2 mbyte floppy disk drive (on request the program can be provided for a 360 kbyte floppy disk drive) note: config.sys file has to include: set buffers = 20 set files = 20 device = ansi.sys various files and buffers are opened by the program. the program automatically closes them with the command exit. having assembled all the necessary material you can start working with the program: insert the sicofi disk in drive a. change to drive a: call the installation program: the program setup creates the directories c:\sicofi and c:\sicofi\doc on drive c (hard disk). the tables on the next page show which files will be copied by the program setup into each directory. warning: the program setup will overwrite any existing files.
semiconductor group 170 software description sts 2060 directory of c:\sicofi file contents sicofi.bat running batch file using sico.exe sico.exe sicofi execution program harris.for source file of harris slic program written in fortran harris.exe slic execution program of harris slic harris.inp input file of harris.exe harris.sli output file of harris.exe harris.ctl control file of sicofi program when calculating coefficients for sicofi-harris slic applications harris.res result file of sicofi coefficients calculation for harris slic trafos.for source files of transformer slic trafot.for programs with series or transverse feeding written in fortran trafos.exe slic execution programs of transformer trafot.exe slic of the sicofi user board stu 2060 trafos.inp input file of trafos.exe trafot.inp input file of trafot.exe with series or transverse feeding trafot.sli output file of transformer slic program trafo.ctl control file of sicofi program when calculating coefficients for sicofi-transformer slic applications brd.spe specification file for germany ref.byt reference byte file (user.byt) brd1.spe modified specification file for germany brd1.imp impedance file sicoauto.bat sicofi batch program mode.ctl sicofi batch mode file batch.ctl sicofi batch control file mark.com mark current memory position release.com release memory above last mark rs232.exe rs232 interface program
semiconductor group 171 software description sts 2060 the following slic programs are also available on request: sgs.exe execution program of sgs-thomson slic l3030 + l3000 nsgs.exe execution program of sgs-thomson slic l3090 + l3000 eric.exe execution program of ericsson slic pbl 3762 a read.me file is available on the floppy disk. to modify the slic part of the program, the following is necessary: C an editor C a compiler (e.g. microsoft fortran compiler advised, ibm professional fortran compiler profort, rmfort ... ) note: our slic programs have been compiled using microsoft compiler C a linker (e.g. microsoft, profort, plink86 ... ) to start the program, type: c:\sicofi\doc file contents system.hlp system environment menu.hlp menu help slic1.hlp - slic6.hlp slic sico1.hlp - sico8.hlp sicofi gx.hlp table of sicofi gain gx gr.hlp table of sicofi attenuation gr ctl.hlp control file spe.hlp specification file byt.hlp programming byte file level.hlp level imped.hlp impedance definition feature.hlp features of sicofi version v 3.0 applic.hlp available sicofi / slic applications textout.sic sicofi program output text errorout.sic sicofi program error text
semiconductor group 172 software description sts 2060 5.2 sts 2060 main menu enter your selection: <1>: you calculate the model of your slic (see chapter 5.3). <2>: you start the sicofi program (see chapter 5.5). <3>: you initialize the rs 232 interface in order to program the sicofi test board from your pc (see chapter 5.4). <0>: you leave the sts 2060 software packet to return to ms-dos. siemens ag., components group, hl it pd 22 authors: mr. kliese, mr. glasser tel.: 089/4144-3662 1 slic calculation 2 sicofi program 3 rs 232 sicofi programming 4 exit
semiconductor group 173 software description sts 2060 5.3 sts 2060 slic menu enter your selection: <1>, ... or <7>: the model of the indicated slic will be calculated and the corresponding m-parameters will be generated and written in a file (named by yourself) "***.sli". <8>: you have written your own slic routine. this routine has to be named "user.exe". this routine has to generate the m-parameters or k-parameters and to write them to a file named "***.sli". <0>: you return to the sts 2060 main menu. 1 harris slic hc 5502 / 5504 2 transformer slic with series feeding 3 transformer slic with transverse feeding 4 sgs - thomson slic l3030 / l3000 5 sgs - thomson slic l3090 / l3000 6 ericsson slic pbl 3736 / amd 7950 7 ericsson slic pbl 3762 8 user slic 0 exit to main menu
semiconductor group 174 software description sts 2060 5.4 sts 2060 rs 232 menu the program rs 232 uses the ***.byt file to program the sicofi test board stut 2060. this test board has to be connected to the port com1. the contents of the ***.byt file is sent through the port com1 via the interface rs 232 to the test board ( see chapter 4.4 byte file: us- er.byt ). input: 1 please enter input file name: ref.byt t programming input file: ref.byt enter your selection: <1>: you declare which ***.byt file you want to use to program the sicofi test board. <2>: the ***.byt file has already been declared. the programming of the sicofi test board can start immediately. <3>: the sicofi test board is programmed directly from the pc key- board (without using any ***.byt file). <0>: you return to sts 2060 main menu. note: if you have used the command <3>, the command will bring you back to the above menu. rs 232 program v 1.0 siemens hl it pd 22 9600 baud, 8 bit, no parity bit and one stop bit at port com1 (1) file definition (2) file programming (3) terminal programming (0) end rs232 programming
semiconductor group 175 software description sts 2060 5.5 using sicofi ? program before starting the sicofi program you must check: C at least one control file "***.ctl" exists in the working directory. C the specification file "***.spe" and the slic transfer file "***.sli" respectively declared by the control file variables spec and slic exist in the working directory. siemens ag., components group, hl it pd 22 authors: mr. kliese, mr. glasser tel.: 089/4144-3662 enter control file name: <***.ctl> reading sicofi control file ... ***.ctl reading slic parameter file ... ***.sli reading specification file ... ***.spe 1 disp 2 data 3 opt 4 sim 5 byt 6 res 7 echo 8 help 9 dos 0 exit
semiconductor group 176 software description sts 2060 5.6 sts 2060 sicofi ? menu at this point different commands are accessible. these commands can be choosen by typing the number or moving the cursor up to the desired command. <1> or disp: using this command you can display the current control file on the pc screen. if you change the value of a variable (command data), this will be taken into account by the next display. to display other files of the working directory, refer to the command dos. <2> or data: using this command you can change the value of a variable. how to proceed? type: the possible separators are: < > <,> < = > <*> <%> <$> several variables may be changed at the same time. if the value of a variable corresponding to a file name (e.g. spec) is changed, not only the change will be taken into account but also the contents of the file will be automatically read and available for the sicofi program. to facilitate the declaration of the particular values of a variable the program offers the possibility to abbreviate the power of ten factor using the following conventions: p corresponds to pico (1.0 e - 12) n corresponds to nano (1.0 e - 09) u corresponds to micro (1.0 e - 06) m corresponds to milli (1.0 e - 03) k corresponds to kilo (1.0 e + 03) meg corresponds to mega (1.0 e + 06) g corresponds to giga (1.0 e + 09) e.g. opt = x + r sim = all zauto = y fx = 300,3.2k
semiconductor group 177 software description sts 2060 <3> or opt: using this command the program will optimize, automatically or not (see variables zauto and bauto), the coefficients of the filters indicated by the variable opt. note: the coefficient of the gr filter is automatically calculated together with those of the r filter. the coefficient of the gx filter is automatically calculated together with those of the x filter. the coefficient of the b-delay filter is automatically calculated together with those of the b filter. once obtained each coefficient is quantized to the closest value programmable at the sicofi. assuming the sicofi is now programmed with the quantized coefficients, the program calculates the theoretical transfer functions of the set sicofi-slic (taking into account which filters are switched on and which are switched off; see variables on/off). the table below shows which transfer function is calculated after which coefficient optimization: optimized calculated coefficients transfer functions z filter return loss r filter transfer function in receive direction (4-wire to 2-wire). r filter absolute frequency response (if rdisp = y) x filter transfer function in transmit direction (4-wire to 2-wire). x filter absolute frequency response (if xdisp = y) b filter transhybrid loss
semiconductor group 178 software description sts 2060 <4> or sim: using this command the program will simulate the absolute or relative (see variable rel) transfer functions or the set sicofi-slic indicated by the variable sim. these transfer functions may be checked by measurements (taking into account which filter is switched on and which one is switched off; see variables on/off). the diagram and table below show the meaning of each transfer function that can be simulated: figure 11 definition of transfer functions when the variable rel of the control file is "n", the program calculates absolute attenuation values. with the rel variable of the control file set "y", the program displays relative values normalized to the frequency fref. transfer function: zre: return loss zin: input impedance ad: analog to digital da: digital to analog dd: digital to digital asi: analog to sicofi input aso: analog to sicofi output dsi: digital to sicofi analog input dso: digital to sicofi analog output equivalent measurement: at a,b (z = zin) at a,b a,b to e e to a,b e to e via a,b (z = zl) a,b to c a,b to d (z-filter on) e to c via a,b (z = zl or z = zi) e to d
semiconductor group 179 software description sts 2060 <5> or byt: using this command the program takes the file declared under the variable byte as reference file and interchanges the coefficients written in this file with those calculated by the sicofi program. using the command byt the program asks for a new ***.byt file name. this new file can then be used with the program rs 232 to program the sicofi test board. <6> or res: using this command you can store the results of the last sicofi coefficient calculation in a file which name may be defined by yourself. the result file is described in chapter 4.5. to have a complete documentation of the transfer functions and coefficients, all sicofi filters should be switched on (opt = all or opt = z + r + x + b) in the last calculation. <7> or echo: using this command under the current directory a file is created in which everything appearing on the pc screen is stored. to close the echo file type echo once again. after a session you may print the echo file for documentation purposes. <8> or help: using this command you may access the program documentation without leaving the sicofi program. <9> or dos: using this command you can work with the dos of your pc. all the usual dos commands are available (dir, rename, type, ... ). after having used this command you automatically return to the sicofi menu. <0> or exit: using this command you return to the sts 2060 main menu.
semiconductor group 180 software description sts 2060 6 example: how to obtain sicofi ? coefficients for a special slic application 6.1 calculation of m-parameters for harris slic the following chapter gives an example showing how to obtain the optimized sicofi coefficients for an application using the harris slic hc 5508. the specifications to be fulfilled are those of the "deutsche bundespost". figure 12 shows in the upper part a simplified block diagram of the harris slic hc 5508 and in the lower part the architecture which is taken from the datasheet. in figure 13 you see the connection of the harris slic to the sicofi. in the two blocks ax and ar with external interface components capacitors c cx and c cr decouple a dc offset. because the sicofi input impedance is very high (m w ), we then also need the resistor r ix in transmit path to have a defined high pass and time constant. in our application we take c cx = c ck = 1 m f, r ix = 100 k w and vox = vor = 1. to gain the transfer function of the slic and its external interface components, it is necessary first to derive the m-parameter as described in chapter 3.1 . the user then has to write a slic program which calculates the m-parameters. with his slic program he generates a m-parameter table of the slic like the table in chapter 3.3 . the name of the m-parameter output file may be harris1.sli and is used for an input file to the sicofi coefficients program. next a sicofi control file like harris.ctl, which is listed on chapter 4.2.1 , has to be edited. you have to update the "slic = harris.sli" to "slic = harris1.sli". now you may calculate the sicofi coefficients as described in chapter 6.2 . the results are stored in a result file harris1.res which is described in chapter 4.5 .
semiconductor group 181 software description sts 2060 a) derivation of the equations of the m-parameters: in the following equations, ax and ar are the transfer function factors of the two blocks. with the factor k = 1000 we get: conclusions: v 0 = C v m + i 1 = ( v 1 C v 0 ) (2 r f ) (1) (2) v m k z 0 k 2 r f C2 ar v 3 v 0 = C ( v 1 C v 0 ) + (3) ( v 1 C v 0 ) k z 0 k 2 r f C2 ar v 3 (4) ( v 1 C v 0 ) k z 0 k 2 r f = v 1 + 2 ar v 3 = ( v 1 C v 0 ) z 0 2 r f with (1) and (4) i 1 z 0 = v 1 + 2 ar + v 3 (5) v 2 = C ax ( v 1 C v 0 ) + (6) k z 0 k 2 r f = C ax ( v 1 C v 0 ) z 0 2 r f i 1 v 1 m11 = = with v 3 = 0 2 ar 1 z 0 (7) i 1 v 3 m12 = with v 1 = 0 (8) z 0 = with v 3 = 0 and (5) v 1 = i 1 z 0 (9) v 2 v 1 m21 = = = C ax (10) Cax ( v 1 C v 0 ) 2 r f i 1 v 3 = (11) ( v 1 C v 0 ) z 0 2 ar 2 r f with (4) with (6), (9) and (1) v 2 v 3 m22 = = C 2 ax ar with v 1 = 0 and (6), (11) (12)
semiconductor group 182 software description sts 2060 figure 12 internal architecture of harris slic hc 5508/09
semiconductor group 183 software description sts 2060 figure 13 connection of harris slic hc 5508/09 with sicofi ?
semiconductor group 184 software description sts 2060 6.2 working method for calculating sicofi ? coefficients the aim of this chapter is to give you some hints to take advantage of the flexibility of the sts 2060 software. C the sicofi is a codec filter which enables you to have only a single slic circuit for different application purposes (e.g. different countries). the slic circuit has to be optimized first in order to use the sicofi filters in their optimum working range (optimum use of the filters). for this aim you start in calculating the z filter coefficients for the different applications. modify the values of the different slic parameters in order to obtain the best compromise. then the slic parameters are frozen and, using the automatic calculation of the z filter (zauto = y), the z filter coefficients are optimized. subsequently the r (gr) and/or x (gx) filter coefficients are optimized. only then the b filter coefficients may be optimized in the automatic mode (bauto = y). due to the architecture of the sicofi, the filter coefficients have to be calculated in the sequence described above. C several specification files can be prepared before using the program in order to proceed more quickly during the calculation of the coefficients for different applications. indeed only the file name declared with the variable spec needs to be changed to restart the calculation without leaving the sicofi program.
semiconductor group 185 software description sts 2060 7 extended sicofi ? calculation features 7.1 special variables in the control file the values of these variables in general do not need to be changed during the optimization of the coefficients. they can be modified however to help you to advance in the optimization process if satisfactory results have not yet been achieved. if not adversely noted, variables may be changed during a session (command data). zmir abbreviation meaning: z-loop mirror signal mask function: defines the mask of the z-loop mirror signal. in calculating the z filter coefficients the sicofi program checks that the convolution effects due to the decimation and interpolation filters are really negligible as they should be. value: fr in hz, at- and at+ in db rrefq abbreviation meaning: rref flag question function: indicates whether the r filter frequency response will be automatically optimized or calculated according to the value defined by rref (see below). value: y (according to rref) or n (automatically). rref abbreviation meaning: r filter attenuation at reference frequency function: indicates the value of the r filter attenuation at the reference frequency fref when rrefq = y. value: in db. xrefq abbreviation meaning: xref flag question function: indicates whether the x filter frequency response will be automatically optimized or calculated according to the value defined by xref (see below). value: y (according to xref) or n (automatically).
semiconductor group 186 software description sts 2060 xref abbreviation meaning: x filter attenuation at reference frequency function: indicates the value of the x filter attenuation at the reference frequency fref when xrefq = y. value: in db. zlim abbreviation meaning: z filter coefficient limit function: indicates the limit of z filter coefficient values during the automatic optimization (zauto = y). value: real value < 3.0. practical use: the variable zlim influences the precision of the quantization of the z filter coefficients. by modifying the value of zlim you can decrease the quantization error. zlim is the limit of the scale used to quantize the coefficients. the recommended value is 2. it can be set to a larger value in order to expand the scale but the actual coefficients should not be larger than 3. zsign abbreviation meaning: z filter optimization sign function: indicates whether the automatic optimization of z filter coefficients will be as far as possible from or as close as possible to the defined return loss specification zre. value: 1 (far) or C 1 (close). practical use: valid only when zauto = y.
semiconductor group 187 software description sts 2060 blim abbreviation meaning: b filter coefficient limit function: indicates the limit of b filter coefficient values during the automatic optimization (bauto = y). value: real value < 3.0. practical use: the explanation concerning the variable zlim applies to blim accordingly. bsign abbreviation meaning: b filter optimization sign function: indicates whether the automatic optimization of b filter coefficients will be as far as possible from or as close as possible to the defined transhybrid loss specification dd. value: 1 (far) or C 1 (close). practical use: valid only when bauto = y. dpre, dpof, apof, apre: when the slic has not been correctly modelled, the simulated frequency responses of the circuit sicofi-slic may greatly differ from the measured ones. the variables dpre, dpof, apof, apre introduce some fictive delays or attenuations respectively to allow the user to correct any failure in the slic model. the optimum values of these variables are obtained experimentally; the influence of these variables however can be roughly described as follows:
semiconductor group 188 software description sts 2060 positive values of the variables dpre and dpof cause a deterioration of the frequency response in the high frequency band. positive values of the variables apre and apof cause a deterioration of the frequency response in the whole speech band (see diagram below). this diagram is also valid for dpre. this diagram is also valid for apre.
semiconductor group 189 software description sts 2060 7.2 special variables in the specification file in the specification file some impedance like the input impedance z i , load impedance z l , terminating impedance z 3 and the reference impedance z r are defined. these impedances are described in terms of the equivalent circuit diagram shown in chapter 4.3 . in special cases like the british telecom it is necessary to calculate more complex impedance schemes which cannot be described using our impedance library. therefore we introduce the additional feature of reading a defined complex impedance table from a file. if the equivalent circuit of the impedance z i , z l , or z 3 is not defined in the specification file, the sicofi program searches for the keywords 'zi', 'zl' or 'z3' with an assignment of the name of an impedance file *.imp. if you want to use these complex impedances you may write a small program written in any programming language which calculates the impedance in the range of 10 hz C 4000 hz in steps of 10 hz. a listing of the specification file brd1.spe using these special variables is given below.
semiconductor group 190 software description sts 2060 7.2.1 listing of the specification file brd1.spe with special variables fref = 1014.0 law = a vref = 0.9480 rlx = 0. rlr = -7.0 abimp = zi zl = brd1.imp zi = brd1.imp z3 = brd1.imp zre fr 300 500 3k 3.4k at- 0 20 20 16 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 191 software description sts 2060 7.2.2 format of the impedance file *.imp this file contains an impedance table, which is defined in the actual specification file and may be read by the sicofi coefficients program. the impedance file has the following standard form: 1. '*' at the first position of a line means a comment that the sicofi program will not use for calculations. such lines are only for documentation purposes. 2. the sicofi program looks for the values of frequency, real part and imaginary part of the calculated impedance. * brd.spe : rp1 = 820, cp2 = 115e-09, rs = 220. * freq real imag 10.000000 1039.971000 -4.858366 20.000000 1039.885000 -9.715708 30.000000 1039.741000 -14.571000 ......... .......... .......... ......... .......... .......... 990.000000 830.084800 -357.863200 1000.000000 826.930200 -359.608800 1010.000000 823.776800 -361.317800 1020.000000 820.625100 -362.990500 ........... .......... .......... ........... .......... .......... 3980.000000 344.981800 -294.728100 3990.000000 344.451100 -294.213900 4000.000000 343.923500 -293.701000
semiconductor group 192 software description sts 2060 7.3 k-parameters it has been found that from mathematical reasons the m-parameters cannot always be used to model a slic. that happens with the ericsson slic. furthermore the m-parameters are not easy to be measured. therefore we developped the k-parameters. each k-parameter is expressed in the slic program as an algebraic equation, combination of the various slic parameters which are provided by the slic input file slic.inp. according to the values of the slic input data the slic program calculates the values of the k-parameters in function of the frequency and writes them in an output file slic.sli. the values of each k-parameter for the frequencies between 10 hz and 3990 hz in steps of 10 hz are written in a table similar to the m-parameters. the contents of these tables are used by the sicofi program instead of the m-parameter tables. the format of the k-parameter tables is shown on chapter 7.3.2 . proceeding in a similar manner as for obtaining the theoretical equation of the m-parameters, we get the k-parameters. figure 14 shows a slic with a symmetrical generator v g and a symmetrical line impedance z g . the slic can be considered as a circuit accessible through three ports. figure 14 three-port model of a slic three equations are sufficient to describe the slic completely and any linear combination of these variables is possible: let us take the following combination: (1) a1 = v 1 + z g i 1 (2) b1 = v 1 C z g i 1
semiconductor group 193 software description sts 2060 then using these new variables, the model of the slic becomes: figure 15 three-port model with the variables a1 and b1 following equations can now be written: (3) b1 = k11 a1 + k12 v 3 + k13 i 2 (4) v 2 = k21 a1 + k22 v 3 + k23 i 2 (5) i 3 = k31 a1 + k32 v 3 + k33 i 2 when the slic is connected to the sicofi, we can assume that: l i 2 = 0 because the input impedance of sicofi can be included in the model l i 3 is not relevant in the following calculations because the sicofi works as an ideal voltage generator. (in special cases the sicofi output impedance of about 10 w may be included in the slic model.) accordingly the equations system can be simplified as follows: (6) b1 = k11 a1 + k12 v 3 (7) v 2 = k21 a1 + k22 v 3 a) parameter k11: equation (6) gives k11 = b1/a1 when v 3 = 0 from (1) and (2) we can deduce: b1/a1 = ( v 1 C z g i 1 ) / ( v 1 + z g i 1 ) = ( v 1 / i 1 C z g ) / ( v 1 / i 1 + z g ) let us call z in the input impedance of the slic: z in = v 1 / i 1 therefrom k11 = (z in C z g ) / ( z in + z g )for v 3 = 0
semiconductor group 194 software description sts 2060 b) parameter k12: k12 = b1/ v 3 when a1 = 0 from (1) follows: v 1 + z g i 1 = 0 i.e. v 1 = C z g i 1 thus b1 = v 1 C z g i 1 = v 1 + v 1 then figure 16 k12 definition c) parameter k21: k21 = v 2 /a1 when v 3 = 0 in this case : a1 = v 1 + z g i 1 = v g then the equivalent circuit is the following: figure 17 k21 definition k12 = 2 v 1 / v 2 for v 1 = C z g i 1 k21 = v 2 / v g for v 3 = 0
semiconductor group 195 software description sts 2060 d) parameter k22: figure 18 k22 equivalent circuit from (1) and a1 = 0 follows: v 1 = C z g i 1 from (7) and a1 = 0 : note: 1. all these parameters are accessible by measurement with a symmetrical ground-free generator and a complex voltmeter. 2. r l = C 20 log10 (|k11|) is nothing else than the return loss of the slic without sicofi. warning: the k-parameters depend on the impedance z g and has to be recalculated for every new line impedance. k22 = v 2 / v 3 for v 1 = C z g i 1
semiconductor group 196 software description sts 2060 7.3.1 format of the k-parameter table this file represents the interface between sicofi program and slic program with k parameters. it has the following standard form: note: 1. '*' at the first position of a line means a comment that the sicofi program will not use for calculations. such lines are only for documentation purposes. 2. the sicofi program looks for the keywords 'zsli', 'k11-table', 'k12-table', 'k21- table' and 'k22-table' which have to be at first position without '*' and are followed by the values of frequency, real part and imaginary part of the actual parameter. * trafo slic * parameter : k *zgr1 = 820.0 *zgc1 = .0000 *zgr2 = .0000 *zgc2 = .1150e-06 *zgrs = 220.0 *zgcs = .0000 *z0r1 = 700.0 *z0c1 = .0000 *z0r2 = .0000 *z0c2 = .1000e-06 *z0rs = .0000 *z0cs = .0000 *erzn = 0 *exzn = 0 *rcu1 = 84.00 *rcu2 = 105.0 *cw1 = .1135e-09 *cw2 = .1354e-09 *l1 = 1.150 * l2 = 1.150 *m = 1.148 *csp = .1000e-05 * *rv = 792.0 * lv = 2.230 *cv = .2670e-08 zsli worst case half loop value .5000 freq real imag k11-table keyword 10.000000 -1.246919e-01 6.369420e-02 20.000000 -9.300768e-02 1.216179e-01 table ........... ............. ............ 3980.000000 -2.405917e-02 5.318151e-02 400 steps 3990.000000 -2.436709e-02 5.337689e-02 of 10 hz each. k12-table 10.000000 -5.142274e-03 1.191222e-04 20.000000 -2.146059e-02 1.294169e-03 ........... ............. ............ 3980.000000 1.018615 -6.256870e-02 3990.000000 1.018857 -6.285563e-02 k21-table 10.000000 -1.730312e-03 4.013790e-05 20.000000 -7.222740e-03 4.315760e-04 ........... ............. ............ 3980.000000 3.587218e-01 -1.542590e-01 3990.000000 3.584935e-01 -1.547763e-01 k22-table 10.000000 1.372118e-01 7.832120e-02 20.000000 1.578308e-01 1.551709e-01 ........... ............. ............ 3980.000000 6.382880e-01 1.535947e-01 3990.000000 6.384676e-01 1.540913e-01
semiconductor group 197 software description sts 2060 7.4 running sicofi ? calculation program in batch mode you have the possibility to run the calculation part of the sicofi coefficients program in a batch mode. instead of typing the commands for the sicofi program into the keyboard, you may store a sequence of commands in a file. a) mode.ctl file in the directory c:\sicofi there is a file called mode.ctl. in normal (default) working mode the mode.ctl file contains: batch = n in this normal mode the program is waiting for keyboard inputs and you may either start a slic program or a calculation of sicofi coefficients by using different menues. using the batch mode change batch = n in the mode.ctl file to batch = y b) batch.ctl file in the batch.ctl file you may store a sequence of commands for the sicofi calculation program. this file has to be in the current working directory. all commands of the normal calculation mode are available (commands: 1 2 3 4 5 6 7 0) except the commands 8 for help and 9 for dos. with the batch.ctl file shown below the sicofi program a) determines the sicofi coefficients for a harris slic application in non-automatic z and b filter calculation mode. b) calculates the z and b filter in an automatic calculation mode (zauto = y, bauto = y). c) stores the programming bytes in a file called test1.byt. c) makes a file result file called test1.res. d) starts a simulation of sicofi-slic transfer functions e) stores the results of the simulation in a file called test1.sim. f) makes a plot file called test1.plt. g) exits with the last command 0 of the batch.ctl file.
semiconductor group 198 software description sts 2060 listing of the batch.ctl file harris.ctl 1 3 2 zauto = y zrep = y bauto = y brep = y 3 5 test1.byt 6 test1.res 2 sim = all 1 4 6 test1.sim 2 sim = all plq = y 6 test1.plt 0 c) sicoauto.bat to start the sicofi program in batch mode there has to be a batch file e.g. sicoauto.bat in the current working directory. the contents of the sicoauto.bat file may be: if exist test1.byt del test1.byt if exist test1.res del test1.res if exist test1.sim del test1.sim if exist test1.plt del test1.plt mark sico semiconductor group 199 software description sts 2060 8 measurements and specifications 8.1 measurements for verification of sicofi ? -slic transfer functions in the simulation mode of the sicofi coefficients program (command sim) different transfer functions with sicofi filters switched on or off can be calculated. on the following pages we propose solution schemes to some of these transfer function measurements e.g: C input impedance C analog to digital path C digital to analog path C digital to digital path C digital to sicofi analog output path we use the pcm4 from wandel & goltermann as measurement system. it is further possible to verify following simulated transfer functions of the sicofi-slic system: C digital to sicofi input path via slic loop C analog to sicofi input path C analog to sicofi analog output path via z-filter loop C transfer functions of the slic itself with sicofi filters switched off. this allows to check if the calculated slic model is correct.
semiconductor group 200 software description sts 2060 figure 19 measuring the transfer function input impedance measurement of return loss with generator impedance z i on the a, b line. optionally, various combination of sicofi filters can be switched on or off. figure 20 measuring the transfer function analog C digital analog signal input using the pcm4 across the a, b lines. generator impedance z i / z 3 on the a, b line. digital return signal measurement with the pcm4 on the pcm-highway. optionally, various combinations of sicofi filters can be switched on or off.
semiconductor group 201 software description sts 2060 figure 21 measuring the transfer function digital C analog digital signal input via the pcm-highway on the pbc. analog signal measurement with the pcm4 across z i / z 3 on the a, b line. optionally, various combinations of sicofi filters can be switched on or off. figure 22 measuring the transfer function digital C digital digital signal input via the pcm-highway on the pbc. terminating impedance z l on the a, b line. return digital signal measurement with the pcm4 on the pcm-highway. optionally, vari- ous combinations of sicofi filters can be switched on or off.
semiconductor group 202 software description sts 2060 figure 23 measuring the transfer function digital C sicofi ? output digital signal input via the pcm-highway on the pbc. return analog signal measurement with the pcm4 on the sicofi output (use r x > 30 k ). terminate the a, b line with impedance z i / z 3 . optionally, various combinations of sicofi filters can be switched on or off. w
semiconductor group 203 software description sts 2060 8.2 extract of analog line card specifications valid for the "deutsche bundespost" slma specifications differ for each country. here the peculiar specifications of the "deutsche bundespost" (ftz 12 r4-3) are shown. the following masks are drawn: C return loss C balance return loss C attenuation distortion in transmit direction (analog ? digital) C attenuation distortion in receive direction (digital ? analog)
semiconductor group 204 software description sts 2060 figure 24 return loss a r figure 25 balance return loss a f
semiconductor group 205 software description sts 2060 figure 26 attenuation distortion in transmit direction 2-wire analog ? digital figure 27 attenuation distortion in receive direction digital ? 2-wire analog
semiconductor group 206 software description sts 2060 9 appendix 9.1 new features in sicofi ? software version 3.0 C program is faster and more user friendly C easy to install sicofi software on a pc with a separate setup program C menu driven program surface C access to different help files (command help) for calculating sicofi coefficients and slic transfer functions. the user can scroll the text contained in different help files. C slic calculation may be started without leaving sicofi program C dos commands are available from program level (command dos) C possibility of starting other small programs (command dos) C rs232 for programming of sicofi testboard is provided C extended simulation mode (input impedance, ) C extra impedance input files covered for input impedance z i , terminating impedance z 3 and load impedance z l C sicofi program may be run in batch mode C new features of sicofi version v 4.x available, like analog amplification agx, digital amplification tm3 in transmit path and attenuation agr in receive path changes with respect to sicofi software version 2.0: C specification file *.spe has been modified with respect to the definition of input impedance z i , load impedance z l , impedance z 3 , reference impedance z r , reference voltage v ref and return loss specification z in . same naming conventions for impedance z i , z l , z 3 and z r . new variable previous function v ref z re z irp1 z icp1 z irp2 z icp2 z irs z ics v ref z in r par -- -- c par r ser c ser voltage reference of the 0 dbr level z-filter returnloss specification input impedance z i was defined together with erzi.
semiconductor group 207 software description sts 2060 C variables in sicofi control file *.ctl of sts 2060 version 3.0 have been modified: note: do not use specification files or sicofi control files of sicofi software version v2.0. the former versions of slic.inp together with slic.exe, however, and earlier result files slic.sli could still be used. 0.590 1.07031250 1 3 1 0 C1 3 C1 1 30 b9 0.527 1.06250000 1 2 1 0 C1 2 C1 0 20 a8 0.462 1.05468750 1 3 1 0 1 3 C1 1 30 39 0.398 1.04687500 1 3 1 0 1 2 C1 1 30 29 0.333 1.03906250 1 4 1 0 1 1 C1 2 40 1a 0.267 1.03125000 1 3 1 0 1 1 C1 1 30 19 0.201 1.02343750 1 4 1 0 1 2 C1 1 40 29 0.135 1.01562500 C1 3 1 0 1 3 C1 0 b0 38 0.068 1.00781250 1 3 1 0 C1 4 C1 0 30 c8 0.000 1.00000000 1 0 1 1 C1 0 1 0 01 80 new variable previous function zauto bauto fzp fbp xdisp rdisp bdf agx agr tm3 pzin = 0 pb = 0 fz fb xfil rfil tbm -- -- -- automatic calculation of z filter automatic calculation of b filter frequency points for z filter calculation in non-auto- matic optimization mode frequency points for b filter calculation in non-auto- matic optimization mode x filter frequency response display r filter frequency response display b delay filter analog gain control transmit path analog gain control receive path test mode of sicofi v 4.x: additional gain in transmit path
semiconductor group 208 software description sts 2060 9.2 gain tables for programming transmit gx table of gain values for programming transmit gx of sicofi v3.x. values from +12 db 0 db 12.041 4.00000000 1 0 1 0 1 0 1 0 00 00 10.881 3.50000000 1 0 1 0 1 1 1 0 00 10 10.238 3.25000000 1 0 1 0 1 2 1 0 00 20 9.897 3.12500000 1 0 1 0 1 3 1 0 00 30 9.722 3.06250000 1 0 1 0 1 4 1 0 00 40 9.632 3.03125000 1 0 1 0 1 5 1 0 00 50 9.588 3.01562500 1 0 1 0 1 6 1 0 00 60 9.542 3.00000000 1 0 1 0 1 0 1 1 00 01 9.497 2.98437500 1 0 1 0 C1 6 1 0 00 e0 9.451 2.96875000 1 0 1 0 C1 5 1 0 00 d0 9.360 2.93750000 1 0 1 0 C1 4 1 0 00 c0 9.173 2.87500000 1 0 1 0 C1 3 1 0 00 b0 8.787 2.75000000 1 0 1 0 1 1 1 1 00 11 8.383 2.62500000 1 0 1 0 1 2 1 1 00 21 8.173 2.56250000 1 0 1 0 1 3 1 1 00 31 8.067 2.53125000 1 0 1 0 1 4 1 1 00 41 8.013 2.51562500 1 0 1 0 1 5 1 1 00 51 7.959 2.50000000 1 0 1 0 C1 1 1 0 00 90 7.904 2.48437500 1 0 1 0 C1 5 1 1 00 d1 7.850 2.46875000 1 0 1 0 C1 4 1 1 00 c1 7.739 2.43750000 1 0 1 0 C1 3 1 1 00 b1 7.513 2.37500000 1 0 1 0 1 1 1 2 00 12 7.282 2.31250000 1 0 1 0 1 2 1 2 00 22 7.163 2.28125000 1 0 1 0 1 3 1 2 00 32 7.104 2.26562500 1 0 1 0 1 4 1 2 00 42 7.059 2.25390625 1 0 1 0 1 6 1 2 00 62 7.044 2.25000000 1 0 1 0 C1 1 1 1 00 91 6.922 2.21875000 1 0 1 0 C1 3 1 2 00 b2 6.799 2.18750000 1 0 1 0 1 1 1 3 00 13 6.674 2.15625000 1 0 1 0 1 2 1 3 00 23 6.611 2.14062500 1 0 1 0 1 3 1 3 00 33 6.579 2.13281250 1 0 1 0 1 4 1 3 00 43 6.547 2.12500000 1 0 1 0 C1 1 1 2 00 92 6.483 2.10937500 1 0 1 0 C1 3 1 3 00 b3 6.418 2.09375000 1 0 1 0 C1 2 1 3 00 a3 6.353 2.07812500 1 0 1 0 1 2 1 4 00 24 6.321 2.07031250 1 0 1 0 1 3 1 4 00 34 6.288 2.06250000 1 0 1 0 C1 1 1 3 00 93 6.222 2.04687500 1 0 1 0 C1 2 1 4 00 a4 6.155 2.03125000 1 0 1 0 C1 1 1 4 00 94 6.088 2.01562500 1 0 1 0 C1 1 1 5 00 95 6.021 2.00000000 1 0 1 0 C1 0 1 0 00 80 5.952 1.98437500 1 1 1 0 C1 5 1 0 10 d0 5.884 1.96875000 1 0 1 0 C1 1 C1 4 00 9c 5.815 1.95312500 1 0 1 0 C1 2 C1 4 00 ac 5.745 1.93750000 1 0 1 0 C1 1 C1 3 00 9b a = { [ ( v 1 * 2 Ck1 +1) * v 2 * 2 Ck2 +1 ] * v 3 * 2 Ck3 +1 } * v 4 * 2 Ck4 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex
semiconductor group 209 software description sts 2060 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex 5.675 1.92187500 1 0 1 0 1 2 -1 4 00 2c 5.604 1.90625000 1 0 1 0 C1 2 C1 3 00 ab 5.532 1.89062500 1 0 1 0 C1 3 C1 3 00 bb 5.460 1.87500000 1 1 1 0 1 1 1 1 10 11 5.424 1.86718750 1 0 1 0 1 4 C1 3 00 4b 5.387 1.85937500 1 0 1 0 1 3 C1 3 00 3b 5.314 1.84375000 1 0 1 0 1 2 C1 3 00 2b 5.166 1.81250000 1 1 1 0 1 2 1 1 10 21 5.014 1.78125000 1 1 1 0 1 3 1 1 10 31 4.938 1.76562500 1 1 1 0 1 4 1 1 10 41 4.861 1.75000000 1 1 1 0 C1 1 1 0 10 90 4.822 1.74218750 1 1 1 0 C1 5 1 1 10 d1 4.783 1.73437500 1 1 1 0 C1 4 1 1 10 c1 4.704 1.71875000 1 1 1 0 C1 3 1 1 10 b1 4.545 1.68750000 1 1 1 0 C1 2 1 1 10 a1 4.383 1.65625000 1 1 1 0 1 2 1 2 10 22 4.300 1.64062500 1 1 1 0 1 3 1 2 10 32 4.259 1.63281250 1 1 1 0 1 4 1 2 10 42 4.217 1.62500000 1 1 1 0 C1 1 1 1 10 91 4.133 1.60937500 1 1 1 0 C1 3 1 2 10 b2 4.048 1.59375000 1 1 1 0 1 1 1 3 10 13 3.963 1.57812500 1 1 1 0 1 2 1 3 10 23 3.920 1.57031250 1 1 1 0 1 3 1 3 10 33 3.876 1.56250000 1 1 1 0 C1 1 1 2 10 92 3.833 1.55468750 1 1 1 0 C1 3 1 3 10 b3 3.789 1.54687500 1 1 1 0 1 1 1 4 10 14 3.745 1.53906250 1 1 1 0 1 2 1 4 10 24 3.701 1.53125000 1 1 1 0 C1 1 1 3 10 93 3.656 1.52343750 1 1 1 0 1 1 1 5 10 15 3.612 1.51562500 1 1 1 0 C1 1 1 4 10 94 3.567 1.50781250 1 1 1 0 C1 1 1 5 10 95 3.522 1.50000000 C1 0 1 0 1 1 C1 0 80 18 3.476 1.49218750 1 2 1 0 C1 5 1 0 20 d0 3.431 1.48437500 1 1 1 0 C1 1 C1 4 10 9c 3.385 1.47656250 1 1 1 0 1 1 C1 5 10 1d 3.339 1.46875000 1 1 1 0 C1 1 C1 3 10 9b 3.293 1.46093750 1 1 1 0 1 2 C1 4 10 2c 3.246 1.45312500 1 1 1 0 1 1 C1 4 10 1c 3.199 1.44531250 1 1 1 0 C1 3 C1 3 10 bb 3.152 1.43750000 1 1 1 0 C1 1 C1 2 10 9a 3.105 1.42968750 1 1 1 0 1 3 C1 3 10 3b 3.057 1.42187500 1 1 1 0 1 2 C1 3 10 2b 2.961 1.40625000 1 2 1 0 1 2 1 1 20 21 2.864 1.39062500 1 2 1 0 1 3 1 1 20 31 2.815 1.38281250 1 2 1 0 1 4 1 1 20 41 2.766 1.37500000 1 1 1 0 C1 1 C1 1 10 99 2.717 1.36718750 1 2 1 0 C1 4 1 1 20 c1 2.667 1.35937500 1 2 1 0 C1 3 1 1 20 b1 2.566 1.34375000 1 2 1 0 1 1 1 2 20 12 2.465 1.32812500 1 2 1 0 1 2 1 2 20 22 2.414 1.32031250 1 2 1 0 1 3 1 2 20 32 2.362 1.31250000 1 2 1 0 C1 1 1 1 20 91 2.310 1.30468750 1 2 1 0 C1 3 1 2 20 b2 2.258 1.29687500 1 2 1 0 C1 2 1 2 20 a2 2.205 1.28906250 1 2 1 0 1 2 1 3 20 23
semiconductor group 210 software description sts 2060 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex 2.153 1.28125000 1 2 1 0 C1 1 1 2 20 92 2.100 1.27343750 1 2 1 0 C1 2 1 3 20 a3 2.046 1.26562500 1 2 1 0 C1 1 1 3 20 93 1.992 1.25781250 1 2 1 0 C1 1 1 4 20 94 1.938 1.25000000 C1 1 1 0 1 1 C1 0 90 18 1.884 1.24218750 1 2 1 0 C1 1 C1 4 20 9c 1.829 1.23437500 1 2 1 0 C1 1 C1 3 20 9b 1.774 1.22656250 1 2 1 0 C1 2 C1 3 20 ab 1.718 1.21875000 1 2 1 0 C1 1 C1 2 20 9a 1.662 1.21093750 1 2 1 0 1 2 C1 3 20 2b 1.606 1.20312500 1 2 1 0 C1 2 C1 2 20 aa 1.550 1.19531250 1 2 1 0 C1 3 C1 2 20 ba 1.493 1.18750000 1 2 1 0 C1 1 C1 1 20 99 1.435 1.17968750 1 2 1 0 1 3 C1 2 20 3a 1.378 1.17187500 1 3 1 0 1 1 1 2 30 12 1.320 1.16406250 1 3 1 0 1 2 1 2 30 22 1.261 1.15625000 1 2 1 0 1 1 C1 2 20 1a 1.202 1.14843750 1 3 1 0 C1 2 1 2 30 a2 1.143 1.14062500 1 3 1 0 C1 1 1 2 30 92 1.083 1.13281250 1 3 1 0 C1 1 1 3 30 93 1.023 1.12500000 1 1 1 0 1 1 C1 1 10 19 0.963 1.11718750 1 3 1 0 C1 1 C1 3 30 9b 0.902 1.10937500 1 3 1 0 C1 1 C1 2 30 9a 0.840 1.10156250 1 4 1 0 1 2 1 1 40 21 0.778 1.09375000 1 2 1 0 1 2 C1 1 20 29 0.716 1.08593750 1 3 1 0 1 2 C1 2 30 2a 0.653 1.07812500 1 3 1 0 1 1 C1 2 30 1a 0.590 1.07031250 1 3 1 0 C1 3 C1 1 30 b9 0.527 1.06250000 1 2 1 0 C1 2 C1 0 20 a8 0.462 1.05468750 1 3 1 0 1 3 C1 1 30 39 0.398 1.04687500 1 3 1 0 1 2 C1 1 30 29 0.333 1.03906250 1 4 1 0 1 1 C1 2 40 1a 0.267 1.03125000 1 3 1 0 1 1 C1 1 30 19 0.201 1.02343750 1 4 1 0 1 2 C1 1 40 29 0.135 1.01562500 C1 3 1 0 1 3 C1 0 b0 38 0.068 1.00781250 1 3 1 0 C1 4 C1 0 30 c8 0.000 1.00000000 1 0 1 1 C1 0 1 0 01 80
semiconductor group 211 software description sts 2060 table of gain values for programming transmit gx of sicofi v4.x. values from +18 db 0 db date: 1.02.89 18.063 8.000 1 0 1 0 C1 0 1 0 00 80 011 17.994 7.938 1 1 1 0 C1 5 1 0 10 d0 011 17.926 7.875 1 0 1 0 C1 1 C1 4 00 9c 011 17.857 7.813 1 0 1 0 C1 2 C1 4 00 ac 011 17.787 7.750 1 0 1 0 C1 1 C1 3 00 9b 011 17.717 7.688 1 0 1 0 1 2 C1 4 00 2c 011 17.646 7.625 1 0 1 0 C1 2 C1 3 00 ab 011 17.574 7.563 1 0 1 0 C1 3 C1 3 00 bb 011 17.502 7.500 1 1 1 0 1 1 1 1 10 11 011 17.466 7.469 1 0 1 0 1 4 C1 3 00 4b 011 17.429 7.438 1 0 1 0 1 3 C1 3 00 3b 011 17.356 7.375 1 0 1 0 1 2 C1 3 00 2b 011 17.208 7.250 1 1 1 0 1 2 1 1 10 21 011 17.056 7.125 1 1 1 0 1 3 1 1 10 31 011 16.980 7.063 1 1 1 0 1 4 1 1 10 41 011 16.903 7.000 1 1 1 0 C1 1 1 0 10 90 011 16.864 6.969 1 1 1 0 C1 5 1 1 10 d1 011 16.825 6.938 1 1 1 0 C1 4 1 1 10 c1 011 16.746 6.875 1 1 1 0 C1 3 1 1 10 b1 011 16.587 6.750 1 1 1 0 C1 2 1 1 10 a1 011 16.425 6.625 1 1 1 0 1 2 1 2 10 22 011 16.342 6.563 1 1 1 0 1 3 1 2 10 32 011 16.301 6.531 1 1 1 0 1 4 1 2 10 42 011 16.259 6.500 1 1 1 0 C1 1 1 1 10 91 011 16.175 6.438 1 1 1 0 C1 3 1 2 10 b2 011 16.090 6.375 1 1 1 0 1 1 1 3 10 13 011 16.005 6.313 1 1 1 0 1 2 1 3 10 23 011 15.962 6.281 1 1 1 0 1 3 1 3 10 33 011 15.918 6.250 1 1 1 0 C1 1 1 2 10 92 011 15.875 6.219 1 1 1 0 C1 3 1 3 10 b3 011 15.831 6.188 1 1 1 0 1 1 1 4 10 14 011 15.787 6.156 1 1 1 0 1 2 1 4 10 24 011 15.743 6.125 1 1 1 0 C1 1 1 3 10 93 011 15.698 6.094 1 1 1 0 1 1 1 5 10 15 011 15.654 6.063 1 1 1 0 C1 1 1 4 10 94 011 15.609 6.031 1 1 1 0 C1 1 1 5 10 95 011 15.564 6.000 C1 0 1 0 1 1 C1 0 80 18 011 15.518 5.969 1 2 1 0 C1 5 1 0 20 d0 011 15.473 5.938 1 1 1 0 C1 1 C1 4 10 9c 011 15.427 5.906 1 1 1 0 1 1 C1 5 10 1d 011 15.381 5.875 1 1 1 0 C1 1 C1 3 10 9b 011 15.335 5.844 1 1 1 0 1 2 C1 4 10 2c 011 15.288 5.813 1 1 1 0 1 1 C1 4 10 1c 011 a = { [ ( v 1 * 2 Ck1 +1) * v 2 * 2 Ck2 +1 ] * v 3 * 2 Ck3 +1 } * v 4 * 2 Ck4 gx = a if tm3 = 000 gx = 2.* a if tm3 = 001 gx = 4.* a if tm3 = 011 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3
semiconductor group 212 software description sts 2060 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3 15.241 5.781 1 1 1 0 C1 3 C1 3 10 bb 011 15.194 5.750 1 1 1 0 C1 1 C1 2 10 9a 011 15.147 5.719 1 1 1 0 1 3 C1 3 10 3b 011 15.099 5.688 1 1 1 0 1 2 C1 3 10 2b 011 15.003 5.625 1 2 1 0 1 2 1 1 20 21 011 14.906 5.563 1 2 1 0 1 3 1 1 20 31 011 14.857 5.531 1 2 1 0 1 4 1 1 20 41 011 14.808 5.500 1 1 1 0 C1 1 C1 1 10 99 011 14.759 5.469 1 2 1 0 C1 4 1 1 20 c1 011 14.709 5.438 1 2 1 0 C1 3 1 1 20 b1 011 14.608 5.375 1 2 1 0 1 1 1 2 20 12 011 14.507 5.313 1 2 1 0 1 2 1 2 20 22 011 14.456 5.281 1 2 1 0 1 3 1 2 20 32 011 14.404 5.250 1 2 1 0 C1 1 1 1 20 91 011 14.352 5.219 1 2 1 0 C1 3 1 2 20 b2 011 14.300 5.188 1 2 1 0 C1 2 1 2 20 a2 011 14.247 5.156 1 2 1 0 1 2 1 3 20 23 011 14.195 5.125 1 2 1 0 C1 1 1 2 20 92 011 14.142 5.094 1 2 1 0 C1 2 1 3 20 a3 011 14.088 5.063 1 2 1 0 C1 1 1 3 20 93 011 14.034 5.031 1 2 1 0 C1 1 1 4 20 94 011 13.980 5.000 C1 1 1 0 1 1 C1 0 90 18 011 13.926 4.969 1 2 1 0 C1 1 C1 4 20 9c 011 13.871 4.938 1 2 1 0 C1 1 C1 3 20 9b 011 13.816 4.906 1 2 1 0 C1 2 C1 3 20 ab 011 13.760 4.875 1 2 1 0 C1 1 C1 2 20 9a 011 13.704 4.844 1 2 1 0 1 2 C1 3 20 2b 011 13.648 4.813 1 2 1 0 C1 2 C1 2 20 aa 011 13.592 4.781 1 2 1 0 C1 3 C1 2 20 ba 011 13.535 4.750 1 2 1 0 C1 1 C1 1 20 99 011 13.477 4.719 1 2 1 0 1 3 C1 2 20 3a 011 13.420 4.688 1 3 1 0 1 1 1 2 30 12 011 13.362 4.656 1 3 1 0 1 2 1 2 30 22 011 13.303 4.625 1 2 1 0 1 1 C1 2 20 1a 011 13.244 4.594 1 3 1 0 C1 2 1 2 30 a2 011 13.185 4.563 1 3 1 0 C1 1 1 2 30 92 011 13.125 4.531 1 3 1 0 C1 1 1 3 30 93 011 13.065 4.500 1 1 1 0 1 1 C1 1 10 19 011 13.005 4.469 1 3 1 0 C1 1 C1 3 30 9b 011 12.944 4.438 1 3 1 0 C1 1 C1 2 30 9a 011 12.882 4.406 1 4 1 0 1 2 1 1 40 21 011 12.820 4.375 1 2 1 0 1 2 C1 1 20 29 011 12.758 4.344 1 3 1 0 1 2 C1 2 30 2a 011 12.695 4.313 1 3 1 0 1 1 C1 2 30 1a 011 12.632 4.281 1 3 1 0 C1 3 C1 1 30 b9 011 12.569 4.250 1 2 1 0 C1 2 C1 0 20 a8 011 12.504 4.219 1 3 1 0 1 3 C1 1 30 39 011 12.440 4.188 1 3 1 0 1 2 C1 1 30 29 011 12.375 4.156 1 4 1 0 1 1 C1 2 40 1a 011 12.309 4.125 1 3 1 0 1 1 C1 1 30 19 011 12.243 4.094 1 4 1 0 1 2 C1 1 40 29 011 12.177 4.063 C1 3 1 0 1 3 C1 0 b0 38 011 12.110 4.031 1 3 1 0 C1 4 C1 0 30 c8 011 12.042 4.000 1 0 1 0 C1 0 1 0 00 80 001 11.973 3.969 1 1 1 0 C1 5 1 0 10 d0 001
semiconductor group 213 software description sts 2060 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3 11.905 3.938 1 0 1 0 C1 1 C1 4 00 9c 001 11.836 3.906 1 0 1 0 C1 2 C1 4 00 ac 001 11.766 3.875 1 0 1 0 C1 1 C1 3 00 9b 001 11.696 3.844 1 0 1 0 1 2 C1 4 00 2c 001 11.625 3.813 1 0 1 0 C1 2 C1 3 00 ab 001 11.553 3.781 1 0 1 0 C1 3 C1 3 00 bb 001 11.481 3.750 1 1 1 0 1 1 1 1 10 11 001 11.445 3.734 1 0 1 0 1 4 C1 3 00 4b 001 11.408 3.719 1 0 1 0 1 3 C1 3 00 3b 001 11.335 3.688 1 0 1 0 1 2 C1 3 00 2b 001 11.187 3.625 1 1 1 0 1 2 1 1 10 21 001 11.035 3.563 1 1 1 0 1 3 1 1 10 31 001 10.959 3.531 1 1 1 0 1 4 1 1 10 41 001 10.882 3.500 1 1 1 0 C1 1 1 0 10 90 001 10.843 3.484 1 1 1 0 C1 5 1 1 10 d1 001 10.804 3.469 1 1 1 0 C1 4 1 1 10 c1 001 10.725 3.438 1 1 1 0 C1 3 1 1 10 b1 001 10.566 3.375 1 1 1 0 C1 2 1 1 10 a1 001 10.404 3.313 1 1 1 0 1 2 1 2 10 22 001 10.321 3.281 1 1 1 0 1 3 1 2 10 32 001 10.280 3.266 1 1 1 0 1 4 1 2 10 42 001 10.238 3.250 1 1 1 0 C1 1 1 1 10 91 001 10.154 3.219 1 1 1 0 C1 3 1 2 10 b2 001 10.069 3.188 1 1 1 0 1 1 1 3 10 13 001 9.984 3.156 1 1 1 0 1 2 1 3 10 23 001 9.941 3.141 1 1 1 0 1 3 1 3 10 33 001 9.897 3.125 1 1 1 0 C1 1 1 2 10 92 001 9.854 3.109 1 1 1 0 C1 3 1 3 10 b3 001 9.810 3.094 1 1 1 0 1 1 1 4 10 14 001 9.766 3.078 1 1 1 0 1 2 1 4 10 24 001 9.722 3.063 1 1 1 0 C1 1 1 3 10 93 001 9.677 3.047 1 1 1 0 1 1 1 5 10 15 001 9.633 3.031 1 1 1 0 C1 1 1 4 10 94 001 9.588 3.016 1 1 1 0 C1 1 1 5 10 95 001 9.543 3.000 C1 0 1 0 1 1 C1 0 80 18 001 9.497 2.984 1 2 1 0 C1 5 1 0 20 d0 001 9.452 2.969 1 1 1 0 C1 1 C1 4 10 9c 001 9.406 2.953 1 1 1 0 1 1 C1 5 10 1d 001 9.360 2.938 1 1 1 0 C1 1 C1 3 10 9b 001 9.314 2.922 1 1 1 0 1 2 C1 4 10 2c 001 9.267 2.906 1 1 1 0 1 1 C1 4 10 1c 001 9.220 2.891 1 1 1 0 C1 3 C1 3 10 bb 001 9.173 2.875 1 1 1 0 C1 1 C1 2 10 9a 001 9.126 2.859 1 1 1 0 1 3 C1 3 10 3b 001 9.078 2.844 1 1 1 0 1 2 C1 3 10 2b 001 8.982 2.813 1 2 1 0 1 2 1 1 20 21 001 8.885 2.781 1 2 1 0 1 3 1 1 20 31 001 8.836 2.766 1 2 1 0 1 4 1 1 20 41 001 8.787 2.750 1 1 1 0 C1 1 C1 1 10 99 001 8.738 2.734 1 2 1 0 C1 4 1 1 20 c1 001 8.688 2.719 1 2 1 0 C1 3 1 1 20 b1 001 8.587 2.688 1 2 1 0 1 1 1 2 20 12 001 8.486 2.656 1 2 1 0 1 2 1 2 20 22 001 8.435 2.641 1 2 1 0 1 3 1 2 20 32 001 8.383 2.625 1 2 1 0 C1 1 1 1 20 91 001
semiconductor group 214 software description sts 2060 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3 8.331 2.609 1 2 1 0 C1 3 1 2 20 b2 001 8.279 2.594 1 2 1 0 C1 2 1 2 20 a2 001 8.226 2.578 1 2 1 0 1 2 1 3 20 23 001 8.174 2.563 1 2 1 0 C1 1 1 2 20 92 001 8.121 2.547 1 2 1 0 C1 2 1 3 20 a3 001 8.067 2.531 1 2 1 0 C1 1 1 3 20 93 001 8.013 2.516 1 2 1 0 C1 1 1 4 20 94 001 7.959 2.500 C1 1 1 0 1 1 C1 0 90 18 001 7.905 2.484 1 2 1 0 C1 1 C1 4 20 9c 001 7.850 2.469 1 2 1 0 C1 1 C1 3 20 9b 001 7.795 2.453 1 2 1 0 C1 2 C1 3 20 ab 001 7.739 2.438 1 2 1 0 C1 1 C1 2 20 9a 001 7.683 2.422 1 2 1 0 1 2 C1 3 20 2b 001 7.627 2.406 1 2 1 0 C1 2 C1 2 20 aa 001 7.571 2.391 1 2 1 0 C1 3 C1 2 20 ba 001 7.514 2.375 1 2 1 0 C1 1 C1 1 20 99 001 7.456 2.359 1 2 1 0 1 3 C1 2 20 3a 001 7.399 2.344 1 3 1 0 1 1 1 2 30 12 001 7.341 2.328 1 3 1 0 1 2 1 2 30 22 001 7.282 2.313 1 2 1 0 1 1 C1 2 20 1a 001 7.223 2.297 1 3 1 0 C1 2 1 2 30 a2 001 7.164 2.281 1 3 1 0 C1 1 1 2 30 92 001 7.104 2.266 1 3 1 0 C1 1 1 3 30 93 001 7.044 2.250 1 1 1 0 1 1 C1 1 10 19 001 6.984 2.234 1 3 1 0 C1 1 C1 3 30 9b 001 6.923 2.219 1 3 1 0 C1 1 C1 2 30 9a 001 6.861 2.203 1 4 1 0 1 2 1 1 40 21 001 6.799 2.188 1 2 1 0 1 2 C1 1 20 29 001 6.737 2.172 1 3 1 0 1 2 C1 2 30 2a 001 6.674 2.156 1 3 1 0 1 1 C1 2 30 1a 001 6.611 2.141 1 3 1 0 C1 3 C1 1 30 b9 001 6.548 2.125 1 2 1 0 C1 2 C1 0 20 a8 001 6.483 2.109 1 3 1 0 1 3 C1 1 30 39 001 6.419 2.094 1 3 1 0 1 2 C1 1 30 29 001 6.354 2.078 1 4 1 0 1 1 C1 2 40 1a 001 6.288 2.063 1 3 1 0 1 1 C1 1 30 19 001 6.222 2.047 1 4 1 0 1 2 C1 1 40 29 001 6.156 2.031 C1 3 1 0 1 3 C1 0 b0 38 001 6.089 2.016 1 3 1 0 C1 4 C1 0 30 c8 001 6.021 2.000 1 0 1 0 C1 0 1 0 00 80 000 5.952 1.984 1 1 1 0 C1 5 1 0 10 d0 000 5.884 1.969 1 0 1 0 C1 1 C1 4 00 9c 000 5.815 1.953 1 0 1 0 C1 2 C1 4 00 ac 000 5.745 1.938 1 0 1 0 C1 1 C1 3 00 9b 000 5.675 1.922 1 0 1 0 1 2 C1 4 00 2c 000 5.604 1.906 1 0 1 0 C1 2 C1 3 00 ab 000 5.532 1.891 1 0 1 0 C1 3 C1 3 00 bb 000 5.460 1.875 1 1 1 0 1 1 1 1 10 11 000 5.424 1.867 1 0 1 0 1 4 C1 3 00 4b 000 5.387 1.859 1 0 1 0 1 3 C1 3 00 3b 000 5.314 1.844 1 0 1 0 1 2 C1 3 00 2b 000 5.166 1.813 1 1 1 0 1 2 1 1 10 21 000 5.014 1.781 1 1 1 0 1 3 1 1 10 31 000 4.938 1.766 1 1 1 0 1 4 1 1 10 41 000 4.861 1.750 1 1 1 0 C1 1 1 0 10 90 000
semiconductor group 215 software description sts 2060 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3 4.822 1.742 1 1 1 0 C1 5 1 1 10 d1 000 4.783 1.734 1 1 1 0 C1 4 1 1 10 c1 000 4.704 1.719 1 1 1 0 C1 3 1 1 10 b1 000 4.545 1.688 1 1 1 0 C1 2 1 1 10 a1 000 4.383 1.656 1 1 1 0 1 2 1 2 10 22 000 4.300 1.641 1 1 1 0 1 3 1 2 10 32 000 4.259 1.633 1 1 1 0 1 4 1 2 10 42 000 4.217 1.625 1 1 1 0 C1 1 1 1 10 91 000 4.133 1.609 1 1 1 0 C1 3 1 2 10 b2 000 4.048 1.594 1 1 1 0 1 1 1 3 10 13 000 3.963 1.578 1 1 1 0 1 2 1 3 10 23 000 3.920 1.570 1 1 1 0 1 3 1 3 10 33 000 3.876 1.563 1 1 1 0 C1 1 1 2 10 92 000 3.833 1.555 1 1 1 0 C1 3 1 3 10 b3 000 3.789 1.547 1 1 1 0 1 1 1 4 10 14 000 3.745 1.539 1 1 1 0 1 2 1 4 10 24 000 3.701 1.531 1 1 1 0 C1 1 1 3 10 93 000 3.656 1.523 1 1 1 0 1 1 1 5 10 15 000 3.612 1.516 1 1 1 0 C1 1 1 4 10 94 000 3.567 1.508 1 1 1 0 C1 1 1 5 10 95 000 3.522 1.500 C1 0 1 0 1 1 C1 0 80 18 000 3.476 1.492 1 2 1 0 C1 5 1 0 20 d0 000 3.431 1.484 1 1 1 0 C1 1 C1 4 10 9c 000 3.385 1.477 1 1 1 0 1 1 C1 5 10 1d 000 3.339 1.469 1 1 1 0 C1 1 C1 3 10 9b 000 3.293 1.461 1 1 1 0 1 2 C1 4 10 2c 000 3.246 1.453 1 1 1 0 1 1 C1 4 10 1c 000 3.199 1.445 1 1 1 0 C1 3 C1 3 10 bb 000 3.152 1.438 1 1 1 0 C1 1 C1 2 10 9a 000 3.105 1.430 1 1 1 0 1 3 C1 3 10 3b 000 3.057 1.422 1 1 1 0 1 2 C1 3 10 2b 000 2.961 1.406 1 2 1 0 1 2 1 1 20 21 000 2.864 1.391 1 2 1 0 1 3 1 1 20 31 000 2.815 1.383 1 2 1 0 1 4 1 1 20 41 000 2.766 1.375 1 1 1 0 C1 1 C1 1 10 99 000 2.717 1.367 1 2 1 0 C1 4 1 1 20 c1 000 2.667 1.359 1 2 1 0 C1 3 1 1 20 b1 000 2.566 1.344 1 2 1 0 1 1 1 2 20 12 000 2.465 1.328 1 2 1 0 1 2 1 2 20 22 000 2.414 1.320 1 2 1 0 1 3 1 2 20 32 000 2.362 1.313 1 2 1 0 C1 1 1 1 20 91 000 2.310 1.305 1 2 1 0 C1 3 1 2 20 b2 000 2.258 1.297 1 2 1 0 C1 2 1 2 20 a2 000 2.205 1.289 1 2 1 0 1 2 1 3 20 23 000 2.153 1.281 1 2 1 0 C1 1 1 2 20 92 000 2.100 1.273 1 2 1 0 C1 2 1 3 20 a3 000 2.046 1.266 1 2 1 0 C1 1 1 3 20 93 000 1.992 1.258 1 2 1 0 C1 1 1 4 20 94 000 1.938 1.250 C1 1 1 0 1 1 C1 0 90 18 000 1.884 1.242 1 2 1 0 C1 1 C1 4 20 9c 000 1.829 1.234 1 2 1 0 C1 1 C1 3 20 9b 000 1.774 1.227 1 2 1 0 C1 2 C1 3 20 ab 000 1.718 1.219 1 2 1 0 C1 1 C1 2 20 9a 000 1.662 1.211 1 2 1 0 1 2 C1 3 20 2b 000 1.606 1.203 1 2 1 0 C1 2 C1 2 20 aa 000
semiconductor group 216 software description sts 2060 (db) gx v3, k3 v4, k4 v1, k1 v2, k2 hex tm3 1.550 1.195 1 2 1 0 C1 3 C1 2 20 ba 000 1.493 1.188 1 2 1 0 C1 1 C1 1 20 99 000 1.435 1.180 1 2 1 0 1 3 C1 2 20 3a 000 1.378 1.172 1 3 1 0 1 1 1 2 30 12 000 1.320 1.164 1 3 1 0 1 2 1 2 30 22 000 1.261 1.156 1 2 1 0 1 1 C1 2 20 1a 000 1.202 1.148 1 3 1 0 C1 2 1 2 30 a2 000 1.143 1.141 1 3 1 0 C1 1 1 2 30 92 000 1.083 1.133 1 3 1 0 C1 1 1 3 30 93 000 1.023 1.125 1 1 1 0 1 1 C1 1 10 19 000 .963 1.117 1 3 1 0 C1 1 C1 3 30 9b 000 .902 1.109 1 3 1 0 C1 1 C1 2 30 9a 000 .840 1.102 1 4 1 0 1 2 1 1 40 21 000 .778 1.094 1 2 1 0 1 2 C1 1 20 29 000 .716 1.086 1 3 1 0 1 2 C1 2 30 2a 000 .653 1.078 1 3 1 0 1 1 C1 2 30 1a 000 .590 1.070 1 3 1 0 C1 3 C1 1 30 b9 000 .527 1.063 1 2 1 0 C1 2 C1 0 20 a8 000 .462 1.055 1 3 1 0 1 3 C1 1 30 39 000 .398 1.047 1 3 1 0 1 2 C1 1 30 29 000 .333 1.039 1 4 1 0 1 1 C1 2 40 1a 000 .267 1.031 1 3 1 0 1 1 C1 1 30 19 000 .201 1.023 1 4 1 0 1 2 C1 1 40 29 000 .135 1.016 C1 3 1 0 1 3 C1 0 b0 38 000 .068 1.008 1 3 1 0 C1 4 C1 0 30 c8 000 .000 1.000 1 0 1 1 C1 0 1 0 01 80 000
semiconductor group 217 software description sts 2060 9.3 gain tables for programming transmit gr table of attenuation values for programing receive gr in sicofi. values from 0 db C12 db 0.000 1.000000000 1 0 1 1 C1 0 1 0 01 80 C0.034 0.996093750 1 4 1 0 1 4 C1 0 40 48 C0.068 0.992187500 1 4 1 0 1 3 C1 0 40 38 C0.137 0.984375000 C1 0 C1 0 C1 6 1 0 88 e0 C0.206 0.976562500 C1 4 1 0 1 2 C1 1 c0 29 C0.276 0.968750000 C1 0 C1 0 C1 5 1 0 88 d0 C0.346 0.960937500 C1 4 1 0 1 1 C1 2 c0 1a C0.417 0.953125000 C1 3 1 0 1 2 C1 1 b0 29 C0.488 0.945312500 C1 3 1 0 1 3 C1 1 b0 39 C0.561 0.937500000 1 1 1 1 1 1 1 1 11 11 C0.633 0.929687500 1 0 1 1 1 3 C1 3 01 3b C0.707 0.921875000 C1 3 1 0 1 1 C1 2 b0 1a C0.780 0.914062500 C1 3 1 0 1 2 C1 2 b0 2a C0.855 0.906250000 1 1 1 1 1 2 1 1 11 21 C0.930 0.898437500 C1 4 1 0 1 2 1 1 c0 21 C1.006 0.890625000 1 1 1 1 1 3 1 1 11 31 C1.044 0.886718750 C1 3 1 0 1 1 C1 4 b0 1c C1.083 0.882812500 1 1 1 1 1 4 1 1 11 41 C1.140 0.876953125 C1 4 1 0 C1 5 1 0 c0 d0 C1.160 0.875000000 C1 0 C1 0 C1 3 1 0 88 b0 C1.199 0.871093750 1 1 1 1 C1 5 1 1 11 d1 C1.238 0.867187500 1 1 1 1 C1 4 1 1 11 c1 C1.316 0.859375000 1 1 1 1 C1 3 1 1 11 b1 C1.356 0.855468750 C1 3 1 0 1 2 1 3 b0 23 C1.436 0.847656250 C1 3 1 0 C1 3 1 2 b0 b2 C1.476 0.843750000 1 1 1 1 1 1 1 2 11 12 C1.516 0.839843750 C1 3 1 0 1 3 1 2 b0 32 C1.557 0.835937500 C1 3 1 0 1 2 1 2 b0 22 C1.638 0.828125000 1 1 1 1 1 2 1 2 11 22 C1.720 0.820312500 1 1 1 1 1 3 1 2 11 32 C1.783 0.814453125 1 1 1 1 1 5 1 2 11 52 C1.804 0.812500000 1 1 1 1 C1 1 1 1 11 91 C1.845 0.808593750 1 1 1 1 C1 4 1 2 11 c2 C1.887 0.804687500 1 1 1 1 C1 3 1 2 11 b2 C1.972 0.796875000 1 1 1 1 1 1 1 3 11 13 C2.058 0.789062500 1 1 1 1 1 2 1 3 11 23 C2.101 0.785156250 1 1 1 1 1 3 1 3 11 33 C2.144 0.781250000 C1 3 1 0 1 1 1 1 b0 11 C2.188 0.777343750 1 1 1 1 C1 3 1 3 11 b3 C2.231 0.773437500 1 1 1 1 1 1 1 4 11 14 C2.275 0.769531250 1 1 1 1 1 2 1 4 11 24 C2.320 0.765625000 C1 3 1 0 C1 3 1 0 b0 b0 C2.364 0.761718750 1 1 1 1 1 1 1 5 11 15 C2.409 0.757812500 C1 3 1 0 C1 4 1 0 b0 c0 C2.454 0.753906250 C1 3 1 0 C1 5 1 0 b0 d0 C2.499 0.750000000 C1 0 C1 0 1 1 1 1 88 11 a = { [ ( v 1 * 2 Ck1 +1) * v 2 * 2 Ck2 +1 ] * v 3 * 2 Ck3 +1 } * v 4 * 2 Ck4 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex
semiconductor group 218 software description sts 2060 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex C2.544 0.746093750 1 2 1 1 C1 5 1 0 21 d0 C2.590 0.742187500 1 2 1 1 C1 4 1 0 21 c0 C2.636 0.738281250 1 1 1 1 C1 2 C1 4 11 ac C2.682 0.734375000 1 2 1 1 C1 3 1 0 21 b0 C2.728 0.730468750 1 1 1 1 1 2 C1 4 11 2c C2.775 0.726562500 1 1 1 1 C1 2 C1 3 11 ab C2.821 0.722656250 1 1 1 1 C1 3 C1 3 11 bb C2.868 0.718750000 1 2 1 1 1 1 1 1 21 11 C2.916 0.714843750 1 1 1 1 1 3 C1 3 11 3b C2.963 0.710937500 1 1 1 1 1 2 C1 3 11 2b C3.059 0.703125000 1 1 1 1 C1 2 C1 2 11 aa C3.156 0.695312500 1 2 1 1 1 3 1 1 21 31 C3.205 0.691406250 1 2 1 1 1 4 1 1 21 41 C3.255 0.687500000 1 1 1 1 C1 1 C1 1 11 99 C3.304 0.683593750 1 2 1 1 C1 4 1 1 21 c1 C3.354 0.679687500 1 2 1 1 C1 3 1 1 21 b1 C3.454 0.671875000 1 2 1 1 C1 2 1 1 21 a1 C3.556 0.664062500 1 2 1 1 1 2 1 2 21 22 C3.607 0.660156250 1 2 1 1 1 3 1 2 21 32 C3.659 0.656250000 C1 2 1 0 1 1 1 2 a0 12 C3.710 0.652343750 1 2 1 1 C1 3 1 2 21 b2 C3.763 0.648437500 1 2 1 1 C1 2 1 2 21 a2 C3.815 0.644531250 1 2 1 1 1 2 1 3 21 23 C3.868 0.640625000 C1 2 1 0 C1 3 1 1 a0 b1 C3.921 0.636718750 1 2 1 1 C1 2 1 3 21 a3 C3.974 0.632812500 C1 2 1 0 C1 4 1 1 a0 c1 C4.028 0.628906250 C1 2 1 0 C1 5 1 1 a0 d1 C4.082 0.625000000 C1 0 C1 0 1 2 1 1 88 21 C4.137 0.621093750 1 3 1 1 C1 4 1 0 31 c0 C4.192 0.617187500 1 3 1 1 C1 3 1 0 31 b0 C4.247 0.613281250 1 2 1 1 C1 2 C1 3 21 ab C4.302 0.609375000 1 3 1 1 C1 2 1 0 31 a0 C4.358 0.605468750 1 2 1 1 1 2 C1 3 21 2b C4.414 0.601562500 1 2 1 1 C1 2 C1 2 21 aa C4.471 0.597656250 1 2 1 1 C1 3 C1 2 21 ba C4.528 0.593750000 C1 2 1 0 1 2 1 1 a0 21 C4.585 0.589843750 1 3 1 1 C1 3 1 1 31 b1 C4.643 0.585937500 1 3 1 1 1 1 1 2 31 12 C4.701 0.582031250 1 3 1 1 1 2 1 2 31 22 C4.760 0.578125000 1 2 1 1 1 1 C1 2 21 1a C4.818 0.574218750 1 3 1 1 C1 2 1 2 31 a2 C4.878 0.570312500 C1 1 1 0 1 3 C1 3 90 3b C4.937 0.566406250 C1 1 1 0 1 4 C1 3 90 4b C4.998 0.562500000 C1 2 1 0 1 1 1 1 a0 11 C5.058 0.558593750 1 4 1 1 C1 3 1 0 41 b0 C5.119 0.554687500 1 4 1 1 C1 2 1 0 41 a0 C5.180 0.550781250 1 3 1 1 C1 2 C1 2 31 aa C5.242 0.546875000 C1 1 1 0 C1 2 C1 3 90 ab C5.305 0.542968750 1 3 1 1 1 2 C1 2 31 2a C5.367 0.539062500 1 3 1 1 1 1 C1 2 31 1a C5.430 0.535156250 1 3 1 1 C1 3 C1 1 31 b9 C5.494 0.531250000 C1 2 1 0 C1 3 1 0 a0 b0 C5.558 0.527343750 1 5 1 1 C1 2 1 0 51 a0 C5.623 0.523437500 C1 1 1 0 C1 2 C1 4 90 ac C5.688 0.519531250 1 4 1 1 1 1 C1 2 41 1a
semiconductor group 219 software description sts 2060 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex C5.753 0.515625000 C1 2 1 0 C1 4 1 0 a0 c0 C5.819 0.511718750 C1 1 1 0 C1 2 C1 5 90 ad C5.886 0.507812500 C1 2 1 0 C1 5 1 0 a0 d0 C5.953 0.503906250 C1 2 1 0 C1 6 1 0 a0 e0 C6.021 0.500000000 C1 0 1 0 C1 1 C1 0 80 98 C6.089 0.496093750 1 0 1 2 C1 1 C1 5 02 9d C6.157 0.492187500 1 0 1 2 C1 1 C1 4 02 9c C6.227 0.488281250 1 0 1 2 C1 2 C1 4 02 ac C6.296 0.484375000 1 1 1 2 C1 3 1 0 12 b0 C6.367 0.480468750 1 0 1 2 1 2 C1 4 02 2c C6.438 0.476562500 1 0 1 2 C1 2 C1 3 02 ab C6.509 0.472656250 1 0 1 2 C1 3 C1 3 02 bb C6.581 0.468750000 1 1 1 2 C1 2 1 0 12 a0 C6.654 0.464843750 1 0 1 2 1 3 C1 3 02 3b C6.727 0.460937500 1 0 1 2 1 2 C1 3 02 2b C6.801 0.457031250 C1 3 1 1 1 2 C1 2 b1 2a C6.876 0.453125000 1 0 1 2 C1 2 C1 2 02 aa C7.027 0.445312500 1 0 1 2 C1 3 C1 2 02 ba C7.103 0.441406250 1 1 1 2 1 4 1 1 12 41 C7.142 0.439453125 C1 4 1 1 C1 4 1 0 c1 c0 C7.180 0.437500000 1 0 1 2 C1 1 C1 1 02 99 C7.219 0.435546875 C1 3 1 1 C1 1 1 4 b1 94 C7.258 0.433593750 1 1 1 2 C1 4 1 1 12 c1 C7.298 0.431640625 C1 3 1 1 C1 2 1 3 b1 a3 C7.337 0.429687500 1 1 1 2 C1 3 1 1 12 b1 C7.377 0.427734375 C1 3 1 1 1 2 1 3 b1 23 C7.416 0.425781250 C1 3 1 1 C1 2 1 2 b1 a2 C7.456 0.423828125 C1 3 1 1 C1 3 1 2 b1 b2 C7.496 0.421875000 1 1 1 2 1 1 1 2 12 12 C7.537 0.419921875 C1 3 1 1 1 3 1 2 b1 32 C7.577 0.417968750 C1 3 1 1 1 2 1 2 b1 22 C7.659 0.414062500 1 1 1 2 1 2 1 2 12 22 C7.741 0.410156250 1 1 1 2 1 3 1 2 12 32 C7.782 0.408203125 1 1 1 2 1 4 1 2 12 42 C7.824 0.406250000 1 1 1 2 C1 1 1 1 12 91 C7.866 0.404296875 1 1 1 2 C1 4 1 2 12 c2 C7.908 0.402343750 1 1 1 2 C1 3 1 2 12 b2 C7.993 0.398437500 1 1 1 2 C1 2 1 2 12 a2 C8.078 0.394531250 1 1 1 2 1 2 1 3 12 23 C8.121 0.392578125 1 1 1 2 1 3 1 3 12 33 C8.165 0.390625000 1 1 1 2 C1 1 1 2 12 92 C8.208 0.388671875 1 1 1 2 C1 3 1 3 12 b3 C8.252 0.386718750 1 1 1 2 C1 2 1 3 12 a3 C8.296 0.384765625 1 1 1 2 1 2 1 4 12 24 C8.340 0.382812500 1 1 1 2 C1 1 1 3 12 93 C8.385 0.380859375 1 1 1 2 C1 2 1 4 12 a4 C8.429 0.378906250 1 1 1 2 C1 1 1 4 12 94 C8.474 0.376953125 1 1 1 2 C1 1 1 5 12 95 C8.519 0.375000000 C1 1 1 1 C1 1 C1 0 91 98 C8.565 0.373046875 1 1 1 2 C1 1 C1 5 12 9d C8.610 0.371093750 1 1 1 2 C1 1 C1 4 12 9c C8.656 0.369140625 1 1 1 2 C1 2 C1 4 12 ac C8.702 0.367187500 1 1 1 2 C1 1 C1 3 12 9b C8.749 0.365234375 1 1 1 2 1 2 C1 4 12 2c C8.795 0.363281250 1 1 1 2 C1 2 C1 3 12 ab
semiconductor group 220 software description sts 2060 (db) a v3, k3 v4, k4 v1, k1 v2, k2 hex C8.842 0.361328125 1 1 1 2 C1 3 C1 3 12 bb C8.889 0.359375000 1 1 1 2 C1 1 C1 2 12 9a C8.936 0.357421875 1 1 1 2 1 3 C1 3 12 3b C8.984 0.355468750 1 1 1 2 1 2 C1 3 12 2b C9.080 0.351562500 1 2 1 2 1 2 1 1 22 21 C9.177 0.347656250 C1 2 1 1 C1 3 1 2 a1 b2 C9.226 0.345703125 1 2 1 2 1 4 1 1 22 41 C9.275 0.343750000 1 2 1 2 C1 1 1 0 22 90 C9.325 0.341796875 1 2 1 2 C1 4 1 1 22 c1 C9.374 0.339843750 1 2 1 2 C1 3 1 1 22 b1 C9.475 0.335937500 1 2 1 2 1 1 1 2 22 12 C9.576 0.332031250 1 2 1 2 1 2 1 2 22 22 C9.628 0.330078125 1 2 1 2 1 3 1 2 22 32 C9.679 0.328125000 1 2 1 2 C1 1 1 1 22 91 C9.731 0.326171875 1 2 1 2 C1 3 1 2 22 b2 C9.783 0.324218750 1 2 1 2 C1 2 1 2 22 a2 C9.836 0.322265625 1 2 1 2 1 2 1 3 22 23 C9.889 0.320312500 1 2 1 2 C1 1 1 2 22 92 C9.942 0.318359375 1 2 1 2 C1 2 1 3 22 a3 C9.995 0.316406250 1 2 1 2 C1 1 1 3 22 93 C10.049 0.314453125 1 2 1 2 C1 1 1 4 22 94 C10.103 0.312500000 C1 1 1 1 C1 1 C1 1 91 99 C10.157 0.310546875 1 2 1 2 C1 1 C1 4 22 9c C10.212 0.308593750 1 2 1 2 C1 1 C1 3 22 9b C10.267 0.306640625 1 2 1 2 C1 2 C1 3 22 ab C10.323 0.304687500 1 2 1 2 C1 1 C1 2 22 9a C10.379 0.302734375 1 2 1 2 1 2 C1 3 22 2b C10.435 0.300781250 1 2 1 2 C1 2 C1 2 22 aa C10.492 0.298828125 1 2 1 2 C1 3 C1 2 22 ba C10.549 0.296875000 1 2 1 2 C1 1 C1 1 22 99 C10.606 0.294921875 1 2 1 2 1 3 C1 2 22 3a C10.664 0.292968750 1 2 1 2 1 2 C1 2 22 2a C10.722 0.291015625 1 3 1 2 1 2 1 2 32 22 C10.780 0.289062500 1 2 1 2 1 1 C1 2 22 1a C10.839 0.287109375 1 3 1 2 C1 2 1 2 32 a2 C10.898 0.285156250 1 3 1 2 C1 1 1 2 32 92 C10.958 0.283203125 1 3 1 2 C1 1 1 3 32 93 C11.018 0.281250000 1 2 1 2 C1 1 C1 0 22 98 C11.079 0.279296875 1 3 1 2 C1 1 C1 3 32 9b C11.140 0.277343750 1 3 1 2 C1 1 C1 2 32 9a C11.201 0.275390625 1 3 1 2 C1 2 C1 2 32 aa C11.263 0.273437500 1 3 1 2 C1 1 C1 1 32 99 C11.325 0.271484375 1 3 1 2 1 2 C1 2 32 2a C11.388 0.269531250 1 3 1 2 1 1 C1 2 32 1a C11.451 0.267578125 1 3 1 2 C1 3 C1 1 32 b9 C11.515 0.265625000 1 3 1 2 C1 1 C1 0 32 98 C11.579 0.263671875 1 3 1 2 1 3 C1 1 32 39 C11.643 0.261718750 1 3 1 2 1 2 C1 1 32 29 C11.708 0.259765625 1 4 1 2 1 1 C1 2 42 1a C11.774 0.257812500 C1 4 1 2 1 1 C1 0 c2 18 C11.840 0.255859375 1 4 1 2 1 2 C1 1 42 29 C11.907 0.253906250 1 5 1 2 C1 1 C1 0 52 98 C11.974 0.251953125 1 6 1 2 C1 1 C1 0 62 98 C12.041 0.250000000 C1 0 C1 1 C1 1 1 0 89 90
semiconductor group 221 software description sts 2060 9.4 index of the variables used in the software a. abimp ad, delay ad, lower ad, upper agx agr apof apre at+ atC b. bauto bdf blim brep bsign byte c. chnr ckr ckx d. da, delay da, lower da, upper dd dpof dpre f. fb fbp fr fr fref fsta fsto fx fz fzp g. gwfb l. law zi or z3 hz and ms hz and db hz and db 00, 01, 10, 11 00, 01, 10, 11 db db db or ms db or ms y or n 0, 1, 2 or 3 real value < 3. y or n +1 or C1 byt file name x, y farad farad hz and ms hz and db hz and db hz and db second second 2 integer values 100 hz < fb < 3.4 khz 100 hz < fbp < 3.4 khz hz 2 integer values hz hz hz 2 integer value 2 integer values 100 hz < fz < 16 khz 100 hz < fzp < 16 khz real a or mu sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ specification sicofi/ specification sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control harris slic/ input harris slic/ input sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ specification sicofi/ control sicofi/ specification sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ specification v ariable possible value used in program/ file
semiconductor group 222 software description sts 2060 o. off on opt p. pb plq psp pzin r. rdisp rel rfil rir rix rlr rlx rref rrefq r0 s. short sim slic spec step t. tbm tm3 v. version vor vox vref w. wfb wfz x. xdisp xref xrefq z,r,x,b,gr,gx.. z,r,x,b,gr,gx.. z,r,x,b,gr,gx.. 10 < pb < 20 y or n 5 < pzin+psp < 20 5 < pzin < 20 y or n y or n see rdisp ohm ohm dbr dbr db y or n ohm y or n z,r,x,b,gr,gx.. slic file name spec file name hz see bdf 000, 001, 011 vx.y real real real real real y or n db y or n sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control harris slic/ input harris slic/ input sicofi/ specification sicofi/ specification sicofi/ control sicofi/ control harris slic/ input sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control harris slic/ input harris slic/ input sicofi/ specification sicofi/ control sicofi/ control sicofi/ control sicofi/ control sicofi/ control v ariable possible value used in program/ file
semiconductor group 223 software description sts 2060 z. zauto zi zicp1 zicp2 zics zre zirp1 zirp2 zirs zl zlcp1 zlcp2 zlcs zlim zlrp1 zlrp2 zlrs zmir zr zrcp1 zrcp2 zrcs zrep zrrp1 zrrp2 zrrs zsign zsli zxrb z3 z3cp1 z3cp2 z3cs z3rp1 z3rp2 z3rs y or n complex farad farad farad hz and db ohm ohm ohm complex farad farad farad real value < 3. ohm ohm ohm hz and db complex farad farad farad y or n ohm ohm ohm +1 or C1 db n, o or x complex farad farad farad ohm ohm ohm sicofi/ control sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ control sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ control sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ control harris slic/ input sicofi/ control sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification sicofi/ specification v ariable possible value used in program/ file
semiconductor group 224 calculating slic parameters contents page 1 introduction ....................................................................................................... 225 2 sicofi ? software principle ............................................................................. 226 3 conversion program ........................................................................................ 230 3.1 features.............................................................................................................. 230 3.2 batch file s.bat ................................................................................................ 231 3.3 slic description by parameters ........................................................................ 231 3.3.1 m-parameters ..................................................................................................... 231 3.3.2 zsli .................................................................................................................... 23 4 4example ............................................................................................................. 235 4.1 the slic............................................................................................................. 235 4.1.1 the transformer ................................................................................................. 236 4.2 determination of the equivalent circuit components ......................................... 237 4.2.1 modelling the transformer.................................................................................. 237 4.2.2 measurements on the transformer .................................................................... 238 4.2.3 calculations on the transformer......................................................................... 238 4.3 the spice input file 'slic.cir' ........................................................................ 241 4.4 format of the spice output file ........................................................................ 242 4.5 how to use the conversion program 'slic.exe'............................................... 244 4.6 format of the sicofi ? input file........................................................................ 246 4.7 results................................................................................................................ 247 4.8 comparison of measurements and simulation................................................... 247 5literature ........................................................................................................... 247 errata appendix a: the library file 'slic2op.lib'............................................................... 248 appendix b: the library file 'trafo.lib'.................................................................. 249 appendix c: the test circuit file 'slic.cir'.............................................................. 250 appendix d: the conversion program in pseudo language (on request)................ 252 appendix e: diagram of the measurement system .................................................... 253 appendix f: plots of measurements........................................................................... 254 appendix g: sicofi ? file 'usa.spe'......................................................................... 257 appendix h: sicofi ? file 'spice.ctl'...................................................................... 258 appendix i: result file 'spice.res'......................................................................... 259 appendix j: the batch file 's.bat'............................................................................ 266
semiconductor group 225 calculating slic parameters calculating slic parameters of the transformer slic using m-parameters and spice preface a solution to the problem of modeling new slics is submitted by using a combination of an arbitrary spice program and of the conversion program slic.exe'. a detailed description of the conversion program is given, and its practical use is exemplified. to read this application note with profits, the sicofi coefficients program and generalities about the slic file format and the spice input files should be known. 1 introduction to calculate the parameters of a slic and to simulate its transfer characteristics (e.g. using the sts 2060 sicofi coefficients program) it is necessary to write for each new type of slic a new program. this is not only a time consuming process, but also new errors introduced into the software model may easily lead to wrong results. the simulation of analog circuits can also be done by using general programs like spice (we used the version of the firm microsim: pspice); but there is a problem: the output provided by spice is not suited as input to the sicofi coefficients program (unless the spice program contains an "analog behavioral modelling"). therefore a conversion program was written in fortran to convert and calculate the slic parameter file (.sli file) to be used with the sicofi program from the interpolated spice output. note: this conversion program can also be used to interpolate measured slic data when these data are in the form of a spice output file (see chapter 4.4). terminology: slic: subscriber line interface circuit. sicofi: signal processing codec filter (peb2060). in the following we will call "slic" the hardware and software corresponding to the analog components in a subscriber line interface circuit excluding the sicofi chip. please note that the conversion program is also called slic.exe.
semiconductor group 226 calculating slic parameters 2 sicofi ? software principle the main functions of a subscriber line interface circuit (slic) are to provide the borsht functions (battery feeding, overvoltage protection, ringing, signaling, hybrid function, testing). in the case of a slic being used in combination with the sicofi, the hybrid function is splitted into the two-wire to four-wire conversion realized by the slic, and the impedance matching, hybrid balancing and gain adjustment provided by the internal filters of the sicofi. the other functions (such as off-hook detection, metering, stand-by mode, ringing) may also affect the speech signal, but we will not consider them in the slic example described below. as has been told, the hardware can be split into two parts: the slic and its external circuitry on one side and the sicofi on the other ( see figure 1 ). figure 1 slic-sicofi ? hardware in a similar way, the software consists of two major sections: the slic description file (.sli file) and the sicofi program. figure 2 slic-sicofi ? software
semiconductor group 227 calculating slic parameters according to its functions, a slic is a rather complicated circuit ( see figure 12 ). analyzing the slic (e.g. for simulating its transfer characteristics) is facilitated in using e.g. pspice. then the spice output file, which is not compatible to the sicofi program, may be adapted by using the conversion program 'slic.exe' ( see figure 3 ). figure 3 software structure in detail when using spice for modelling the slic, the complete sicofi software structure is shown in the following figure 4 : figure 4 details of software structure
semiconductor group 228 calculating slic parameters slic2op.lib all the specific values concerning the slic and its external circuitry (physical data, filter dimensions, ...) are gathered in a spice input file slic2op.lib. this file gets its non-standard subcircuits (like the transformer data) from the trafo.lib and e.g. the opamp from spice library files (linear.lib). slic.lib the file slic.lib provides the description of a particular slic circuit. the main advantage of this procedure is, that the file slic.lib acts like a kind of black box containing the actual slic: while the black box and its connections remain unchanged, the slic circuitry inside the box can easily be replaced by simply changing (the names of) the slic sub-circuit and it's library ('slic2op.lib'). in the following the various available library files and their use is reviewed. trafo.lib contains a description of an arbitrary transformer. the transformer components have to be matched to the actual data. slic.cir contains the necessary test circuits to generate the spice output file. this file must not be changed. the spice program analyzes the test circuits and calculates voltages and currents from which the m-parameters are deduced. the slic program slic.exe then converts the output of spice to a file slic.sli which is compatible to the sicofi coefficients program and which contains the transmission characteristics of the slic in the form of the m-parameters. for easy use, the spice and the conversion programs are combined in a batch file s.bat. this batch file is run as follows: s slic (without the .out suffix) slic.sli is a transfer file (output/input file) between the slic program and the sicofi program to introduce the slic circuit data (m-parameters) into the sicofi program.
semiconductor group 229 calculating slic parameters auxiliary files: country.spe is an input file of the sicofi program describing the customer specification (ccitt etc. ...) and measurement configuration parameters (e.g. termination impedance). ref.byt is an input file of the sicofi program which defines a frame into which the program can write the newly calculated coefficients together with some predefined commands (required for sending the sicofi coefficients from the peripheral board controller pbc (peb 2051) to the sicofi) and stores them in a user.byt file. sicofi.ctl is the control file of the sicofi program. it contains the data controlling the optimization and simulation processes. the sicofi program generates the sicofi coefficients and simulates the theoretical transfer functions of the set slic + sicofi. result.res is the output file of the sicofi program. it contains the coefficients for programming the sicofi and a list of the calculated results corresponding to various measurements on the set sicofi + slic. (e.g. return loss, frequency response, echo return loss, etc ...).
semiconductor group 230 calculating slic parameters 3 the conversion program slic.exe 3.1 features l the conversion program is written in microsoft fortran and runs on an ibm pc at or compatible. l input: for the input to the conversion program serves the circuit description file 'slic.out' which is generated by spice (or a file generated by measurements). this file has the format of a spice ac analysis containing variable values in the frequency range of 10 to 3990 hz in steps of 10 hz. if not all these frequency values are contained (for instance by the use of steps larger than 10 hz in the spice ac analysis in order to reduce the calculation time of spice), the missing values and frequencies are interpolated . l output: the program converts the spice output file into a slic file (with suffix .sli) describing the characteristics of a slic, and being suitable as input for the sicofi coefficients program containing the parameter zsli (minimal attenuation of the slic at the four wire side) and the m-parameters of the slic for each frequency from 10 to 3990 hz in steps of 10 hz. l batch mode facility: the program can be started from the keyboard or from a batch file (the arguments are on the same command line). l flexibility: the program processes the input file with flexibility by recognizing keywords in the spice output file: C the order of the different ac analyses is indifferent C the zsli analysis can be missing in order to reduce the calculation time (zsli is then set to the default value of 0.5). C the program recognizes three kinds of circuits: two for the m-parameter and one for the zsli parameter calculation. due to the structure of the circuits being all the same, and only the loads at ring and tip being different, there might be more circuits available for the zsli calculation, however.
semiconductor group 231 calculating slic parameters 3.2 batch file s.bat for ease of use, the steps always following each other of slic circuit analysis by spice and adaptation of the resulting output file slic.out to an input file being compatible to the sicofi program have been combined to a batch file s.bat. thus in applying s.bat to the circuit description file slic.cir, the resulting output file slic.sli is directly to be used as input to the sicofi program. circuit analysis and conversion of the intermediate results is performed by simply calling s slic. figure 5 contents of program s.bat 3.3 slic description by parameters according to its functionality the slic operates as a three port. to describe its electrical properties the parameters to be used in the sicofi program are the m-parameters and the zsli-value. they are defined as follows: 3.3.1 m-parameters the slic and its external circuitry are accessible through a three port ( see figure 6 ). figure 6 slic and its external circuitry as a three port
semiconductor group 232 calculating slic parameters i 1 , i 2 and i 3 are port currents and v 1 , v 2 and v 3 are port voltages. this circuit can be described by the following equation system: (1) i 1 = m11 v 1 + m12 v 3 + m13 i 2 (2) v 2 = m21 v 1 + m22 v 3 + m23 i 2 (3) i 3 = m31 v 1 + m32 v 3 + m33 i 2 note: description of a port: when the slic is connected to the sicofi, we can assume that: C i 2 = 0 because of the high sicofi input impedance. (in special cases the sicofi input impedance can be included in the three-port model). C i 3 is not relevant in the following calculations because the sicofi works as an ideal voltage generator. (the sicofi output impedance of about 10 w may be included in the slic model). according to the above remarks the equation system can be reduced to a pair of equations containing just four m-parameters: (4) i 1 = m11 v 1 + m12 v 3 (5) v 2 = m21 v 1 + m22 v 3 these parameters m11, m12, m21, m22 fully describe the slic and its external circuitry. they are defined as shown in figures 7 through 10 . please verify that circuits of figures 7 and 9 and of figures 8 and 10 respectively are identical!
semiconductor group 233 calculating slic parameters figure 7 definition of slic m11-parameter figure 8 definition of slic m12-parameter figure 9 definition of slic m21-parameter
semiconductor group 234 calculating slic parameters figure 10 definition of slic m22-parameter 3.3.2 zsli zsli is the minimal attenuation (resp. maximal gain) of the slic 4-wire side while the a/b lines are terminated by the terminal impedance z t . figure 11 definition of slic zsli zsli is used by the sicofi program during automatic calculation of z-filter coefficients as a reference to check for possible oscillations in the sicofi z-filter + slic loop. the value is in db and is expressed as attenuation: zsli = C 20 log ( v 2 / v 3 ) please verify that as v 2 is larger than v 3 , zsli is a negative quantity. in practice the attenuation of the loop "slic input to slic output" is measured over the whole frequency band 0 C 16 khz for different terminating impedances z t ( see chapter 4.2.1 ). the worst case (the smallest attenuation resp. the greatest gain) then is taken for zsli.
semiconductor group 235 calculating slic parameters the use of spice allows to obtain the zsli value without doing measurements. note: according to the nyquist criteria, the attenuation of the closed loop "z filter C slic" must be greater than 1 (gain < 0 db) in the frequency band 0 C 16 khz in order to avoid any oscillation. 4example to exemplify circuit synthesis using spice together with the sicofi program, a circuitry consisting of a transformer slic and a sicofi according to figure 12 is analyzed. while the slic is a real circuit of fixed properties, the sicofi is tuned by the sicofi program as to meet particular specifications imposed by country specific requirements. results of simulation and measurements on a sample circuit are compared. 4.1 the slic the slic used for probing the spice program is a transformer slic with series feeding and two operational amplifiers, used in certain usa applications. with the names of the different nodes filled in, the circuit is shown in figure 12. this circuit is described for spice in the file 'slic2op.lib' ( see appendix a ). most of the components of the slic are standard components and can be found in the spice library except the transformer. hence this component has to be modelled separately.
semiconductor group 236 calculating slic parameters figure 12 slic circuit 4.1.1 the transformer the transformer (siemens ordering code: v3301-g1023-b194-4 bw/w9) consists of two primary and one secondary coils wound on an iron core permenorm 5000 h2 1000 nh. the equivalent circuit data are calculated from measurements.
semiconductor group 237 calculating slic parameters 4.2 determination of the equivalent circuit components to determine the equivalent circuit components of the circuitry involved, a series of measurements are taken. as several of these components are not directly accessible by measurement, they are calculated from measured data. 4.2.1 modelling the transformer the transformer can be described in spice by an equivalent circuit. in this circuit each coil is substituted by its inductance, in series with its copper resistance and in parallel with its winding capacitance ( see figure 13 ). the inductors are coupled by a common coupling factor k . figure 13 equivalent circuit for transformer used in spice the values of the different components of this equivalent circuit are calculated from the measurements on the transformer.
semiconductor group 238 calculating slic parameters 4.2.2 measurements on the transformer the whole measurement is done in 4 steps: 1. measurement of the copper resistances of the two primary and of the secondary coils ( r p1 , r p2 and r s ) using a simple ohmmeter. r p1 = 33 w r p2 = 33 w r s = 66 w 2. measurement of the respective transformer resonance frequencies (imaginary part = 0), with open circuit at the other coils, by using an impedance analyzer. [parallel equivalent circuit] C first primary coil ? f p1 = 64.03 khz C second primary coil ? f p2 = 63.38 khz C secondary coil ? f s = 62.67 khz 3. measurement of winding inductances l p1m , l p2m and l sm , with open circuit at the other coils at a low frequency ( f m = 100 hz). [series equivalent circuit] l p1m = 0.374 h l p2m = 0.374 h l sm = 1.473 h 4. measurement of the stray inductances with a short circuit at the other coils at the resonance frequency. [series equivalent circuit] C first primary coil at f p1 ? l kp1 = 30.3 m h C second primary coil at f p2 ? l kp2 = 30.6 m h C secondary coil at f s ? l ks = 2.108 mh 4.2.3 calculations on the transformer with the measurements of 4.2.2 the only true components determined yet are the copper resistances of the coils; to get the rest of the component values (inductances and capacitances) some calculations have to be performed. C determination of correction factors [1]: ? p1 = f m / f p1 ? p2 = f m / f p2 ? s = f m / f s ? p1 = f m / f p1 = 100/64.03e3 = 1.562eC3 ? p2 = f m / f p2 = 100/63.38e3 = 1.578eC3 (6) ? s = f m / f s = 100/62.67e3 = 1.596eC3
semiconductor group 239 calculating slic parameters as is to be seen, the b 's are rather small quantities compared to unity and may be neglected in many cases. C calculation of the actual inductances [1]: (7) l p1 = l p1m (1 C ? p1 2 ) l p2 = l p2m (1 C ? p2 2 ) l s = l sm (1 C ? s 2 ) l p1 = 0.374 h l p2 = 0.374 h l s = 1.473 h C calculation of the stray factors [1]: C calculation of the turns ratio [1]: (9) n = 1.98 C evaluation of the winding capacitances [1]: C calculation of the coupling factor [1]: l kp1 l p1 s p1 = l kp2 l p2 s p2 = l ks l s s s = (8) s p1 = 8.10 10 C5 s p2 = 8.18 10 C5 s s = 1.43 10 C3 n = l s l p1 = l s l p2 n (2 p f s ) 2 l p1 s p1 c p1 = (10) c p1 = 107 nf c p2 = 106 nf c s = 5.9 nf n (2 p f s ) 2 l p2 s p2 c p2 = 1 (2 p f p2 ) 2 l s s s n c s = l p1 C l kp1 l p1 k p1 = (11) k p1 = 0.99992 k p2 = 0.99992 k s = 0.99857 l p2 C l kp2 l p2 k p2 = l s C l ks l s k s =
semiconductor group 240 calculating slic parameters because only one coupling factor for all three coils is required by spice and because there are small differences among the three calculated coupling factors due to measurement errors, the average of these coupling factors is taken. k = ( k p1 + k p2 + k s )/3 = 0.999468 with the parameters and the names of the different nodes, the equivalent circuit of the transformer is given in figure 14 below. this circuit is described in the spice file 'trafo.lib' ( see appendix b ). figure 14 the complete equivalent circuit of the transformer
semiconductor group 241 calculating slic parameters 4.3 the spice input file 'slic.cir' the circuit description file slic.cir is the input file from which spice generates all the output variables necessary for the conversion program. according to chapter 3.3 for calculating the m-parameters two circuits are simulated, one circuit for the parameters m11 and m21 ( figures 7 and 9 ), and one circuit for calculating the parameters m12 and m22 ( figures 8 and 10 ). the m11 and m21 parameters are calculated from the frequency response of the complex variables v 1 , the voltage between "ring" and "tip" (port 1 of the slic), v 2 , the voltage at v in (port 2 of the slic), and i 1 , the current flowing into "ring" (into port 1 of the slic). the m12 and m22 parameters are calculated from the frequency response of the complex variables v 2 , the voltage at v in (port 2 of the slic), v 3 , the voltage at v out (port 3 of the slic), and i 1 , the current flowing into the ring port of the slic. the description for spice of these two circuits can be found in the first part of the file ' slic.cir ' ( see appendix c ). for gaining the minimal attenuation of the slic at the four wire side (zsli), accordingly three circuits are simulated with the following terminating conditions at port 1: one with a short circuit between "ring" and "tip", one with a 600 w load between "ring" and "tip", and one with an open circuit between "ring" and "tip", yielding three values zsli = C 20 log( v 2 / v 3 ) the magnitudes of the voltages v 2 and v 3 at v in and v out result from a spice ac analysis. the minimum value out of these zsli's is taken for calculations. the description for spice of these three circuits are found in the second part of the file 'slic.cir' ( see appendix c ).
semiconductor group 242 calculating slic parameters 4.4 format of the spice output file the output file of spice generated with the 'slic.cir' circuit description file consists of two to five parts containing a circuit description and a frequency analysis. each of the parts is arranged as follows (keywords which are recognized by the conversion program are shown in bold ): a title line with one or two keywords to identify the circuit. the keywords can be one of the following: C m11 and m21 C m12 and m22 C zsli . .lib description of test circuit x slic ring tip + 5 v C 5 v vin vout . commands for starting analysis . .end . analysis output of spice . ac analysis . one of these lines: freq vr(vin) vi(vin) vr(ring,tip) vi(ring,tip) or freq ir(vmeasure) ii(vmeasure) or freq vr(vin) vi(vin) vr(vout) vi(vout) or freq v(vout) v(vin) d epending on the part of the output empty line empty line 1.000e+01 1.000e+00 7.167eC 08 ......... . all points of ac analysis . 1.600e+04 1.000e+00 1.993eC 04 ......... line without scientific reals.
semiconductor group 243 calculating slic parameters in case of m-parameter calculations the second part of the analysis follows: ac analysis . freq ir(vmeasure) ii(vmeasure) empty line empty line 1.000e+01 1.000e+00 7.167eC 08 ......... . all points of ac analysis . 1.600e+04 1.000e+00 1.993eC 04 ......... line without scientific reals end of file or next part of spice output the first column of the frequency analysis contains the particular frequency value, the adjacent pair of columns contains the corresponding real and imaginary parts of the variable for that frequency.
semiconductor group 244 calculating slic parameters 4.5 how to use the conversion program 'slic.exe' to calculate the parameters of a slic, procede as follows: 1. set up a library file containing the transformer data. 2. prepare a library file with the description of the slic subcircuit for pspice. 3. put the name of this library file and of the subcircuit to the proper place in the 'slic.lib' file. 4. execute the pspice program with the 'slic.cir' file as argument. 5. execute the conversion program 'slic.exe' with the arguments 'slic.out slic.sli' 6. then run the sicofi program. an example of control file is given in 'spice.ctl' note: steps 3 and 4 are put together in the batch file 's.bat'. (use ' s slic ' without extension). example: calculation of a slic 'slic2op' in the library file 'slic2op.lib' (to know more about how to use this file, please refer to the manual of pspice [2]). editing of the words in bold of the file 'slic.lib' ( see figure 15 ). figure 15 the file 'slic.lib' before editing. files xxxxxxxx.lib and yyyyyyyy are renamed to the correct library file name and to the particular slic subcircuit name respectively. * file for accessing the proper slic with no changes in the slic.cir file * change "slic2op.lib" into the name of the library file with your particular slic * subcircuit .lib xxxxxxx.lib * change the model name "slic2op" for the name of your particular subcircuit .subckt slic ring tip +5v -5v vin vout xownslic ring tip +5v -5v vin vout yyyyyyyy .ends slic
semiconductor group 245 calculating slic parameters the file after editing is shown in figure 16 : figure 16 the file 'slic.lib' after editing. the bold faced words have been changed. * file for accessing the proper slic with no changes in the slic.cir file * change "slic2op.lib" to the name of the library file with your particular slic * subcircuit .lib slic2op.lib * change the model name "slic2op" to the name of your particular subcircuit .subckt slic ring tip +5v -5v vin vout xownslic ring tip +5v -5v vin vout slic2op .ends slic now the batch file 's.bat' can be executed and if there are no errors reported, the output file 'slic.sli' can be used in the sicofi program. for the use of the sicofi program please refer to the software description of the sts 2060 sicofi coefficients program [3]
semiconductor group 246 calculating slic parameters 4.6 format of the sicofi ? input file the sicofi input file is listed below (keywords are in bold): * pspice library used for calculating | comment * .lib slic.lib | lines * pspice model used for calculating | beginning * m-parameters | with "*" * xslic ring tip +5v -5v vin 0 slic zsli .41905 m11-table 10.000000 2.978000e-03 -8.219000e-04 20.000000 2.856892e-03 -7.672104e-04 ................. ......................... ...................... 3980.000000 1.671095e-03 -9.220666e-05 3990.000000 1.671000e-03 -9.240000e-05 m12-table 10.000000 5.185000e-04 1.064000e-03 20.000000 6.787197e-04 9.931213e-04 ................. ......................... ...................... 3980.000000 2.234000e-03 -1.258381e-04 3990.000000 2.234000e-03 -1.262000e-04 m21-table 10.000000 1.864000e-01 -3.890000e-01 20.000000 3.144297e-02 -3.902608e-01 ................. ......................... ...................... 3980.000000 -1.515000 9.331572e-02 3990.000000 -1.515000 9.361000e-02 m22-table 10.000000 5.157000e-01 -2.201000e-01 20.000000 3.803514e-01 -2.266998e-01 ................. ......................... ...................... 3980.000000 -1.515000 9.331572e-02 3990.000000 -1.515000 9.361000e-02 the leading comment lines (beginning with "*) document which slic is used. the first column of the m-parameter tables indicates the frequency value, from 10 to 3990 hz in steps of 10 hz. the second column gives the real part and the third column the imaginary part values. these three values are separated by at least a single space character. every real number must contain a decimal point. (fortran "real" format.)
semiconductor group 247 calculating slic parameters 4.7 results the slic was simulated using the parameters 'slic.sli' of the slic 'slic2op' in 'slic2op.lib' (appendix b), and coefficients were calculated. the result file of the sicofi program was stored in 'slic.res' and the calculated programming bytes in 'slic.byt'. with these bytes the sicofi has been programmed and measurements have been taken with a "pcm 4" from wandel & goltermann, using the real slic in the stut 2060 test board as shown in appendix e. the measurements comprise the levels in transmit direction (ad) and in receive direction (da), the attenuation distortion (ad and da), the transhybrid loss (dd), and the 2-wire impedance return loss. the plots of measurements can be found in appendix f. the plot masks correspond to ccitt recommendations g.712 and g.714 4.8 comparison of measurements and simulation the results of the simulation of the return loss with z-filter off (by the means of the sim option of the sicofi program) and of the measured data for the return loss are compared in the last diagram of appendix f. the differences between the respective curves may be due to imperfections of the transformer model. the measurements show that the specifications of the slic for usa applications (appendix g 'usa.spe') are met. simulated and measured data of the slic's return loss are in good agreement. conclusion: using this combination of the pspice program and of the 'slic.exe' conversion program, correct coefficients for the sicofi are easily calculated. 5literature [1] der bertrager in der nachrichtentechnik. dipl.-ing. gnter h. domsch akademische verlagsgesellschaft geest & portig k.-g. leipzig [2] pspice microsim corporation 20 fairbanks, irvine, california 92718 [3] software description sts 2060, sicofi coefficients program siemens a.g.
semiconductor group 248 calculating slic parameters appendix a the library file 'slic2op.lib' transformer slic for usa-application with 2 opamps .lib linear.lib .lib trafo.lib .subckt slic2op ring tip +5v -5v vin vout *power supply for the 3 opamps *vcc +5v 0 5v *vee 0 -5v 5v c4 +5v 0 1 m f c5 0 -5v 1 m f *slic, connections are ring and tip xtrafo ring 1 2 tip 3 0 trafo rtrafo 1 2 220 *impedance conversion vin r5 3 10 20k r0 3 7 243 c3 7 8 330nf r3 8 9 15k r4 9 0 24k *----------------------------- amplifier --------------------------- -- *connections: * non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | type * | | | | | | xopamp1 9 10 +5v -5v 11 lm324 r6 10 11 75k c2 11 vin 1 m f r7 vin 0 10k *impedance conversion vout xopamp2 0 12 +5v -5v 7 lm324 r2 7 12 200k r1 12 13 150k c1 13 vout 1 m f .ends
semiconductor group 249 calculating slic parameters appendix b the library file 'trafo.lib' trafo .subckt trafo 1 2 3 4 5 6 c1 1 2 1.0725e-12 c2 3 4 1.0617e-12 c3 5 6 3.2766e-12 rl1 1 1a 33 rl2 3 3a 33 rl3 5 5a 66 l1 1a 2 0.374 l2 3a 4 0.374 l3 5a 6 1.473 k l1 l2 l3 0.999468682 .ends
semiconductor group 250 calculating slic parameters appendix c 1 the test circuit file 'slic.cir' circuit for calculating m-parameters m11 m21 (vout = 0) * *version 3.0 * *to change the slic to your own slic just change in the slic.lib file all the library and slic *names used in the subcircuit * .lib slic.lib vcc +5v 0 5v ; positive power supply vee 0 -5v 5v ; negative power supply xslic ring tip +5v -5v vin 0 slic vosc 1 tip ac 1 vmeasure 1 ring 0 ; for measurement of current going in ring-port rdum tip 0 10t ; for rejecting 'floating' errors from spice,see spice manual .ac lin 39 10 3990 .print ac vr([vin]) vi([vin]) vr([ring],[tip]) vi([ring]),[tip]) .print ac ir(vmeasure) ii(vmeasure) .options nomod .end circuit for calculating m-parameters m12 m22 (input short circuit) .lib slic.lib vcc +5v 0 5v ; positive power supply vee 0 -5v 5v ; negative power supply xslic ring tip +5v -5v vin vout slic vmeasure tip ring 0 ; for measurement of current going in ring-port vosc vout 0 ac 1 rdum ring 0 10t ; for rejecting 'floating' errors from spice,see spice manual .ac lin 39 10 3990 .print ac vr([vin]) vi([vin]) vr([vout]) vi([vout]) .print ac ir(vmeasure) ii(vmeasure) .options nomod .end circuit for calculating zsli0 (ring and tip short circuit) .lib slic.lib vcc +5v 0 5v ; positive power supply vee 0 -5v 5v ; negative power supply xslic ring ring +5v -5v vin vout slic vosc vout 0 ac 1 rdum ring 0 10t ; for rejecting 'floating' errors from spice,see spice manual .ac lin 30 10 16.0e3
semiconductor group 251 calculating slic parameters .print ac v([vout]) v([vin]) .options nomod .end circuit for calculating zsli600 (ring and tip loaded with 600 ohm) .lib slic.lib vcc +5v 0 5v ; positive power supply vee 0 -5v 5v ; negative power supply xslic ring tip +5v -5v vin vout slic vosc vout 0 ac 1 rload ring tip 600 appendix c 2 the test circuit file 'slic.cir' rdum ring 0 10t ; for rejecting 'floating' errors from spice,see spice manual .ac lin 30 10 16.0e3 .print ac v([vout]) v([vin]) .options nomod .end circuit for calculating zsliopen (ring and tip open circuit) .lib slic.lib vcc +5v 0 5v ; positiv power supply vee 0 -5v 5v ; negativ power supply xslic ring tip +5v -5v vin vout slic vosc vout 0 ac 1 rload ring tip 10t ; for rejecting 'floating' errors from spice,see spice manual rdum ring 0 10t .ac lin 30 10 16.0e3 .print ac v([vout]) v([vin]) .options nomod .end
semiconductor group 252 calculating slic parameters appendix d the converting program in pseudo language. available on request
semiconductor group 253 calculating slic parameters appendix e diagram of the measurement system
semiconductor group 254 calculating slic parameters appendix f measurements results and correlation byte file following byte file was loaded into the sicofi before performing the measurements: spice.byt psr = 36 cam00 = 41 cam20 = 40 ciw0 = 26,f4,80 ciw0 = 13,60,b2,3d,73,19,25,e3,2d ciw0 = 23,70,c8,9f,7f,3b,37,04,a6 ciw0 = 2b,70,b8,af,72,c3,9f,01,cf ciw0 = 03,b2,eb,ec,31,22,bb,42,12 ciw0 = 0b,00,1c,3e,12,1b,5b,16,b3 ciw0 = 18,19,19,11,19 ciw0 = 30,51,12,00,bb sig0 = c0 ciw0 = 25,00,08,f4,78 measurements level measurements: (with a 1 khz sine wave) a-d: C 3.28 dbm0 correct but would have to be corrected in a real application d-a: 3.00 dbm0 correct the other measurements results from the pcm4 (wandel & goltermann) are shown in the next pages. return loss (reflex.daem.) correct trans hybrid loss (pegelmess. dd) correct frequency response (frequenzgang) correct correlation the correlation between measured results and calculated results can be seen on the plots of return loss and trans hybrid loss.
semiconductor group 255 calculating slic parameters
semiconductor group 256 calculating slic parameters
semiconductor group 257 calculating slic parameters appendix g the sicofi ? file 'usa.spe' fref = 1014.0 law = a vref = 0.7750 rlx = -3.0 rlr = +3.0 abimp = zi zlrp1 = 600. zlcp1 = 0. zlrp2 = 0. zlcp2 = 0. zlrs = 000. zlcs = 0. zirp1 = 600. zicp1 = 0. zirp2 = 0. zicp2 = 0. zirs = 000. zics = 0. z3rp1 = 600. z3cp1 = 0. z3rp2 = 0. z3cp2 = 0. z3rs = 000. z3cs = 0. zrrp1 = 600. zrcp1 = 0. zrrp2 = 0. zrcp2 = 0. zrrs = 000. zrcs = 0. zre fr 300 500 1k 3.4k at- 0 20 30 30 at+ 20 26 30 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0
semiconductor group 258 calculating slic parameters ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0 appendix h the sicofi ? file 'spice.ctl' spec = usa.spe slic = slic.sli byte = ref.byt chnr = 0,a version = 4.2 rel = n on = all opt = z+x+r+b zxrb = nnnn zauto = n pzin = 11 psp = 3 fzp = 300.0 500.0 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = 0.100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr 300.00 3400.0 rdisp = y rrefq = n fx 300.00 3400.0 xdisp = y xrefq = n bauto = n pb = 10 gwfb = 0.500e-01 bdf = 1 fbp = 300.0 500.0 700.0 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.000 2.000 1.000 5.000 1.000 2.000 1.000 5.000 1.000 1.000 apre = 0.0 dpre = 0.0 apof = 0.0 dpof = 0.0 agr = 00 agx = 00 tm3 = 000
semiconductor group 259 calculating slic parameters appendix i 1 the result file 'spice.res' input_file_name: spice.ctl date: 30.06.89 18:24 spec = usa.spe slic = slic.sli byte = ref.byt chnr = 0,a plq = n on = all version = 4.2 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = y zrep = n zsign = 1 fz = 300.00 3400.0 zlim = 2.00 pzin = 11 psp = 3 fzp = 300.00 500.00 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = .100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr = 300.00 3400.0 rdisp = y rrefq = n rref = .51659e-01 fx = 300.00 3400.0 xdisp = y xrefq = n xref = -.17369 bauto = y brep = n bsign = 1 fb = 300.00 3400.0 blim = 2.00 bdf = 1 pb = 10 gwfb = .500e-01 fbp = 300.00 500.00 700.00 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 apre = .00 dpre = .00 apof = .00 dpof = .00 agx = 00 agr = 00 tm3 = 000 xzq = -.15014650e-01 .40039060e-01 .19531250e-02 -.35644530e-01 .19042970e-01 xrq = .99267580e+00 -.19531250e-02 .87280270e-02 -.53710940e-02 .97656250e-03 xxq = .10117190e+01 .88500980e-02 .67138670e-02 -.39367680e-02 .48828130e-03 xbq = .85937500e-01 -.10546880e+00 .16406250e+00 -.61035160e-01 -.10961910e+00 .10546880e+00 .31982420e-01 -.17968750e+00 .17187500e+00 -.93261720e-01 xgq = .52148440e+00 .18906250e+01 ;
semiconductor group 260 calculating slic parameters bytes for z-filter (13): 60,b2,3d,73,19,25,e3,2d bytes for r-filter (2b): 70,b8,af,72,c3,9f,01,cf bytes for x-filter (23): 70,c8,9f,7f,3b,37,04,a6 bytes for gain-factors (30): 51,12,00,bb 2nd part of bytes b-filter (0b): 00,1c,3e,12,1b,5b,16,b3 1st part of bytes b-filter (03): b2,eb,ec,31,22,bb,42,12 bytes for b-filter delay (18): 19,19,11,19 * pspice library containing slic: * .lib slic2op.lib * pspice model name of slic: * xownslic ring tip +5v -5v vin vout slic2op run # 1 z-filter calculation results reference impedance for optimization: zirp1 = 600. zicp1 = .000 zirp2 = 0. zicp2 = .000 zirs = 0. zics = .000 calculated and quantized coefficients: xz = -.01499 .04049 .00226 -.03554 .01916 xzq = -.01501 .04004 .00195 -.03564 .01904 bytes for z-filter (13): 60,b2,3d,73,19,25,e3,2d return loss freq loss freq loss (hz) (db) (hz) (db) 100. 19.065 2000. 41.828 200. 26.269 2100. 41.702 300. 29.910 2200. 41.502 400. 32.327 2300. 41.332 500. 34.117 2400. 41.168 600. 35.549 2500. 41.007 700. 36.694 2600. 40.851 800. 37.657 2700. 40.711 900. 38.519 2800. 40.586 1000. 39.272 2900. 40.470 1100. 39.931 3000. 40.349 1200. 40.452 3100. 40.215
semiconductor group 261 calculating slic parameters appendix i 2 the result file 'spice.res' 1300. 40.845 3200. 40.057 1400. 41.244 3300. 39.855 1500. 41.552 3400. 39.627 1600. 41.770 3500. 39.365 1700. 41.898 3600. 38.957 1800. 41.942 3700. 38.460 1900. 41.911 3800. 37.871 min. z-loop reserve: 23.686 db at frequency: 8500.0 hz min. z-loop mirror reserve: 28.394 db at frequency: 9000.0 hz run # 1 x-filter calculation results reference impedance for optimization: zirp1 = 600. zicp1 = .000 zirp2 = 0. zicp2 = .000 zirs = 0. zics = .000 calculated and quantized coefficients: xx = 1.01201 .00886 .00670 -.00391 .00064 xxq = 1.01172 .00885 .00671 -.00394 .00049 bytes for x-filter (23): 70,c8,9f,7f,3b,37,04,a6 x-filter attenuation function (in db), (always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. -.204 .002 2000. -.048 -.001 200. -.204 .002 2100. -.035 -.002 300. -.203 .002 2200. -.023 -.002 400. -.201 .002 2300. -.013 -.003 500. -.199 .002 2400. -.005 -.003 600. -.196 .002 2500. .000 -.003 700. -.192 .002 2600. .002 -.003 800. -.187 .002 2700. .001 -.003 900. -.182 .002 2800. -.003 -.003 1000. -.175 .002 2900. -.010 -.002 1100. -.167 .001 3000. -.019 -.002 1200. -.157 .001 3100. -.031 -.002 1300. -.147 .001 3200. -.044 -.001 1400. -.135 .001 3300. -.057 -.000 1500. -.122 .001 3400. -.071 .000 1600. -.108 .000 3500. -.085 .001 1700. -.093 -.000 3600. -.097 .001 1800. -.078 -.001 3700. -.107 .002 1900. -.063 -.001 3800. -.114 .002
semiconductor group 262 calculating slic parameters gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z agx vref/vsic xref tm3 gx -3.00 - -3.65 - .00 - 6.17 - -.17 - .00 = -5.53 ideal -3.00 = -3.65 + .00 + 6.17 + -.17 + .00 + -5.53 quant second byte for gain: ,00,bb calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .052 ms tgref cb = .065 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 15.930 3.431 2000. .038 .209 200. .445 2.226 2100. .045 .214 300. .036 .871 2200. .048 .219 400. .043 .527 2300. .058 .226 500. .037 .387 2400. .062 .234 600. .024 .315 2500. .065 .243 700. .014 .274 2600. .067 .253 800. .007 .248 2700. .069 .266 900. .001 .230 2800. .073 .281 1000. -.000 .219 2900. .079 .299 1100. -.001 .211 3000. .088 .321 1200. -.001 .206 3100. .104 .348 1300. -.000 .202 3200. .134 .382 1400. .003 .200 3300. .188 .425 1500. .007 .200 3400. .280 .483 1600. .012 .200 3500. .435 .563 1700. .018 .201 3600. .725 .683 1800. .025 .203 3700. 1.324 .878 1900. .031 .206 3800. 2.789 .000 run # 1
semiconductor group 263 calculating slic parameters appendix i 3 the result file 'spice.res' r-filter calculation results reference impedance for optimization: zirp1 = 600. zicp1 = .000 zirp2 = 0. zicp2 = .000 zirs = 0. zics = .000 calculated and quantized coefficients: xr = .99291 -.00166 .00870 -.00524 .00138 xrq = .99268 -.00195 .00873 -.00537 .00098 bytes for r-filter (2b): 70,b8,af,72,c3,9f,01,cf r-filter attenuation function (in db), (always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. .043 .000 2000. .132 -.002 200. .043 .000 2100. .141 -.002 300. .043 .000 2200. .149 -.003 400. .043 .001 2300. .154 -.003 500. .044 .001 2400. .156 -.003 600. .044 .001 2500. .155 -.003 700. .045 .001 2600. .150 -.003 800. .046 .001 2700. .141 -.003 900. .048 .001 2800. .129 -.003 1000. .051 .001 2900. .112 -.002 1100. .055 .001 3000. .093 -.002 1200. .060 .001 3100. .071 -.001 1300. .066 .001 3200. .047 .000 1400. .073 .000 3300. .022 .001 1500. .081 .000 3400. -.002 .002 1600. .090 .000 3500. -.024 .003 1700. .100 -.000 3600. -.044 .003 1800. .111 -.001 3700. -.061 .004 1900. .122 -.001 3800. -.074 .004 gr results: all attenuation values (in db) refer to fref = 1014. hz -rlr slic+z agr vsic/vref rref gr 3.00 - 3.46 - .00 - -6.17 - .05 = 5.66 ideal 3.00 = 3.46 + .00 + -6.17 + .05 + 5.66 quant first byte for gain (30): 51,12 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz
semiconductor group 264 calculating slic parameters tgref ca = .241 ms tgref cb = .224 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 1.564 .947 2000. .038 .032 200. .102 .146 2100. .045 .037 300. .047 .045 2200. .049 .044 400. .027 .018 2300. .058 .051 500. .018 .008 2400. .063 .060 600. .014 .003 2500. .066 .070 700. .008 .001 2600. .068 .081 800. .004 .000 2700. .070 .095 900. .002 .000 2800. .072 .110 1000. .000 .001 2900. .076 .129 1100. -.001 .002 3000. .083 .152 1200. -.002 .004 3100. .100 .179 1300. -.003 .006 3200. .131 .213 1400. -.001 .009 3300. .183 .257 1500. .003 .012 3400. .272 .315 1600. .008 .015 3500. .430 .396 1700. .017 .018 3600. .726 .517 1800. .023 .022 3700. 1.329 .712 1900. .030 .027 3800. 2.799 1.049 run # 1 b-filter calculation results reference impedance for optimization: zlrp1 = 600. zlcp1 = .000 zlrp2 = 0. zlcp2 = .000 zlrs = 0. zlcs = .000 calculated and quantized coefficients: xb = .08614 -.10297 .16350 -.06106 -.10973 .10419 .03201 -.17924 .17427 -.09337 xbq = .08594 -.10547 .16406 -.06104 -.10962 .10547 .03198 -.17969 .17188 -.09326
semiconductor group 265 calculating slic parameters appendix i 4 the result file 'spice.res' 2nd part of bytes b-filter (0b): 00,1c,3e,12,1b,5b,16,b3 1st part of bytes b-filter (03): b2,eb,ec,31,22,bb,42,12 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 28.584 2000. 32.789 200. 21.368 2100. 32.011 300. 21.095 2200. 31.770 400. 33.727 2300. 32.031 500. 39.889 2400. 32.757 600. 36.865 2500. 34.043 700. 33.670 2600. 35.901 800. 31.997 2700. 38.039 900. 31.229 2800. 38.729 1000. 31.095 2900. 37.603 1100. 31.565 3000. 35.853 1200. 32.668 3100. 34.491 1300. 34.487 3200. 33.943 1400. 37.010 3300. 34.404 1500. 40.057 3400. 36.180 1600. 41.308 3500. 38.897 1700. 39.164 3600. 37.350 1800. 36.295 3700. 32.824 1900. 34.169 3800. 30.941 additional b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 266 calculating slic parameters appendix j the batch file 's.bat' set pspicelib = c:\pspice;c:\slic; | | | location of the customer spice libraries location of the spice program and libraries pspice1 %1.cir %1.out | | | | | spice output file | spice input file spice program slic %1.out %1.sli | | | | | converting program output = slic input file for | | sicofi program | converting program input converting program
semiconductor group 267 calculating slic transfer functions contents page preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269 2 sicofi ? software principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270 3 conversion program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273 3.1 features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273 3.2 batch file kspice.bat. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274 3.3 slic description by k-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274 3.3.1 definition of the k-parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274 3.3.2 zsli . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277 4example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278 4.1 basic set-up of sicofi ? and slic pbl 3736. . . . . . . . . . . . . . . . . . . . . . . . . . . 278 4.2 model of slic pbl 3736 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 280 4.3 how to edit the library file 'pbl3736.lib' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282 4.4 the spice input file 'kslic.cir' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285 4.5 format of the spice output file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286 4.6 how to use the conversion program 'kconvert.exe' . . . . . . . . . . . . . . . . . . 288 4.7 format of the sicofi ? input file. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290 4.8 results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291 4.9 comparison between measurement results and simulation results . . . . . . . . . 291 5literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292 appendices: appendix a: the library file 'pbl3736.lib' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293 appendix b: the test circuit file 'kslic.cir' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296 appendix c: diagram of the measurement system . . . . . . . . . . . . . . . . . . . . . . . . . . . 299 appendix d: plots of measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 appendix e: sicofi ? files 'usa.spe' and 'brd.spe'. . . . . . . . . . . . . . . . . . . . . . . . 312 appendix f: control file 'ksicofi.ctl' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314 appendix g: result files 'k_usa.res' and 'k_brd.res' . . . . . . . . . . . . . . . . . . . . . 315 appendix h: the batch file 'kspice.bat' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
semiconductor group 268 calculating slic transfer functions calculating slic transfer functions of the ericsson slic pbl 3736 using k- parameters and spice preface a solution to the problem of modeling slics and calculating sicofi coefficients for slics is submitted. this is realized by combining an arbitrary spice program and the conversion program 'kconvert.exe'. the conversion program links the spice software to the sicofi coefficients program. in contrast to a former application note (2.90), k-parameters are used for describing the slic. the slic treated is the ericsson slic pbl 3736. a detailed description of the conversion program is given, and its practical use is exemplified. as an example a hardware setup is shown that meets the german as well as the us-american specifications just by programming the sicofi correspondingly. to read this application note with profits, the sicofi coefficients program and generalities about the slic file format and the spice input files should be known.
semiconductor group 269 calculating slic transfer functions 1 introduction in a digital telephone system the subscriber line interface makes up a very complex structure. in the past it has turned out practical for realization purposes to split one of its main functions, the hybrid function, into the actual two-to-four wire transition (subscriber line interface circuit: slic) and in some means of signal processing, hybrid balancing and impedance matching (signal processing codec filter: sicofi). to make the various existing slic solutions operate optimally under different country specific conditions the sicofi may be tuned to the particular slic by software ("coefficients" obtained by the sicofi coefficients program). therefore, however, the transfer functions of the respective slic must be known. there are several ways to describe the behaviour of a slic. one method is to use k- parameters. in any case it is necessary to write a new program for each new type of slic. this process is not only time consuming but also prone to errors in the software model. the simulation of analog circuits can also be done by using general programs like spice (we used a demo version* of the program pspice furnished by microsim corp.). since the output file provided by spice is not suited as input file for the sicofi coefficients program, a conversion program was written in fortran. this conversion program converts the spice output file into an input file for the sicofi coefficients program. it uses k-parameters in a form that is compatible with the sts 2060 sicofi coefficients program. (c.f. also "calculating slic parameters using spice"). in particular this application note shows how to match the sicofi peb 2060 to the ericsson slic pbl 3736 . terminology: slic: subscriber line interface circuit. sicofi: signal processing codec filter (peb2060). in the following we will call "slic" the hardware and software corresponding to the analog components in a subscriber line interface circuit excluding the sicofi chip. please note that the conversion program, which calculates k-parameters from the spice output file, is called kconvert.exe. *) the demo version is a version of reduced features of pspice (c.f. section 4.3). it is available on request o n diskette free of charge by siemens hl it at, balanstr. 73, d-8000 mnchen 80.
semiconductor group 270 calculating slic transfer functions 2 sicofi ? software principle the main functions of a subscriber line interface circuit (slic) are to provide the borsht functions (battery feeding, overvoltage protection, ringing, signaling, hybrid function, testing). in the case of a slic being used in combination with the sicofi, the hybrid function is split into the two-wire to four-wire conversion realized by the slic, and the impedance matching, hybrid balancing and gain adjustment provided by the internal filters of the sicofi. the other functions (such as off-hook detection, metering, standby mode, ringing) may also affect the speech signal, but will not be considered in the slic example described below. as has been told, the hardware can be split into two parts: the slic and its external circuitry on one side and the sicofi on the other side ( see figure 1 ). figure 1 slic-sicofi ? hardware according to its functions, a slic and its periphery make up a rather complicated circuit structure ( see figure 13 ). analyzing the slic (e.g. simulating its transfer characteristics) is facilitated in using e.g. pspice. in doing so the thus gained spice output file is not compatible with the sicofi program; it may, however, be adapted by using the conversion program 'kconvert.exe' ( see figure 3 ). figure 2 slic-sicofi ? software in a similar way, the software consists of two major sections: the slic description file (.sli file) and the sicofi program. figure 3 software structure
semiconductor group 271 calculating slic transfer functions the detailed structure of the spice and sicofi software is shown below ( figure 4 ). figure 4 detailed software structure in the following the various spice library files are reviewed. pbl3736.lib all the specific values concerning the slic and its external circuitry (physical data, filter dimensions, ...) are gathered in a spice input file pbl3736.lib. if you want to simulate the slic with a different external circuitry, you have to make the corresponding changes in this file. kslic.lib the file kslic.lib provides the description of a particular slic circuit via the file pbl3736.lib. the main advantage of this procedure is, that the file kslic.lib acts like a black box containing the relevant slic: while the black box and its connections remain unchanged, the slic circuitry inside the box can easily be replaced by simply changing the names of the slic sub-circuit and it's library pbl3736.lib.
semiconductor group 272 calculating slic transfer functions example: if you have a model of slic no.1 in the file kslick1.lib and a model of slic no.2 in the file kslick2.lib, you could do simulations of the respective slics by exchanging the expression "kslick1.lib" for the expression "kslick2.lib" (and vice versa) in the file kslic.lib. kslic.cir contains the test circuits that do the necessary ac-analyses. the result is a spice output file. this file has to be changed depending on the line impedance and the generator impedance in your application. for an example see appendix b : the test circuit file 'kslic.cir'. the spice program analyzes the test circuits and calculates voltages and currents from which the k-parameters are deduced. the program kconvert.exe then converts the output of spice into the file kslic.sli which is compatible with the sicofi coefficients program and which contains the transmission characteristics of the slic in the form of the k-parameters. for easy use, the spice program and the conversion programs are combined in a batch file kspice.bat. this batch file is run as follows: kspice kslic (without the .cir suffix) kslic.sli is a transfer file (output/input file) between the slic program and the sicofi program to introduce the slic circuit data (k-parameters) into the sicofi program. auxiliary files: country.spe is an input file of the sicofi program describing the customer specification (ccitt etc. ...) and measurement configuration parameters (e.g. terminating impedance). the actual names used are brd.spe and usa.spe for the german and us-american specifications respectively. ref.byt indicates the name of the reference byte file. this file is used as a frame to generate a new byte file. the newly calculated coefficients are written in this frame together with predefined commands. these commands are required for sending the sicofi coefficients from the peripheral board controller pbc (peb 2051) to the sicofi. ksicofi.ctl is the control file of the sicofi program. it contains the data controlling the optimization and simulation processes. the sicofi program generates the sicofi coefficients and simulates the theoretical transfer functions of the set slic + sicofi. result.res is the output file of the sicofi program. it contains the coefficients for programming the sicofi and a list of the calculated results corresponding to various measurements on the set sicofi + slic (e.g. return loss, frequency response, echo return loss, etc....). the actual names used are k_brd.res and k_usa.res containing the calculation results according to the german and us-american specifications respectively.
semiconductor group 273 calculating slic transfer functions 3 the conversion program kconvert.exe 3.1 features l the conversion program is written in microsoft fortran and runs on an ibm pc at or compatible. l input: the circuit description file 'kslic.out' which is generated by spice (or a file generated from measurement data) serves as an input file for the conversion program. the file 'kslic.out' contains the resulting voltages of the ac-analysis executed by the spice program. the ac-analysis is done in steps of 10 hz, starting at a frequency of 10 hz and ending at a frequency of 3990 hz. in order to reduce the calculation time frequency steps larger than 10 hz may be used. in this case the missing values are interpolated . l output: the program converts the spice output file into a slic file (with suffix .sli). this *.sli file describing the characteristics of a slic is used as an input file for the sicofi coefficients program. the *.sli file contains the parameter zsli (minimal attenuation of the slic at the four wire side) and the k-parameters of the slic for each frequency from 10 hz up to 3990 hz in steps of 10 hz. l batch mode facility: the program can be started by the batch file kspice.bat . just type: kspice kslic (without the suffix .cir) or else it can be started from the keyboard by typing: pspice1 kslic.cir kslic.out kconvert kslic.out kslic.sli l flexibility: the program recognizes keywords in the spice output file. that is: C the order of the various ac-analyses does not make a difference C the zsli analysis can be missing in order to reduce the calculation time (zsli is then set to the default value of 0.5). C the program recognizes three kinds of circuits: two for the k-parameters and one for the zsli parameter calculation. since the zsli value is calculated from different load impedances (e.g. 600 w , open/short circuit) there are several circuits available for the ac-analysis of zsli.
semiconductor group 274 calculating slic transfer functions 3.2 batch file kspice.bat for a convenient use of the software, the sequence of steps necessary to run a complete analysis and to do the conversion of the spice output file into a sicofi input file has been combined in a batch file. thus by starting kspice.bat for the circuit description file kslic.cir, the resulting output file kslic.sli can directly be used as an input for the sicofi program. circuit analysis and conversion of the intermediate results is performed by starting the batch file 'kspice.bat' with the proper argument. figure 5 contents of program kspice.bat 3.3 slic description by k-parameters according to its functionality the slic operates as a three port. to describe its electrical properties five parameters are used in the sicofi program: the four k-parameters and the zsli-value. the ericsson slic pbl 3736 has a current output. therefore we need to work with k- parameters (not m-parameters!) which do not require to short-circuit the output of the slic. 3.3.1 k-parameters a slic with a generator v g and a line impedance z g across the a/b lines can be considered as a three port. it can be described by the currents and voltages at these three ports: v 1 , i 1 , v 2 , i 2 , v 3 , i 3 ( see figure 6 ). figure 6 slic and its external circuitry as a three port
semiconductor group 275 calculating slic transfer functions three equations are sufficient to describe the slic completely and any linear combination of the variables is possible. taking account of the symmetry at the a/b port let us take the following substitution: (1) a 1 = v 1 + z g i 1 (2) b 1 = v 1 C z g i 1 using these new variables the following equations can now be written: (3) b 1 = k11 a 1 + k12 v 3 + k13 i 2 (4) v 2 = k21 a 1 + k22 v 3 + k23 i 2 (5) i 3 = k31 a 1 + k32 v 3 + k33 i 2 when the slic is connected to the sicofi, we can assume that: l i 2 = 0 because the input impedance of the sicofi is very high. l i 3 is not relevant in the sicofi calculations because the sicofi works as an ideal voltage generator. according to these remarks, the equations system can be simplified as follows: (6) b 1 = k11 a 1 + k12 v 3 (7) v 2 = k21 a 1 + k22 v 3
semiconductor group 276 calculating slic transfer functions figure 7 definition of slic k11-parameter figure 8 definition of slic k12-parameter figure 9 definition of slic k21-parameter
semiconductor group 277 calculating slic transfer functions figure 10 definition of slic k22-parameter 3.3.2 zsli zsli is the minimal attenuation (resp. maximal gain) of the slic 4-wire side while the a/b lines are terminated by the terminal impedance z t ( see section 4.4 ). figure 11 definition of zsli zsli is used by the sicofi program during automatic calculation of z-filter coefficients as a reference to check for possible oscillations in the sicofi z-filter + slic loop. the value is in db and is expressed as attenuation: zsli = C 20 log ( v 2 / v 3 ) ? please verify that as v 2 is larger than v 3 , zsli is a negative quantity. in practice the attenuation of the loop "slic input to slic output" is measured over the whole frequency band 0 C 16 khz for different terminating impedances z t . the worst case (the smallest attenuation resp. the greatest gain) then is taken for zsli. the use of spice allows to obtain the zsli value without doing measurements. note: according to the nyquist criteria, the attenuation of the closed loop "z filter C slic" must be greater than 1 (gain < 0 db) in the frequency band 0 C 16 khz in order to avoid any oscillation.
semiconductor group 278 calculating slic transfer functions 4example to exemplify the synthesis of spice and the sicofi program, a circuitry consisting of the ericsson slic pbl 3736 and a sicofi is analyzed. while the slic is a real circuit of fixed properties, the sicofi is tuned by the sicofi program as to meet particular specifications imposed by country specific requirements. the results of the simulation and of the measurements of a sample circuit are compared. 4.1 basic set-up of sicofi ? and slic pbl 3736 figure 12 basic set-up of sicofi ? and ericsson slic pbl 3736
semiconductor group 279 calculating slic transfer functions the values of the components in figure 12 are: capacitors: c r = 2.2 nf c t = 2.2 nf c hp = 0.2 m f c dc = 0.15 m f c tx = 1 m f resistors: (1/4 w, 10% unless specified otherwise) r f = 20 w r t = 560 k w 0.5% r rx = 300 k w 0.5% r dc1 = 20 k w r dc2 = 20 k w r ix = 22 k w note: no attention has been paid to the overvoltage protection, signaling and loop monitoring functions in this application note because they should not influence the transmission characteristics. the b-filters of the sicofi allow for the adjustment of the transhybrid balance. therefore we do not need to utilize the resistor r b (connected between vin and vout) for the transhybrid function ( see data sheet of the ericsson slic pbl 3736 ).
semiconductor group 280 calculating slic transfer functions 4.2 model of the slic pbl 3736 the simplified model of the slic is shown inside the dashed line in figure 13 . this slic model as well as the external circuitry that is connected to the slic is listed in the spice file 'pbl3736.lib' ( see appendix a ). figure 13 slic model and external circuitry
semiconductor group 281 calculating slic transfer functions the values of the different components of figure 13 are listed below: r f = 20 w fuse resistors c t = 2.2 nf c r = 2.2 nf r dc1 = 20 k w dc path r dc2 = 20 k w dc path c dc = 0.15 m f dc path c hp = 0.2 m f high pass filter in transmit direction r t = 560 k w matching impedance r rx = 300 k w gain impedance c tx = 1 m f high pass filter r ix = 22 k w high pass filter
semiconductor group 282 calculating slic transfer functions 4.3 how to edit the library file pbl3736.lib this chapter describes how to define a slic-circuit in a library file. the library file can be edited with any text editor, unless it creates embedded control characters. for this example we refer to the file pbl3736.lib, which is listed in the appendix. the rules for the format of spice files are: C the first line is a title line, which is not part of the circuit but is used only for documentation purposes or comment. C the last line is the .end statement. C comment lines start with an "*" in the first column. C continuation lines start with a "+" in the first column. the names of parts in the circuit must begin with a letter. the following characters can be letters or numbers (example: 'rxy123' is the name of a resistor). the nodes to which the parts are attached to can be names made up of letters and/or numbers (example: vout, vin, 1, 2, 3). nodes "0" stand for ground. component values may be written in floating-point notation (example: 1.2eC6, 1.8e6) or with a scale suffix (example: 1.2 m , 1.8 meg). valid scale suffixes are: f = 10 C15 femto p = 10 C12 pico n = 10 C9 nano u = 10 C6 micro m = 10 C3 milli k = 10 +3 kilo meg = 10 +6 mega g = 10 +9 giga t = 10 +12 tera the slic circuit described in the file pbl3736.lib is written in the subcircuit ericssonslic: .subckt ericssonslic ring tip + 12 v C 12 v vin vout the number of nodes (here: ring, tip, + 12 v, C 12 v, vin, vout) in the calling program must be the same as in the subcircuit itself. the .subckt statement is followed by a listing of the components in the slic circuit. itemized below are the components that can be used with the demo version of pspice. elements like transistors, diodes etc. are not available. to simulate more elaborate slic circuits you will need the full-featured version of pspice. notation: (name) comment [item] optional item [item]* zero or several items - required item
- * one or several items
semiconductor group 283 calculating slic transfer functions the most commonly used parts are: capacitor general form: c <(+)node> <(C)node> example: * capacitor (first letter "c") situated between * | node tipx * | | and ground * | | | value of the capacitor (in farad) * | | | | ct tipx 0 2.2 nf voltage-controlled voltage source (ideal operational amplifier) general form: e <(+)node> <(C)node> <(+ controlling) node> + <(C controlling) node> example: * e(name) (+)node (C)node * | | | (+controlling) node * | | | | (-controlling) node * | | | | | gain * | | | | | | e1 2 0 3 1 1.0e4 current-controlled current source general form: pf <(+)node> <(C)node> <(controlling v device) name> example: * f(name) (+)node (C)node (controlling * | | | v device)name * | | | | * | | | | * | | | | gain * | | | | | * | | | | | f1 3 0 vrsn 2 inductor coupling general form: k l<(inductor) name> * + <(coupling) value> example: * inductive coupling between * inductance l2 and * | inductance l3 with the * | | coupling factor k23 * | | | k23 l2 l3 0.997 the coupling factor must be between 0 and 1.
semiconductor group 284 calculating slic transfer functions inductor general form: l <(+)node> <(C)node> [<(model) name>] example: * inductor (first letter "l") situated between * | node 1 and * | | node 2 * | | | value of the inductance (in henry) * | | | | l2 1 2 1.23h resistor general form: r <(+)node> <(C)node> [(model) name] example: * resistor (first letter "r") situated between * | node tip and * | | node tipx * | | | value of the resistor (in ohm) * | | | | rf1 tip tipx 20 independent voltage source general form: v <(+)node> <(C)node> + [[dc] ][ac <(magnitude) value> [(phase) value]] example: * v(name) (+)node (C)node (dc)value * | | | | * | | | | vrsn .rsn 0 dc2
semiconductor group 285 calculating slic transfer functions 4.4 the spice input file 'kslic.cir' the circuit description file kslic.cir is the input file from which spice generates all the output variables necessary for the conversion program. according to chapter 3.3 two circuits are simulated, one circuit for the parameters k11 and k21 ( figures 7 and 9 ), and one circuit for calculating the parameters k12 and k22 ( figures 8 and 10 ). the k11 and k21 parameters are calculated from the frequency response of the complex variables v 1 , the voltage between "ring" and "tip" (port 1 of the slic), v 2 , the voltage at vin (port 2 of the slic), and v (1a,ring) , voltage across line/generator ac impedance (across z g ). the k12 and k22 parameters are calculated from the frequency response of the complex variables v 1 , the voltage between "ring" and "tip" (port 1 of the slic), v 2 , the voltage at vin (port 2 of the slic), v 3 , the voltage at vout (port 3 of the slic). the spice listing of these two circuits can be found in the first part of the file ' kslic.cir ' (appendix b). in order to find the minimal attenuation of the slic at the four wire side (zsli), three circuits are simulated with the following terminating conditions at port 1: one with a short circuit between "ring" and "tip", one with a 600 w or a complex load between "ring" and "tip", and one with an open circuit between "ring" and "tip". this yields three values for zsli = C 20 log( v 2 / v 3 ) the magnitudes of the voltages v 2 and v 3 at vin and vout result from a spice ac-analysis. the smallest attenuation value out of these zsli's is then used for the calculations. the spice listing of these three circuits are found in the second part of the file 'kslic.cir' (appendix b).
semiconductor group 286 calculating slic transfer functions 4.5 format of the spice output file the output file of spice generated by the circuit description file 'kslic.cir' consists of the ac-analyses for the k-parameters and the ac-analyses for the zsli values. each of these ac-analyses is arranged as follows (keywords which are recognized by the conversion program are printed in bold types): a) a title line with one or two keywords to identify the circuit. the keywords can be one of the following: C k11 and k21 C k12 and k22 C zsli . b) name of the library with the slic .lib c) description of test circuit x slic ring tip + 5 v C 5v vin vout . commands for starting analysis . .end d) ac-analysis output of spice ac analysis . one of these lines: freq vr(vin) vi(vin) vr(ring,tip) vi(ring,tip) or freq vr(vin) vi(vin) vr(vout) vi(vout) or freq vr(1a,ring) vi(1a,ring) or freq vr(ring,tip) vi(ring,tip) or freq v(vout) v(vin) depending on the part of the output empty line empty line 1.000e+01 1.000e+00 7.167eC 08 ......... . all points of ac analysis . 1.600e+04 1.000e+00 1.993eC 04 ......... line without scientific reals.
semiconductor group 287 calculating slic transfer functions end of file or next part of spice output. the first column of the ac-analysis shows the frequency value, the adjacent columns contain the corresponding real and imaginary parts of the variable for that particular frequency. the conversion program will use this spice output data to calculate the four k-parameters. the spice output contains only voltages. all k-parameters can easily be calculated from these voltages. as k11 originally is represented by impedances ( see figure 7 ), the equivalence of the representation by voltages and impedances is shown below. v (ring,tip) C v (1a,ring) = v 1 i 1 C v (ring,tip) + v (1a,ring) k11 = = z in C z g z in + z g v (1a,ring) i 1 v 1 i 1 + v (1a,ring) i 1
semiconductor group 288 calculating slic transfer functions 4.6 how to use the conversion program 'kconvert.exe' to calculate the parameters of a slic, procede as follows: 1. set up a library file containing the slic data. 2. prepare a library file with the description of the slic subcircuit for spice. 3. put the name of this library file and of the subcircuit to the proper place in the 'kslic.lib' file. 4. execute the spice program with the 'kslic.cir' file as argument. 5. execute the conversion program 'kconvert.exe' with the arguments 'kslic.out kslic.sli' 6. then run the sicofi program. an example of a control file is given in 'ksicofi.ctl' note: steps 3 and 4 are put together in the batch file 'kspice.bat'. (type: ' kspice kslic ' without extension). example: calculation of the slic 'pbl3736' in the library file 'pbl3736.lib' (for more information on how to use this file, please refer to the manual of pspice [2]). words to be edited in the file 'kslic.lib' are printed in bold types ( see figure 14 ). figure 14 the file 'kslic.lib' before editing. the spaces for xxxxxxxx.lib and yyyyyyyy are to be filled with the correct library file name and the particular slic subcircuit name. * file for accessing the proper slic with no changes in the * kslic.cir file * * change "xxxxxxx.lib" into the name of the library file * with your particular slic subcircuit .lib xxxxxxx.lib * change the model name "yyyyyyyy" into the name of your * particular subcircuit .subckt slic ring tip +5v -5v vin vout xownslic ring tip +5v -5v vin vout yyyyyyy .ends kslic
semiconductor group 289 calculating slic transfer functions after editing, the file looks as follows ( see figure 15 ): figure 15 the file 'kslic.lib' after editing. the bold typed words have been changed. * file for accessing the proper slic with no changes in the * kslic.cir file * * change "kslic.lib" into the name of the library file with * your particular slic subcircuit .lib kslic.lib * change the model name "ericssonslic" to the name of your * particular subcircuit .subckt slic ring tip +5v -5v vin vout xownslic ring tip +5v -5v vin vout ericssonslic .ends kslic now the batch file 'kspice.bat' can be executed and unless errors are reported, the output file 'kslic.sli' can be used in the sicofi program. for the use of the sicofi program please refer to the software description of the sts 2060 sicofi coefficients program [3]
semiconductor group 290 calculating slic transfer functions 4.7 format of the sicofi ? input file the sicofi input file is listed below (keywords are set in bold type): * pspice library used for calculating | comment * .lib kslic.lib | lines * pspice model used for calculating | start * k-parameters | with "*" * xslic ring tip +5v -5v vin 0 slic zsli .41905 k11-table 10.000000 2.978000e-03 -8.219000e-04 20.000000 2.856892e-03 -7.672104e-04 .............. ................... ........................ 3980.000000 1.671095e-03 -9.220666e-05 3990.000000 1.671000e-03 -9.240000e-05 k12-table 10.000000 5.185000e-04 1.064000e-03 20.000000 6.787197e-04 9.931213e-04 .............. ................... ........................ 3980.000000 2.234000e-03 -1.258381e-04 3990.000000 2.234000e-03 -1.262000e-04 k21-table 10.000000 1.864000e-01 -3.890000e-01 20.000000 3.144297e-02 -3.902608e-01 .............. ................... ........................ 3980.000000 -1.515000 9.331572e-02 3990.000000 -1.515000 9.361000e-02 k22-table 10.000000 5.157000e-01 -2.201000e-01 20.000000 3.803514e-01 -2.266998e-01 .............. ................... ........................ 3980.000000 -1.515000 9.331572e-02 3990.000000 -1.515000 9.361000e-02 the leading comment lines (starting with an "*") document which slic is being used. the first column of the k-parameter tables indicates the frequency value, running from 10 hz to 3990 hz in steps of 10 hz. the second column gives the values of the real parts and the third column the values of the imaginary parts of the k-parameters. the three values listed in one line are separated by at least one space character. each real number must contain a decimal point. (fortran "real" format.)
semiconductor group 291 calculating slic transfer functions 4.8 results after simulating the slic, listed in the file pbl3736.lib, the sicofi coefficients program calculates the programming bytes. the result files of the sicofi program are stored in 'k_usa.res' and 'k_brd.res', the calculated programming bytes are stored in the files 'k_usa.byt' and 'k_brd.byt'. with these bytes the sicofi has been programmed and measurements have been taken with the ericsson slic pbl3736 plugged into the stut 2060 test board as shown in appendix c. the measurements comprise the levels in transmit direction (ad) and in receive direction (da), the attenuation distortion (ad and da), the transhybrid loss (dd), and the 2-wire impedance return loss. the plots of the measurements can be found in appendix d. the plot masks for the return loss correspond to the german and the us-american specifications, respectively. in our example these two different country specifications are met with just one hardware setup. 4.9 comparison between measurement results and simulation results in appendix d simulation results of the return loss and the transhybrid loss are compared with the measurement results. for the z-filter switched off, the calculated curves for the return loss are in very good agreement with the measured curves. with the z-filters switched on, there are differences between the simulated curves and the measured curves. the same is true for the transhybrid loss. when the b-filter is switched off, the measured transhybrid loss is close to the calculated curve. with the b-filter switched on, the measured result differs from the calculated result. the differences between the respective curves may be due to the fact that a simplified transmission model of the slic was used. conclusion: C using the spice simulation program one can model a slic efficiently. in combination with the conversion program 'kconvert.exe' the k-parameters are calculated. with the k-parameters as an input to the sicofi coefficients program one can compute coefficients for the sicofi. C a single hardware setup can meet the specifications of different countries just by programming the sicofi with the corresponding sets of coefficients.
semiconductor group 292 calculating slic transfer functions 5literature [1] pspice microsim corporation 20 fairbanks, irvine, california 92718 [2] software description sts 2060, sicofi coefficients program version 3.x, january 1989 siemens a.g.
semiconductor group 293 calculating slic transfer functions appendix a library file pbl3736.lib ericsson slic pbl3736 * * version 1.0 by m. beck (based on simulations done by t. selden (rolm) * and m. van buuren) * * if you want to change the external circuitry of the slic pbl 3736, you have to make * changes in this file (see external circuitry) * example: instead of having a 299 k w resistor between the nodes rsn and vout * you would like to have a 200 k w resistor. in this case you would * replace the line * rrx rsn vout 299 k * by the line * rrx rsn vout 200 k * * ring tip vcc vee vin vout * |||||| * |||||| .subckt ericssonslic ring tip +12 v C12 v vin vout * * resistances to avoid "floating nodes" * rdummy1 +12 v 0 10g rdummy2 C12 v 0 10g ********************************************************************** * external circuitry * * resistor (first letter "r") situated between * | node1 * | | and node2 * | | | value of the resistor (in w ) * | | | | rf1 tip tipx 20 rf2 ring ringx 20 rdc1 rdc 9 20 k rdc2 9 rsn 20 k rt vtx rsn 560 k rix vin 0 21.92 k rrx rsn vout 299 k *
semiconductor group 294 calculating slic transfer functions * capacitor (first letter "c") situated between * | node1 * | | and node2 * | | | value of the capacitor (in farad) * | | | | ct tipx 0 2.2 nf cr ringx 0 2.2 nf cdc 9 0 0.15 m f ctx vtx vin 0.981 m f chp 10 0 0.2205 m f ********************************************************************** * simplified ac transmission circuit of the slic * * resistor (first letter "r") situated between * | node1 * | | and node2 * | | | value of the resistor (in ) * | | | | rf1a tipx 1 20 rf2a ringx 4 20 rop1 1 2 1 rop2 4 5 1 rop3 tipx 3 9.98 k rop4 ringx 6 9.98 k rhp 7 10 401.9 k rlp1 7 7a 20 * * capacitor (first letter "c") situated between * | node1 * | | and node2 * | | | value of the capacitor (in farad) * | | | | c7 1 0 6000 m f c8 4 0 6000 m f c9 7a 0 6000 m f * * independent voltage source * * v(name) (+)node (C)node (dc)value * | | | | * | | | | vrsn rsn 0 dc 0 * * current controlled current source * w
semiconductor group 295 calculating slic transfer functions * f(name) (+)node (C)node (controlling v device)name * | | | | * | | | | * | | | | gain * | | | | | * | | | | | f1 3 0 vrsn 2 f2 0 6 vrsn 2 * * voltage-controlled voltage sources * * e(name) (+)node (C)node * | | | (+controlling) node * | | | | (Ccontrolling) node * | | | | | gain * | | | | | | e1 2 0 3 1 1.0e4 e2 5 0 6 4 1.0e4 e3 7 0 tipx ringx 1.0 e4 rdc 0 7a 0 0.05 e5 vtx 0 7 10 1.0 .ends ericssonslic .end
semiconductor group 296 calculating slic transfer functions appendix b test circuit kslic.cir circuit for calculating k-parameters * * this program does an ac-analysis of the slic circuit. the results of the ac-analysis are * used to calculate the k-parameters of the slic circuit ( see chapter 3.3.1 k-parameters ). * * version 3.1 by ed van leeuwen * version 3.2 by mark van buuren * version 3.3 by klaus kliese, manfred beck * * note: * this ac-analysis is valid for a 600 impedance (usa requirements). if you wish to * do calculations for other country specifications, you have to change the generator * impedance rg and the load impedance rload. to give you an example, the * generator and the load impedances according to the german requirements (complex * impedances) are written as comment lines below the impedances of the us-american * requirements * * circuit for calculating k-parameters k11 k21 (vout = 0) .lib kslic.lib vcc +12v 0 12v vee 0 C12v 12v xslic ring tip +12v C12v vin vout slic vg 1a tip ac 1.0 vosc vout 0 dc 0 * generator impedance according to us-american requirements rg 1a ring 600 * generator impedance according to german requirements * rgs 1a 1b 220 * rgp 1b ring 820 * cgp 1b ring 115 nf .ac lin 399 10 3990 .print ac vr([vin]) vi([vin]) vr([ring],[tip]) vi([ring],[tip]) .print ac vr([1a,ring]) vi([1a,ring]) .options nomod .probe ; *ipsp* .end circuit for calculating k-parameters k12 k22 (v1 = Czg.i1) .lib kslic.lib vcc +12v 0 12v vee 0 C12v 12v xslic ring tip +12v C12v vin vout slic vosc vout 0 ac 1.0 * generator impedance according to us-american requirements w
semiconductor group 297 calculating slic transfer functions rg ring tip 600 * generator impedance according to german requirements * rgs ring 1a 220 * rgp 1a tip 820 * cgp 1a tip 115 nf .ac lin 399 10 3990 .print ac vr([vin]) vi([vin]) vr([vout]) vi([vout]) .print ac vr([ring],[tip]) vi([ring],[tip]) .options nomod .probe .end circuit for calculating zsli0 (ring and tip short circuit) .lib kslic.lib vcc +12v 0 12v vee 0 C12v 12v xslic ring tip +12v C12v vin vout slic vosc vout 0 ac 1.0 vload ring tip 0 .ac lin 30 10 16.0e3 .print ac v([vout]) v([vin]) .options nomod .probe .end circuit for calculating zsliload (load impedance between ring and tip) .lib kslic.lib vcc +12v 0 12v vee 0 C12v 12v xslic ring tip +12v C12v vin vout slic vosc vout 0 ac 1.0 * load impedance according to us-american requirements rload ring tip 600 * load impedance according to german requirements * rloads ring 1a 220 * rloadp 1a tip 820 * cloadp 1a tip 115 nf .ac lin 30 10 16.0e3 .print ac v([vout]) v([vin]) .options nomod .probe .end circuit for calculating zsliopen (ring and tip open circuit) .lib kslic.lib vcc +12v 0 12v vee 0 C12v 12v xslic ring tip +12v C12v vin vout slic vosc vout 0 ac 1.0 rload ring tip 10t ; for rejecting 'floating' errors from spice, see spicemanual .ac lin 30 10 16.0e3
semiconductor group 298 calculating slic transfer functions .print ac v([vout]) v([vin]) .options nomod .end
semiconductor group 299 calculating slic transfer functions appendix c diagram of the measurement system
semiconductor group 300 calculating slic transfer functions appendix d plots of measurements usa specification: return loss 1 measured, filters on 2 calculated, filters on 3 measured, filters off 4 calculated, filters off
semiconductor group 301 calculating slic transfer functions usa specification: transmit level (aCd) freq/hz res/dbm0 freq/hz res/dbm0 201 C0.38 2208 C0.16 301 C0.06 2309 C0.19 402 C0.12 2409 C0.20 502 C0.10 2509 C0.19 602 C0.08 2610 C0.20 703 C0.06 2710 C0.21 803 C0.04 2811 C0.22 903 C0.05 2911 C0.23 1004 C0.06 3011 C0.24 1104 C0.06 3112 C0.27 1205 C0.06 3212 C0.30 1305 C0.08 3312 C0.36 1405 C0.09 3413 C0.45 1506 C0.10 3513 C0.63 1606 C0.11 1706 C0.12 1807 C0.14 1907 C0.13 2008 C0.14 2108 C0.16 1
semiconductor group 302 calculating slic transfer functions usa specification: deviation from reference level (0 db), transmit direction
semiconductor group 303 calculating slic transfer functions usa specification: level in receive direction (dCa) freq/hz res/dbm0 freq/hz res/dbm0 201 C0.01 2208 C0.09 301 0.01 2309 C0.10 402 C0.01 2409 C0.11 502 0.01 2509 C0.13 602 0.02 2610 C0.14 703 0.03 2710 C0.15 803 0.03 2811 C0.16 903 0.03 2911 C0.18 1004 0.03 3011 C0.20 1104 0.03 3112 C0.22 1205 0.02 3212 C0.26 1305 0.01 3312 C0.31 1405 0.00 3413 C0.41 1506 C0.01 3513 C0.56 1606 C0.02 1706 C0.03 1807 C0.04 1907 C0.06 2008 C0.07 2108 C0.08 1
semiconductor group 304 calculating slic transfer functions usa specification: deviation from reference level (0 db), receive direction
semiconductor group 305 calculating slic transfer functions usa specification: transhybrid loss (dCd) 1 measured 2calculated
semiconductor group 306 calculating slic transfer functions german specification: return loss 1 measured, filters on 2 calculated, filters on 3 measured, filters off 4 calculated, filters off
semiconductor group 307 calculating slic transfer functions german specification: transmit level (aCd) freq/hz res/dbm0 freq/hz res/dbm0 201 C0.44 2208 C0.19 301 C0.13 2309 C0.20 402 C0.17 2409 C0.20 502 C0.17 2509 C0.22 602 C0.14 2610 C0.22 703 C0.12 2710 C0.24 803 C0.12 2811 C0.24 903 C0.11 2911 C0.25 1004 C0.11 3011 C0.26 1104 C0.11 3112 C0.29 1205 C0.10 3212 C0.33 1305 C0.10 3312 C0.39 1405 C0.10 3413 C0.54 1506 C0.09 3513 C0.70 1606 C0.11 1706 C0.13 1807 C0.14 1907 C0.15 2008 C0.17 2108 C0.18 1
semiconductor group 308 calculating slic transfer functions german specification: deviation from reference level (0 db), transmit direction
semiconductor group 309 calculating slic transfer functions german specification: level in receive direction (dCa) freq/hz res/dbm0 freq/hz res/dbm0 201 C6.97 2208 C7.08 301 C6.96 2309 C7.10 402 C7.00 2409 C7.11 502 C7.01 2509 C7.12 602 C7.03 2610 C7.13 703 C7.04 2710 C7.14 803 C7.04 2811 C7.14 903 C7.04 2911 C7.14 1004 C7.03 3011 C7.15 1104 C7.02 3112 C7.18 1205 C7.01 3212 C7.23 1305 C6.99 3312 C7.31 1405 C6.98 3413 C7.45 1506 C6.97 3513 C7.68 1606 C6.97 1706 C6.98 1807 C6.99 1907 C7.01 2008 C7.03 2108 C7.06 1
semiconductor group 310 calculating slic transfer functions german specification: deviation from reference level (C 7 db), receive direction german specification: transhybrid loss (dCd) 1 measured 2 calculated
semiconductor group 311 calculating slic transfer functions german specification: transhybrid loss (dCd) 1 measured 2 calculated
semiconductor group 312 calculating slic transfer functions appendix e sicofi ? file 'usa.spe' fref = 1014.0 law = a vref = 0.7750 rlx = 0. rlr = 0.0 abimp = zi zlrp1 = 000. zlcp1 = 0. zlrp2 = 0. zlcp2 = 0. zlrs = 600. zlcs = 0. zirp1 = 000. zicp1 = 0. zirp2 = 0. zicp2 = 0. zirs = 600. zics = 0. z3rp1 = 000. z3cp1 = 0. z3rp2 = 0. z3cp2 = 0. z3rs = 600. z3cs = 0. zrrp1 = 000. zrcp1 = 0. zrrp2 = 0. zrcp2 = 0. zrrs = 600. zrcs = 0. zre fr 300 500 1k 3.4k atC 0 20 30 30 at+ 20 26 30 0 zmir fr 4k 12k atC 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 da,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k atC 0 27 27 23 at+ 23 27 27 0
semiconductor group 313 calculating slic transfer functions sicofi ? file 'brd.spe' fref = 1014.0 law = a vref = 0.948 rlx = 0. rlr = C7.0 abimp = zi zlrp1 = 820. zlcp1 = 0. zlrp2 = 0. zlcp2 = 0.115eC6 zlrs = 220. zlcs = 0. zirp1 = 820. zicp1 = 0. zirp2 = 0. zicp2 = 0.115eC6 zirs = 220. zics = 0. z3rp1 = 820. z3cp1 = 0. z3rp2 = 0. z3cp2 = 0.115eC6 z3rs = 220. z3cs = 0. zrrp1 = 820. zrcp1 = 0. zrrp2 = 0. zrcp2 = 0.115eC6 zrrs = 220. zrcs = 0. zre fr 300 500 3.4k atC 0 20 20 at+ 16 20 0 zmir fr 4k 12k atC 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 da,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k atC 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k atC 0 C.25 at+ C.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gdC 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k atC 0 27 27 23 at+ 23 27 27 0
semiconductor group 314 calculating slic transfer functions appendix f control file 'ksicofi.ctl' spec = usa.spe slic = kslic.sli byte = ref1.byt chnr = 0,a peb = 2060 version = 4.4 rel = y on = all opt = z+x+r+b zxrb = nnnn pzin = 11 psp = 3 fzp = 300.0 500.0 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = 0.100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 zauto = y fz = 300 3400 fr 300.00 3400.0 rdisp = n rrefq = n fx 300.00 3400.0 xdisp = n xrefq = n pb = 10 gwfb = 0.500eC01 bdf = 1 fbp = 300.0 500.0 700.0 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.000 2.000 1.000 5.000 1.000 2.000 1.000 5.000 1.000 1.000 bauto = y fb = 300 3400 apre = 0.0 dpre = 0.0 apof = 0.0 dpof = 0.0 agr = 00 agx = 00 tm3 = 000
semiconductor group 315 calculating slic transfer functions appendix g result file 'k_usa.res' input_file_name: ksicofi.ctl date:13.03.91 09:37 spec = usa.spe slic = kslic.sli byte = ref.byt chnr = 0,a plq = n on = all peb = 2060 version = 4.4 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = y zrep = n zsign = 1 fz = 300.00 3400.0 zlim = 2.00 pzin = 11 psp = 3 fzp = 300.00 500.00 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = .100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr = 300.00 3400.0 rdisp = n rrefq = n rref = .31626eC01 fx = 300.00 3400.0 xdisp = n xrefq = n xref = C.42733 bauto = y brep = n bsign = 1 fb = 300.00 3400.0 blim = 2.00 bdf = 1 pb = 10 gwfb = .500eC01 fbp = 300.00 500.00 700.00 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 apre = .00 dpre = .00 apof = .00 dpof = .00 agx = 00 agr = 00 tm3 = 000 xzq = C.11523440e+00 .22656250e+00 .34179690eC01 C.21093750e+00 .93994140eC01 xrq = .97265630e+00 .31250000eC01 C.29296880eC02 .48828130eC03 C.19531250eC02 xxq = .10273440e+01 .30883790eC01 C.19531250eC02 .97656250eC03 C.19531250eC02 xbq = C.14453130e+00 C.71875000e+00 C.25341800e+00 .15234380e+00 .52734380eC01 C.97656250eC01 .13183590eC01 .78613280eC01 C.80078130eC01 .37109380eC01 xgq = .53808590e+00 .21562500e+01 ;
semiconductor group 316 calculating slic transfer functions bytes for z-filter (13): 30,fa,ba,52,14,c2,b1,2c bytes for r-filter (2b): f0,19,87,fc,29,16,00,bd bytes for x-filter (23): f0,19,87,fb,19,e5,0a,b5 bytes for gain-factors (30): 41,b2,00,23 2nd part of bytes b-filter (0b): 00,35,c1,32,24,65,2b,ab 1st part of bytes b-filter (03): 4b,2b,23,ab,b6,19,bb,23 bytes for b-filter delay (18): 19,19,11,19 * pspice simulation of slic using k-parameters * converted with the program kconvert v1.1 run # 1 z-filter calculation results reference impedance for optimization: zirp1 = .000 zicp1 = .000 zirp2 = .000 zicp2 = .000 zirs = 600. zics = .000 calculated and quantized coefficients: xz = C.11501 .22666 .03412 C.20779 .09395 xzq = C.11523 .22656 .03418 C.21094 .09399 bytes for z-filter (13) 30,fa,ba,52,14,c2,b1,2c return loss freq loss freq loss (hz) (db) (hz) (db) 100. 32.313 2000. 32.204 200. 32.155 2100. 32.181 300. 32.156 2200. 32.157 400. 32.136 2300. 32.173 500. 32.257 2400. 32.247 600. 32.319 2500. 32.404 700. 32.387 2600. 32.584 800. 32.527 2700. 32.819 900. 32.594 2800. 33.070 1000. 32.651 2900. 33.368 1100. 32.688 3000. 33.611 1200. 32.709 3100. 33.743 1300. 32.705 3200. 33.660 1400. 32.678 3300. 33.253 1500. 32.627 3400. 32.523 1600. 32.566 3500. 31.463 1700. 32.489 3600. 30.237 1800. 32.361 3700. 28.912 1900. 32.299 3800. 27.550 min. z-loop reserve: 26.008 db at frequency: 8500.0 hz min. z-loop mirror reserve: 30.692 db at frequency: 9000.0 hz
semiconductor group 317 calculating slic transfer functions run # 1 x-filter calculation results reference impedance for optimization: zirp1 = .000 zicp1 = .000 zirp2 = .000 zicp2 = .000 zirs = 600. zics = .000 calculated and quantized coefficients: xx = 1.02808 .03087 C.00199 .00098 C.00187 xxq = 1.02734 .03088 C.00195 .00098 C.00195 bytes for xCfilter (23): f0,19,87,fb,19,e5,0a,b5 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z agx vref/vsic xref tm3 gx .00 C .78 C .00 C 6.17 C C.43 C .00 = C6.70 ideal .03 = .78 + .00 + 6.17 + C.43 + .00 + C6.67 quant second byte for peb 2060 transmit gain: ,00,23 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .052 ms tgref cb = .065 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 13.836 2.827 2000. .043 .209 200. .345 2.009 2100. .048 .213 300. .017 .796 2200. .051 .219 400. .041 .489 2300. .054 .226 500. .039 .365 2400. .054 .233 600. .028 .301 2500. .056 .243 700. .019 .264 2600. .060 .253 800. .009 .241 2700. .063 .265 900. .003 .226 2800. .067 .280 1000. C.000 .216 2900. .075 .298 1100. C.001 .208 3000. .088 .319 1200. C.000 .204 3100. .106 .345 1300. .002 .201 3200. .138 .378 1400. .007 .199 3300. .186 .420 1500. .012 .199 3400. .268 .476 1600. .018 .199 3500. .410 .556 1700. .026 .200 3600. .676 .676 1800. .032 .202 3700. 1.240 .871 1900. .039 .205 3800. 2.655 .000
semiconductor group 318 calculating slic transfer functions run # 1 r-filter calculation results reference impedance for optimization: zirp1 = .000 zicp1 = .000 zirp2 = .000 zicp2 = .000 zirs = 600. zics = .000 calculated and quantized coefficients: xr = .97294 .03127 C.00286 .00037 C.00198 xrq = .97266 .03125 C.00293 .00049 C.00195 bytes for rCfilter (2b): f0,19,87,fc,29,16,00,bd gr results: all attenuation values (in db) refer to fref = 1014. hz Crlr slic+z agr vsic/vref rref gr .00 C .76 C .00 C C6.17 C .03 = 5.38 ideal .00 = .76 + .00 + C6.17 + .03 + 5.38 quant first byte for peb 2060 receive gain (30): 41,b2 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .184 ms tgref cb = .167 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. .029 .000 2000. .039 .053 200. .040 .007 2100. .043 .059 300. .039 .009 2200. .047 .065 400. .035 .011 2300. .049 .073 500. .029 .012 2400. .052 .081 600. .022 .014 2500. .054 .091 700. .015 .016 2600. .056 .102 800. .008 .017 2700. .060 .115 900. .003 .019 2800. .065 .131 1000. C.001 .021 2900. .072 .148 1100. C.002 .023 3000. .085 .170 1200. C.002 .025 3100. .105 .196 1300. .000 .028 3200. .135 .229 1400. .004 .030 3300. .184 .271 1500. .009 .033 3400. .267 .328 1600. .014 .036 3500. .408 .408 1700. .022 .039 3600. .675 .526 1800. .028 .043 3700. 1.238 .723 1900. .033 .048 3800. 2.654 1.060
semiconductor group 319 calculating slic transfer functions run # 1 b-filter calculation results reference impedance for optimization: zlrp1 = .000 zlcp1 = .000 zlrp2 = .000 zlcp2 = .000 zlrs = 600. zlcs = .000 calculated and quantized coefficients: xb = C.14825 C.71061 C.25357 .15054 .05259 C.09832 .01320 .07862 C.07985 .03775 xbq = C.14453 C.71875 C.25342 .15234 .05273 C.09766 .01318 .07861 C.08008 .03711 2nd part of bytes b-filter (0b): 00,35,c1,32,24,65,2b,ab 1st part of bytes b-filter (03): 4b,2b,23,ab,b6,19,bb,23 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 34.515 2000. 40.546 200. 28.677 2100. 39.164 300. 34.913 2200. 38.275 400. 43.719 2300. 37.712 500. 52.062 2400. 37.445 600. 42.911 2500. 37.399 700. 39.398 2600. 37.484 800. 37.744 2700. 37.598 900. 36.977 2800. 37.641 1000. 36.864 2900. 37.537 1100. 37.292 3000. 37.359 1200. 38.247 3100. 37.168 1300. 39.698 3200. 36.982 1400. 41.846 3300. 36.732 1500. 44.876 3400. 36.160 1600. 48.419 3500. 34.939 1700. 48.770 3600. 33.277 1800. 45.555 3700. 31.896 1900. 42.603 3800. 32.162 additional b-filter delay (in seconds): .625eC04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 320 calculating slic transfer functions result file 'k_brd.res' input_file_name: ksicofi.ctl date: 13.03.91 09:51 spec = brd.spe slic = kslic.sli byte = ref.byt chnr = 0,a plq = n on = all peb = 2060 version = 4.4 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = y zrep = n zsign = 1 fz = 300.00 3400.0 zlim = 2.00 pzin = 11 psp = 3 fzp = 300.00 500.00 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = .100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 1.00 1.00 1.00 fr = 300.00 3400.0 rdisp = n rrefq = n rref = 5.6169 fx = 300.00 3400.0 xdisp = n xrefq = n xref = C.12375eC01 bauto = y brep = n bsign = 1 fb = 300.00 3400.0 blim = 2.00 bdf = 1 pb = 10 gwfb = .500eC01 fbp = 300.00 500.00 700.00 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 apre = .00 dpre = .00 apof = .00 dpof = .00 agx = 00 agr = 01 tm3 = 000 xzq = C.37695310e+00 C.32812500e+00 .61279300eC01 .22656250e+00 C.89843750eC01 xrq = .68750000e+00 C.27343750e+00 .59082030eC01 C.21484380eC01 .92773440eC02 xxq = .10175780e+01 C.26367190eC01 .18554690eC01 C.63476560eC02 .19531250eC02 xbq = C.66894530eC01 C.32031250e+00 C.30468750e+00 C.10925290e+00 C.22460940eC01 C.47851560eC01 C.22460940eC01 .25390630eC01 C.27465820eC01 .13916020eC01 xgq = .68359380e+00 .16875000e+01 ;
semiconductor group 321 calculating slic transfer functions bytes for z-filter (13): c0,b1,c2,41,2e,2a,92,ea bytes for r-filter (2b): 70,13,2e,41,bc,4a,11,12 bytes for x-filter (23): 70,19,bf,61,13,bd,02,36 bytes for gain-factors (30): 21,c1,10,12 2nd part of bytes b-filter (0b): 00,b6,db,db,b5,e1,b1,ac 1st part of bytes b-filter (03): ec,b1,bb,a7,b2,2a,c3,34 bytes for b-filter delay (18): 9,19,11,19 * pspice simulation of slic using k-parameters * converted with the program kconvert v1.1 run # 1 z-filter calculation results reference impedance for optimization: zirp1 = 820. zicp1 = .000 zirp2 = .000 zicp2 = .115eC06 zirs = 220. zics = .000 calculated and quantized coefficients: xz = C.37740 C.32749 .06130 .22499 C.08919 xzq = C.37695 C.32813 .06128 .22656 C.08984 bytes for z-filter (13): c0,b1,c2,41,2e,2a,92,ea return loss freq loss freq loss (hz) (db) (hz) (db) 100. 27.280 2000. 29.735 200. 28.873 2100. 29.978 300. 29.137 2200. 30.346 400. 29.107 2300. 30.692 500. 29.029 2400. 30.988 600. 28.887 2500. 31.257 700. 28.698 2600. 31.418 800. 28.615 2700. 31.409 900. 28.492 2800. 31.322 1000. 28.400 2900. 31.025 1100. 28.374 3000. 30.598 1200. 28.354 3100. 30.020 1300. 28.399 3200. 29.324 1400. 28.444 3300. 28.584 1500. 28.579 3400. 27.795 1600. 28.728 3500. 26.976 1700. 28.913 3600. 26.197 1800. 29.144 3700. 25.398 1900. 29.395 3800. 24.658 min. z-loop reserve: 27.109 db at frequency: 6000.0 hz min. z-loop mirror reserve: 30.685 db at frequency: 6000.0 hz
semiconductor group 322 calculating slic transfer functions run # 1 x-filter calculation results reference impedance for optimization: zirp1 = 820. zicp1 = .000 zirp2 = .000 zicp2 = .115eC06 zirs = 220. zics = .000 calculated and quantized coefficients: xx = 1.01740 C.02620 .01872 C.00629 .00217 xxq = 1.01758 C.02637 .01855 C.00635 .00195 bytes for x-filter (23): 70,19,bf,61,13,bd,02,36 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z agx vref/vsic xref tm3 gx .00 C C.01 C .00 C 4.41 C C.01 C .00 = C4.58 ideal C03 = C.01 + .00 + 4.41 + C.01 + .00 + C4.54 quant second byte for peb 2060 transmit gain: ,10,12 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .052 ms tgref cb = .065 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 13.845 2.881 2000. .026 .208 200. .340 2.019 2100. .036 .212 300. .010 .798 2200. .042 .216 400. .034 .488 2300. .049 .222 500. .036 .364 2400. .054 .229 600. .028 .298 2500. .060 .237 700. .019 .261 2600. .063 .250 800. .010 .238 2700. .064 .266 900. .005 .223 2800. .067 .277 1000. .001 .212 2900. .071 .297 1100. C.003 .206 3000. .079 .319 1200. C.005 .201 3100. .095 .346 1300. C.008 .195 3200. .126 .379 1400. C.007 .199 3300. .181 .423 1500. C.006 .193 3400. .274 .480 1600. C.001 .196 3500. .438 .564 1700. .005 .200 3600. .738 .680 1800. .010 .197 3700. 1.350 .878 1900. .018 .202 3800. 2.829 .000
semiconductor group 323 calculating slic transfer functions run # 1 r-filter calculation results reference impedance for optimization: zirp1 = 820. zicp1 = .000 zirp2 = .000 zicp2 = .115eC06 zirs = 220. zics = .000 calculated and quantized coefficients: xr = .69865 C.27517 .05921 C.02170 .00928 xrq = .68750 C.27344 .05908 C.02148 .00928 bytes for r-filter (2b): 70,13,2e,41,bc,4a,11,12 gr results: all attenuation values (in db) refer to fref = 1014. hz Crlr slic+z agr vsic/vref rref gr 7.00 C C3.54 C 6.03 C C4.41 C 5.62 = 3.31 ideal 7.00 = C3.54 + 6.03 + C4.41 + 5.62 + 3.30 quant first byte for peb 2060 receive gain (30): 21,c1 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .212 ms tgref cb = .195 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. C.083 .050 2000. C.040 .047 200. C.077 .013 2100. C.024 .053 300. C.050 .006 2200. C.008 .056 400. C.034 .003 2300. .003 .066 500. C.007 .002 2400. .010 .074 600. .010 .000 2500. .010 .085 700. .022 .001 2600. .005 .098 800. .030 .002 2700. C.004 .113 900. .025 .004 2800. C.013 .129 1000. .013 .005 2900. C.021 .151 1100. C.004 .010 3000. C.021 .177 1200. C.028 .017 3100. C.008 .206 1300. C.042 .014 3200. .028 .243 1400. C.063 .025 3300. .099 .288 1500. C.076 .025 3400. .222 .349 1600. C.075 .028 3500. .430 .429 1700. C.077 .038 3600. .790 .550 1800. C.068 .035 3700. 1.478 .747 1900. C.055 .039 3800. 3.051 1.086
semiconductor group 324 calculating slic transfer functions run # 1 b-filter calculation results reference impedance for optimization: zlrp1 = 820. zlcp1 = .000 zlrp2 = .000 zlcp2 = .115eC06 zlrs = 220. zlcs = .000 calculated and quantized coefficients: xb = C.06671 C.32085 C.30579 C.10920 C.02212 C.04818 C.02290 .02514 C.02751 .01381 xbq = C.06689 C.32031 C.30469 C.10925 C.02246 C.04785 C.02246 .02539 C.02747 .01392 2nd part of bytes b-filter (0b): 00,b6,db,db,b5,e1,b1,ac 1st part of bytes b-filter (03): ec,b1,bb,a7,b2,2a,c3,34 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 39.028 2000. 47.626 200. 32.840 2100. 45.454 300. 38.311 2200. 43.686 400. 44.327 2300. 42.872 500. 53.796 2400. 42.486 600. 52.398 2500. 42.673 700. 47.530 2600. 43.375 800. 45.172 2700. 44.823 900. 43.673 2800. 47.284 1000. 42.808 2900. 51.668 1100. 42.819 3000. 55.841 1200. 43.199 3100. 49.939 1300. 44.446 3200. 45.016 1400. 5.997 3300. 41.837 1500. 48.904 3400. 39.716 1600. 52.613 3500. 38.317 1700. 61.033 3600. 37.560 1800. 58.078 3700. 37.649 1900. 51.198 3800. 39.487 additional b-filter delay (in seconds): .625eC04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 325 calculating slic transfer functions appendix h the batch file 'k.bat' if exist *.ind del *.ind pspice1 %1.cir %1.out | | | | | spice output file | spice input file spice program kconvert %1.out %1.sli | | | | | conversion program output | | = slic input file for sicofi program | conversion program input conversion program
semiconductor group 326 test board stut 2060 sicofi ? test board stut 2060 contents page 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 2hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 2.1 power supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329 2.2 clock supply section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329 2.3 microprocessor section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330 2.4 pbc/pic section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 2.5 sicofi ? section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 2.5.1 slic connectors con6 and con7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332 2.5.2 connector con5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333 2.5.3 sicofi ? -2 adaptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333 2.6 solder straps for eprom and sicofi ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334 2.7 connecting sicofi ? testboard to pcm4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335 2.8 pcm4 programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340 3 starting the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341 4 programming the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342 4.1 command psr (phase shift register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342 4.2 command cam (content addressable memory) . . . . . . . . . . . . . . . . . . . . . . . . 343 4.3 command sigs (signaling strobe). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344 4.4 control byte for ciw command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346 4.4.1 sop command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346 4.4.2 cop command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348 4.4.3 ciw command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349 4.4.4 cir command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349 4.5 command sig . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 4.6 microprocessor ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351 4.7 program examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352 4.8 programming differences of peb 2060 and peb 2260. . . . . . . . . . . . . . . . . . . . 354 5 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355 5.1 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355 5.2 floor plan of the sicofi ? testboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356 5.3 circuit diagram of the sicofi ? -2 adaptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 357
semiconductor group 327 test board stut 2060 1 introduction using the sicofi testboard stut 2060 facilitates measurement of the transfer functions of the slic in connection with the sicofi. via a rs 232 interface to a microprocessor programming the pbc or pic, the sicofi and slic is made possible. the slic circuit is placed on a separate board which can be connected through 64-pins connectors con6 and con7 to the testboard. this set-up aids in making the following investigations: C testing the slic hardware C verifying the programmed coefficients, which have been calculated with the sicofi coefficients program C speeding up evaluation of different slics 2hardware the sicofi testboard can be broken down into the functional parts: C power supply section C clock supply section C microprocessor section C pbc/pic section C sicofi section including slic connectors con6 and con7, and con5
semiconductor group 328 test board stut 2060 figure 1 floor plan of the sicofi ? testboard stut 2060
semiconductor group 329 test board stut 2060 2.1 power supply section the board needs an external power supply. on board there is a connector (con 1) with the following pinning: pin terminal 1 + 5 v 2 digital ground (dgnd) 3 + 12 v 4 analog ground (agnd) 5 C48v 6 battery ground (bgnd) 7 C 5 v 8 ring ground (rgnd) not connected 9 C12v 10 ring (nc) 11 C70v 2.2 clock supply section the clock supply provides several modes: C external clock, external frame C external clock, internal frame C internal clock, internal frame with the switch dil 2 of the clock part, you can set up these 3 modes: by switching-on s1 of dil2 (internal clock) the led d2 is on. external clock may be supplied at 1.536 mhz, 2.048 mhz, 3.072 mhz, or 4.096 mhz. when just using external clock and external frame, only dil-switches s1 and s2 are to be set (both to position off). C the dil-switches s6, s7 and s8 are not connected. internal clock internal frame external clock external frame s1 s2 on off dil2 off on off s3 s4 s5 clock 1.5 mhz dil2 on on off clock 2 mhz on off on clock 3 mhz on on on clock 4 mhz
semiconductor group 330 test board stut 2060 2.3 microprocessor section there is a 8031 microprocessor, a 16 kbyte eprom, 8 kbyte ram and a rs232 interface on the board. the ram is not used in this version. you can also use different types of eproms (8 k, 16 k, 32 k bytes). in that case you have to change a few solder straps. further information can be found in chapter 2.7 solder straps. in the microprocessor part there are two switches s1 and s2 and a dil-switch (dil1). switch s1 changes the direction receive/transmit of the rs232-interface. switch s2 performs the hardware-reset. the microprocessor is connected via the max 232-ic to the rs232-interface. with the four dil1-switches the parity is set. the dil1-switches s1 and s2 are switched to on. the switches s3 and s4 have the following functions: we only work with even parity and therefore both switches are in on position. the microprocessor program has an autobaud, which has to be to started first. we recommend to use only a transmission rate of 9600 baud. all examples given refer to 9600 baud. additional information can be found in chapter 3 . starting the board. no parity odd parity parity even parity s3 s4 off on dil1
semiconductor group 331 test board stut 2060 2.4 pbc/pic section the pbc or pic has a pcm highway 0 and 1, both with highway drivers. these drivers may be optimized by using external resistors. you may connect the receive and transmit paths of highway 0 and 1 to connector con4 ( see figure 1 ) in using jumpers. this allows for a speech connection of subscriber 0 (sicofi0 and slic0) to subscriber 1 (sicofi1 and slic1). via the connector con3 you can connect the board to the older pbc board (stu 2050). the led d1 indicates an interrupt from the pbc. in this case you have to check the clock and frame and you have to restart the system. the sip-lines sip0 and sip1 are connected to sicofi 0 and 1. the sip-line sip3 is connected to the slic-connectors con6 and con7. 2.5 sicofi ? section there are two sicofis on the board. they are connected via the sld-interface to the pbc. if you have connected external hardware at the sip-line in addition to the sicofi, and there is a timing collision of these both circuits, a series resistor protects the sicofi. in this case cut the solder strap near the sicofi at the soldering side and connect the other solder point of pin 17 of the sicofi (s ee figure 4 in chapter 2.7 solder straps), then you have added the resistor to the circuit. all sicofi signaling pins are connected to the pertining slic connectors. on board the analog input/output line have both a banana- and a bnc-plug for measurement, and they are connected to the slic connectors, too.
semiconductor group 332 test board stut 2060 2.5.1 slic connectors con6 and con7 (pin-outs) the connectors con6 and con7 have 64 pins. pin a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 a 16 a 17 a 18 a 19 a 20 a 21 a 22 a 23 a 24 a 25 a 26 a 27 a 28 a 29 a 30 a 31 a 32 connection bridge to other slic board bridge to other slic board bridge to other slic board bridge to other slic board bridge to other slic board dir sclk sigs mclk syp sip-wire digital ground (dgnd) +5v ring ac 65 v C5v reset C70v C48v sip3 so1 so2 so3 si1 si2 si3 analog ground (agnd) vin (sicofi input) analog ground (agnd) vout (sicofi output) analog ground (agnd) pin c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 8 c 9 c 10 c 11 c 12 c 13 c 14 c 15 c 16 c 17 c 18 c 19 c 20 c 21 c 22 c 23 c 24 c 25 c 26 c 27 c 28 c 29 c 30 c 31 c 32 connection C12v +12v port 1.4 port 1.5 port 1.6 port 1.7 port 0.0 port 0.1 port 0.2 port 0.3 port 0.4 port 0.5 port 0.6 port 0.7 sa sb sc sd
semiconductor group 333 test board stut 2060 2.5.2 connector con5 the ports 1.4 ... 1.7 of the microprocessor are used as inputs. ports 0.0 ... 0.7 are switched by the microprocessor via a latch and may be programmed in bidirectional mode. the addresses of the latch range from 32 k to 64 k. if you want to use these 12 ports you have to modify the eprom and write some new routines for the program. with the connector con5 you can cut the connection (no jumper) or set the connection (set jumper) between pins a1 ... a5 of slic-connectors con6 and con7. via this connection you may send signals from one slic-board to the other. in this case you need the external hardware only on a single slic-board. for programming external slic hardware you may use sip-line 3. 2.5.3 sicofi ? -2 adaptor there is also an adaptor available which fits into the sicofi sockets sip0 and sip1 to connect a sicofi-2. figure 2 sicofi ? -2 adaptor 1 - 10 2 - 9 3 - 8 4 - 7 5 - 6 a 1 a 2 a 3 a 4 a 5 jumper bridge
semiconductor group 334 test board stut 2060 2.6 solder straps for eprom and sicofi ? on the board at the soldering side there are several solder straps. these lead to the eprom pins 26 and 27 and to the sicofi pins 3 and 5. the eprom type is set with solder straps. figure 3 solder straps underneath the eprom to set the eprom: left 8 k eprom (2764), middle 16 k eprom (27128), right 32 k eprom (27256) with version 3.1 of the sicofi you may connect analog and digital ground with a solder strap between pins 3 and 5 of the sicofi. the solder straps for the resistor in the sip-line are close to the sicofi ( see figure 4 ). 8 kbyte 16 kbyte 32 kbyte eprom +5v a13 a13 pin 26 +5v +5v a14 pin 27
semiconductor group 335 test board stut 2060 figure 4 solder straps near the sicofi for ground connection and protection resistor insertion. left: analog and digital ground not connected, resistor not inserted, right: analog and digital ground connected, resistor inserted. 2.7 connecting sicofi ? testboard to pcm4 for setting up a measurement system with the wandel & goltermann pcm4 you have access to following bnc-plugs: C clock in C frame out C syp in C highway 0 transmit C highway 0 receive C sicofi in 1/2 C sicofi out 1/2 the sicofi input, output and the analog ground also have a banana-plug. it is possible to set up the system in two different timing modes. in the first mode the pcm4 (master) sends frame and clock signals to the sicofi testboard. the alternative mode uses the internal clock and frame of the sicofi board (master) to synchronize the pcm4.
semiconductor group 336 test board stut 2060 the pcm4 (wandel & goltermann) is the measurements system to measure the transfer functions from an analog line card. the system has at the digital side a pcm input and output and on the analog side a 4-wire and a 2-wire in- and output. it delivers or needs the clocks to or from the test object. when the system gets the clocks it is the slave and at the other way it is the master. both ways are possible with our sicofi testboard (stut 2060). the sicofi testboard is able to generate the clock signals (frame and sclk) or gets them from the pcm4. clock generation on the testboard the dip-switches on the testboard are set to dil 2.1 closed dil 2.2 closed dil 2.3 closed dil 2.4 closed dil 2.5 open the pcm4 input for the frame is the plug 64 (external frame) on the backplane. additionally a bridge from frame trigger output (plug 61) to external frame (plug 63) is set. the bnc2 plug (pcm highway input of testboard) has to be connected to the output of the pcm highway of the pcm4 and the input of the pcm-highway of pcm4 with the bnc1 of the sicofi testboard. the analog front end is connected with the analog input or output of the pcm4. the phase shift for the pbc is psr = 36. clock generation in the pcm4 the dip-switches on the testboard are set to dil 2.1 open dil 2.2 open dil 2.3 closed dil 2.4 closed dil 2.5 open the pcm4 output for the frame is the plug 61 (frame trigger output) on the backplane. additionally a bridge from frame trigger output (plug 61) to external frame (plug 63) is set. the bnc2 plug (pcm highway input) has to be connected to the output of the pcm highway of the pcm4 and the input of the pcm-highway of pcm4 with the bnc1 of the sicofi testboard. the analog front end is connected with the analog input or output of the pcm4. the phase shift for the pbc is in this case psr = 2d.
semiconductor group 337 test board stut 2060 figure 5 pcm4 front view
semiconductor group 338 test board stut 2060 figure 6 pcm4 rear view
semiconductor group 339 test board stut 2060 figure 7 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set of wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 340 test board stut 2060 2.8 the pcm4 programming the pcm4 has to be programmed as following: pcm interface 2mbit/s digital loop open time-slot assignment 32 time slots crc 4 frame out code nrz (receiver and transmitter) output impedance 75 w unsymmetrical clock internal 2048 khz, when pcm4 is master external 8 khz, when pcm4 is slave input impedance > 3 k w words standard transmit signal in the addressed channel input no mistake law a- or m -law nf-input and -output 1 level in dbm0 two wire (d-d) open digital channel no. time channel pcm highway output channel 1 pcm highway input channel 2
semiconductor group 341 test board stut 2060 3 starting the board the board is started in the following way: C set the dil-switches in the right position ( see chapter 2.x ) C connect the transmit and receive highways to the pcm4 C plug the external clock and frame (syp) (if used) C connect the rs232 interface to your computer C provide power supply via the power supply connector con1 C plug your slic to the connectors con6 or con7 C use a terminal or a personal computer with a transfer program (9600 baud, even parity) C switch on the power supply C press the key at your computer (terminal) keyboard to start the autobaud after this your computer(terminal) shows the title screen: siemens muenchen balanstr. 73 bauelemente ppppp bbbbb cccc pp bb cc pp bb c ppppp bbbbb c pbbc pbbcc p bbbbb cccc the key to digital communications systems syntax of an input-line write: name = hexdata cr read: name cr i-frame: ri pbc-command, data, data, ... cr rr-fr.: rr cr rq-fr.: rq cr * C program the pbc, sicofi and slic the coefficients are stored in a file (xxx.byt) generated by the sicofi coefficients program (see the succeeding section).
semiconductor group 342 test board stut 2060 4 programming the board you can program the pbc, sicofi, and slic via the rs232-interface to a microprocessor. following commands are possible: psr = 2d phase 7 for pbc cam00 = 41 receive cha, sip 0, time slot 1, highway 0 cam20 = 40 transmit cha, sip 0, time slot 1, highway 0 cam01 = 41 receive cha, sip 1, time slot 1, highway 0 cam21 = 40 transmit cha, sip 1, time slot 1, highway 0 ciw0 = 26, f4, 80 sicofi sip 0, power up, all filters off ciw0 = 26, f4, 78 sicofi sip 0, power up, all filters on ciw1 = 26, f4, 80 sicofi sip 1, power up, all filters off sig0 = c0 signaling byte to program sicofi at sip0 in the following the commands are treated in detail. 4.1 command psr (phase shift register) the psr is used to shift the clock on the pcm-highways relative to the synchronization pulse (syp). by this way different delays in a system are compensated for. the shifted clock can be used separately for transmit and receive direction and is the same on highway 0 and 1. psr can only be written; after reset it is 00 h . x-shift: clock shift on transmit highway 0 and 1, value 0 ... 7 r-shift: clock shift on receive highway 0 and 1, value 0 ... 7 x: do not care correspondence between the programmable values of x-shift and r-shift and the clock shift on the highway is as follows: for example: if the first time slot of a frame in both directions (transmit and receive) should start at the same time as the syp signal you have to write the value 36 h in the psr ( see table ). x x-shift r-shift x 6 5 4 3 2 1 0 7 psr-byte 2 3 4 5 0 0 0 0 0 1 0 1 0 0 1 1 clock shift x-shift or r-shift 6 7 0 1 1 0 0 1 0 1 1 1 0 1 1 1 clock shift x-shift or r-shift
semiconductor group 343 test board stut 2060 4.2 command cam (contents addressable memory) a connection between subscriber and pcm-highway is set up by programming the proper cam-register. you have to write the following value into the lower 6 bits of the cam-register: * pcm-highway 0, 1 for example: channel a, sip-line 4, transmit highway 0, clock shift 5 cam24 = 4e h channel b, sip-line 7, receive highway 1, clock shift 7 cam17 = 89 h ms0 time slots 0 ... 63 ms1 cam00 = sip-line 0 ... 7 0 channel a, receive direction 1 channel b, receive direction 2 channel a, transmit direction 3 channel b, transmit direction no transfer normal transfer, highway 1 normal transfer, highway 0 m p-transfer 1 1 0 0 ms1 1 0 1 0 ms2 desired input value in the n n n n n n n n psr (x-shift or r-shift) common channel register 6 7 0 1 2 3 4 5 nC1 nC1 n n n n n n pcm-time- slot clock shift 0 1 2 3 4 5 6 7 transmit cam nC2 nC1, nC2* nC1 nC1 nC1 nC1 nC1 nC1 receive cam n n n n + 1, n* n + 1 n + 1 n + 1 n + 1
semiconductor group 344 test board stut 2060 4.3 command sigs (signaling strobe) the signaling strobe is a programmable frame-synchronous signal, which you get at the sigs-pin (a8) of connectors con6 and con7. with this signal you can drive an expansion logic for the sicofi. as the pbc sends 16 signaling bits, and the sicofi uses only 10, with an active sigs the remaining 6 bits are switched to the expansion logic. the active sigs- signal is programmed in the signaling configuration register (scr). you can write and read it; after reset it is 00 h and not active. the ss-bit (strobe select): ss = 0: strobe via channel a and/or b rs C receive strobe xs C transmit strobe as C channel a strobe bs C channel b strobe the strobe is active (high), if rs and/or xs together with as and/or bs are set. the next table shows the strobe as a function of the bits rs, xs, as and bs. '1' means high level (active). c/xs b/as a/bs ss fpc x x d/rs 0 7 scr xs as bs 0 x x x rs 0 7 scr rs xs as bs 0 0 x x 1 0 1 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1 0 1 0 1 1 1 1 1 1 0 1 1 0 1 1 1 1 1 x x 0 0 transmit cha chb 00 00 00 00 10 01 11 10 01 11 00 receive cha chb 00 10 01 11 00 00 00 10 01 11 00
semiconductor group 345 test board stut 2060 ss = 1: strobe via bits of the signaling byte fpc = 1 the strobe covers 6 bits of the signaling byte. with bit 0 the strobe is always high in receive and transmit direction. fpc = 0 the strobe covers 9 bits of the signaling byte. the strobe is always active in transmit direction with bits 2 ... 0 and in receive direction with bits 1 ... 0. a, b, c, d set the other bit-positions, at which the strobe is active. the strobe is active in receive direction with the a-, b-, c-, d-bits being set to '1' in the scr-register. the strobe is low in transmit direction with the a-, b-, c-, d-bits being set to '1' in the scr-register. strobe the strobe is used to drive an external tri-state-driver, which sends some bits to the sip-line. you have to continue programming the strobe in transmit direction to avoid overlapping of both transmitters. this is valid for the following combination: c b a 1 fpc x x d 0 7 scr a 0 1 1 1 1 b 0 0 1 1 1 c 0 0 0 1 1 d 0 0 0 0 1
semiconductor group 346 test board stut 2060 4.4 control byte for ciw command the following description of the programming bytes is only valid for the sicofi peb 2060. if the sicofi-2 adaptor is used, you have to program the corresponding bytes for the sicofi- 2 (peb 2260). there are three classes of the ciw command for the sicofi which are defined by bits 2 and 3 in each control byte: C nop normal operation no status modification or data exchange control byte: bit 3 = 1 bit 2 = 1 C sop status operation contains information about the sicofi status and use of signaling expansion logic control byte: bit 3 = 0 bit 2 = 1 C cop coefficient operation contains information about data exchange control byte: bit 3 = x bit 2 = 0 sop and cop contain additional address information which is valid if 2 sicofis are connected to one and the same pbc port. 4.4.1 sop command if the sicofi status has to be changed, a status operation byte is transferred containing the following information: ad address information which is relevant if 2 sicofis are connected to one and the same pbc port. here: always ad = 0 r/w read/write information enables reading from the sicofi or writing information to the sicofi (read = 1, write = 0) pu power-up/power-down pu = 1 power-up (operating) pu = 0 power-down (standby) tr three-party conferencing if tr = 1, the received voice bytes of channel a and b are added lsel length select defines the number of the subsequent data bytes r/w pu tr 0 1 lsel ad 0 7
semiconductor group 347 test board stut 2060 4.4.1.1 sop write if the sicofi status has to be defined initially or changed, the sop command looks like and the subsequent configuration bytes are written into one or both configuration registers cr1, cr2. in this case, the meaning of lsel is: 0 0 status setting is completed (no bytes following) 1 1 one byte will follow and is stored in cr1 1 0 two bytes will follow and are stored in cr2 and cr1 0 1 not used corresponding to the configuration bytes transmitted, the information contained in the configuration registers is where C db disable b filter (db = 1), restore b filter (db = 0) C rz disable z filter (rz = 0), restore b filter (rz = 1) C rx disable x filter (rx = 0), restore b filter (rx = 1) C rr disable r filter (rr = 0), restore b filter (rr = 1) C rg disable g filter (rg = 0), restore b filter (rg = 1) and 0 pu tr 0 1 lsel ad 0 7 rz rx rr rg tm tm tm db 0 7 cr1 test modes no test mode analog loop back via z-filter disable high pass cut off receive path (hp active) not used not used digital loop back via b-filter digital loop back via pcm-reg. db x x x x x x rz x x x x x x rx x x x x x x rr x x x x x x rg x x x x x x tm 0 0 0 0 1 1 1 1 tm 0 0 1 1 0 0 1 1 tm 0 1 0 1 0 1 0 1 c b a el am m /a pcs d 0 7 cr2
semiconductor group 348 test board stut 2060 where C d signaling pin sd is input (d = 1) or output (d = 0) C c signaling pin sc is input (c = 1) or output (c = 0) C b signaling pin sb is input (b = 1) or output (b = 0) C a signaling pin sa is input (a = 1) or output (a = 0) C el signaling expansion logic connected (el = 1) or not connected (el = 0) C am address mode one sicofi: am = 1 two sicofis: am = 0; sa is input automatically C m /a m -law: m /a = 1 a-law: m /a = 0 C pcs programmed b-filter coefficients (pcs = 0) or fixed coefficients for b-filter (pcs = 1) note: the power-on reset or a hardware reset via rs pin resets all cr1 bits to 0 and sets all cr2 bits to 1. 4.4.1.2 sop read if the sicofi status has to be evaluated, using the sop command the contents of cr2 and cr1 is read back to sip. the meaning of the sop bits is as described in the sop write section. 4.4.2 cop command with a cop command, programmable filter coefficients can be written into or read from the coefficients ram. with the following bytes you can write into the ram: 1 pu tr 0 1 1 0 ad 0 7 b-filter part 1 b-filter part 2 b-filter delay z-filter x-filter r-filter gr-/gx-filter 03 0b 18 13 23 2b 30 sicofi a 83 8b 98 93 a3 ab b0 sicofi b
semiconductor group 349 test board stut 2060 4.4.3 ciw command the ciw command writes data in the sicofi like filter coefficients, power-up, status of the four signaling pins, number of sicofis at the sip-line. 4.4.4 cir command the cir command reads data out of the sicofi which have been written into the sicofi with the ciw command. you can read out the filter coefficients with the following byte: the coefficients are followed by the values of cr2 and cr1 register. ciw0 = 26, f4, 80 cr1 sip0 cr2 ciw1 = 13, 20, 1d, aa, 9b, cb, 2c, 13, b4 filter coefficients sip1 z-filter coefficients following cir0 = 66 cop command to read the sicofi status sip-line b-filter part 1 b-filter part 2 b-filter delay z-filter x-filter r-filter gr-/gx-filter 43 4b 58 53 63 6b 70 sicofi a c3 cb d8 d3 e3 eb f0 sicofi b
semiconductor group 350 test board stut 2060 4.5 command sig with the sig command you can write the signaling byte. this byte is used by the signaling interface of sicofi. it has: 3 transmit signaling inputs (si1, si2, si3), 3 receive signaling outputs (so1, so2, so3), and 4 signaling pins (sa, sb, sc, sd), which are individually programmable as either transmit input or receive output. the signaling field format is generally in transmit direction in receive direction where sel is the signaling expansion bit if el = 1 in cr2 for the 6 different cases possible, the signaling byte format at sip is for z high-impedance state y do not care si2 si3 sd sc sb sa sel si1 0 7 so2 so3 sd sc sb sa sel so1 0 7 receive signaling byte transmit signaling byte case bit 1 2 3 4 5 a sicofi b sicofi 6 a sicofi b sicofi 7 so1 so1 so1 so1 so1 y so1 y 6 so2 so2 so2 so2 so2 y so2 y 5 so3 so3 so3 so3 so3 y so3 y 4 y y sd sd y y sd y 3 y y sc sc y so1 y so1 2 y y sb sb y so2 y so2 1 y y sa sa y so3 y so3 0 y y y y y y y sd 7 si1 si1 si1 si1 si1 z si1 z 6 si2 si2 si2 si2 si2 z si2 z 5 si3 si3 si3 si3 si3 z si3 z 4 sd sd 0 z sd z 0 z 3 sc sc 0 z z si1 z si1 2 sb sb 0 z z si2 z si2 1 sa sa 0 z z si3 z si3 0 0 z 0 z z sd z 0
semiconductor group 351 test board stut 2060 cases: 1. a single sicofi connected to a single pbc port; el = 0 (no expansion logic): sa, sb, sc, sd programmed as transmit signaling inputs 2. a single sicofi; el = 1 (expansion logic provided; sa, sb, sc, sd programmed as in case 1). 3. a single sicofi; el = 0; sa, sb, sc, sd programmed as receive signaling outputs 4. a single sicofi; el = 1; sa, sb, sc, sd programmed as in case 3. 5. two sicofis connected to one and the same pbc port; sd programmed as transmit signaling input. 6. two sicofis, sd programmed as receive signaling output. if two sicofis are connected to one and the same pbc port, no expansion logic is provided. sa is programmed as input automatically and defines the addressed sicofi: sa = 0: a sicofi sa = 1: b sicofi example: 4.6 microprocessor ports if you want to use the ports of the microprocessor, than you have to extend the microprocessor software and to change the eprom. sig0 = c0 signaling byte sip-line
semiconductor group 352 test board stut 2060 4.7 program examples a) if you want to do measurements with a pcm4 from 'wandel & goltermann' you may program the following example: the pcm4 is the master. it sends the data in time slot 1 and receives from time slot 2. the slic is a harris hc 5502a. due to the clock shift of the pcm4 (C 1 bit) we program the clock shift with 7 to the preceding time slot. in this case: psr = 2d phase 7 for pbc cam00 = 41 receive cha, sip0, time slot 1, hw0 cam20 = 40 transmit cha, sip0, time slot 1, hw0 ciw0 = 26, f4, 80 sicofi power up, all filters off ciw0 = 13, 20, da, ca, 2b, 23, 41, c2, 2b z-filter ciw0 = 23, 50, c8, b5, 49, c2, 21, 04, 90 x-filter ciw0 = 2b, c0, c8, 96, c2, ca, b4, 01, 1d r-filter ciw0 = 03, c4, 25, 13, 3d, 6b, a9, bc, bb b-filter part 1 ciw0 = 0b, 00, 36, d2, c2, b6, 41, 74, 2c b-filter part 2 ciw0 = 18, 19, 19, 11, 19 b-filter delay ciw0 = 30, 41, b0, 20, 92 gr-/gx-filter sig0 = c0 slic power up, conversation ciw0 = 26, f4, 78 sicofi power up, all filters on b) the board is the master. the pcm4 sends the data in time slot 1 and receives the data from time slot 2. the slic is a harris hc 5502a. you have to connect the bnc-plug no. 64 of the pcm4 (external clock) to the frame-out plug (clock section). the parameter 3 of the pcm4 (digital generator) is programmed with 33 (external clock (8 khz)). the shifted clock is exactly 0. in this case we have to program: psr = 36 phase 0 for pbc cam00 = 41 receive cha, sip0, time slot 1, hw0 cam20 = 40 transmit cha, sip0, time slot 2, hw0 ciw0 = 26, f4, 80 sicofi power up, all filters off ciw0 = 13, 20, da, ca, 2b, 23, 41, c2, 2b z-filter ciw0 = 23, 50, c8, b5, 49, c2, 21, 04, 90 x-filter ciw0 = 2b, c0, c8, 96, c2, ca, b4, 01, 1d r-filter ciw0 = 03, c4, 25, 13, 3d, 6b, a9, bc, bb b-filter part 1 ciw0 = 0b, 00, 36, d2, c2, b6, 41, 74, 2c b-filter part 2 ciw0 = 18, 19, 19, 11, 19 b-filter delay ciw0 = 30, 41, b0, 20, 92 gr-/gx-filter sig0 = c0 slic power-up, conversation ciw0 = 26, f4, 78 sicofi power-up, all filters on
semiconductor group 353 test board stut 2060 c) example for communication between sicofi at sip0 and electronic-slic (harris hc 5502a) and between sicofi at sip1 and transformer-slic. cam01 = 82 receive cha, sip1, time slot 1, hw1 cam21 = 81 transmit cha, sip1, time slot 2, hw1 ciw0 = 26, f4, 80 ciw0 = 13, 20, 1d, aa, 9b, cb, 2c, 13, b4 ciw0 = 23, 50, 2b, ae, b1, 24, b2, 02, 42 ciw0 = 2b, 50, 9b, 26, 32, a8, 32, 1b, 22 (trafo-slic) ciw0 = 03, 91, 22, 39, 02, 2b, c3, 22, c1 ciw0 = 0b, 00, 2a, 02, bb, 38, 12, ba, 21 ciw0 = 18, 19, 19, 11, 19 ciw0 = 30, 31, 2a, 10, 33 ciw0 = 26, f4, 78 cam00 = 83 receive cha, sip0, time slot 2, hw1 cam20 = 80 transmit cha, sip0, time slot 1, hw1 ciw0 = 26, f4, 80 ciw0 = 13, 20, da, ca, 2b, 23, 41, c2, 2b ciw0 = 23, 50, c8, b5, 49, c2, 21, 04, 90 ciw0 = 2b, c0, c8, 96, c2, ca, b4, 01, 1d (harris-slic hc 5502a) ciw0 = 03, c4, 25, 13, 3d, 6b, a9, bc, bb ciw0 = 0b, 00, 36, d2, c2, b6, 41, 74, 2c ciw0 = 18, 19, 19, 11, 19 ciw0 = 30, 41, b0, 20, 92 sig0 = c0 ciw0 = 26, f4, 78
semiconductor group 354 test board stut 2060 4.8 programming differences of peb 2060 and peb 2260 if the sicofi testboard is used with the sicofi-2 adaptor the programming commands are different (refer to the sicofi and sicofi-2 datasheet). the programming bytes for the different sicofi filters remain the same with the exception of the gain programming gx and gr. sicofi peb 2060: ciw0 = 30, gr, gr, gx, gx for gr and gx programming sicofi-2 peb 2260: ciw0 = 30, gx, gx, gx, 80, 80 for gx programming ciw0 = 3a, gr, gr for gr programming if you want to use our sicofi-slic programming examples please note that the programming of the signaling is only valid for the sicofi peb 2060. if you use the sicofi-2 peb 2260 the command for the signaling must be changed.
semiconductor group 355 test board stut 2060 5 appendix 5.1 list of replaceable parts ic 1 tl 7702 ic 11 sab 27128 ic 2 m p 8031 ic 12 peb 2050 ic 3 74ls241 ic 13 74ls157 ic 4 74ls155 ic 14 74ls161 ic 5 max 232 ic 15 74ls04 ic 6 sab 8282 ic 16 74ls112 ic 7 74ls157 ic 17 hm 6264 ic 8 74ls241 ic 18 peb 2060 ic 9 74hc125 ic 19 peb 2060 ic 10 74ls393 ic 20 74ls245 resistors r 1 , r 3 , r 4 10 k w r 2 27 k w r 5 , r 6 3.3 k w dekade of resistors r a1 , r a2 , r a3 , r a4 4.7 k w capacitors c 1 , c 12 ... c 18 , c 27 , c 28 , c 40 , c 41 100 nf c 2 , c 4 , ... c 8 , c 25 , c 35 , c 36 1 m f c 3 27 pf c 21 ... c 24 22 m f others s1 reset switch s2 dual dil switch dil 1 8 pole dil-switch dil 2 16 pole dil-switch bu0, bu1 ... bu4, bu6, bu8, bu10, bu12 bnc-plugs bu5, bu7, bu9, bu11, bu13, bu14 banana plugs con1 power supply connector con2 d-sub connector 25 pins con3 d-sub connector 37 pins con6, con7 64 pins connector male (or female)
semiconductor group 356 test board stut 2060 5.2 floor plan of the sicofi ? testboard
semiconductor group 357 test board stut 2060 5.3 circuit diagram of the sicofi ? - 2 adaptor
semiconductor group 358 module sipb 5135 sicofi ? -2 module for the siemens isdn pc userboard (sipb) contents page 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359 2features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359 3use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360 4 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 4.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 4.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362 4.3 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365 4.4 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366 5 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367 5.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367 5.1.1 sld interface mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368 5.1.2 iom ? interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368 5.2 programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 369 5.3 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 369 6 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 370 7 menu software track files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 371 7.1 track files for sld interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 371 7.2 track file for fast iom ? interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 376
semiconductor group 359 module sipb 5135 1 introduction the development of analog subscriber line cards for voice transmission in isdn networks poses enormous efforts to the engineer in implementing the very strict requirements of the specifications to the system, thus problems that cannot be solved by experience must be settled by lengthy trial and error procedures. the sicofi-2 module sipb 5135 helps in developing the analog line card. in an isdn the analog line card consists of a codec filter circuit and an analog part comprising a hybrid and the line drivers and means for ringing and testing. with the sicofi-2 integrated circuit the sicofi-2 module already provides a ready-to-use codec filter and interfaces to two subscriber line circuits (slics). thus this board offers the outstanding advantage of enabling immediate starting with experiments on the analog line card, and to measure very comfortably various transmission functions using the pcm4 measuring device of wandel & goltermann. the integration of the sicofi-2 module into the sipb-system using the menu software ren- ders the development and the adaptation of a voice transmission path to an isdn to simply connecting a single board. 2features l compatible to sipb 5000 userboard system l two interfaces for connecting customer specific slic boards l enables measurements of various transfer functions of the slma such as C return loss Cgain C transhybrid loss Cnoise C gain tracking l same slic connector as on the sicofi testboard (stut 2060) l operating in two different interfaces modes sld or iom-2
semiconductor group 360 module sipb 5135 3use the sicofi-2 module sipb 5135 is developed to be used in connection with the line card module sipb 5121. if at the secondary side of the line card module a pcm4 adaptor sipb 5311 is connected, a very useful development and testing tool for the analog line card results ( figure 1 ). using a pcm4 of wandel & goltermann the following measurements are possible: C return loss C level in a/d- and d/a-direction C gain tracking in a/d- and d/a-direction C noise in a/d- and d/a-direction C echo return loss figure 1 measuring set-up with very sensitive noise measurements power (5 v) may be supplied externally to the sicofi-2 board.
semiconductor group 361 module sipb 5135 4 circuitry 4.1 block diagram figure 2 block diagram of the sicofi ? -2 module
semiconductor group 362 module sipb 5135 4.2 connector pin-outs 4.2.1 service access connector sac (st2) figure 3 service access connector sac 4.2.2 slic connector slc (st1, st4) to connect the slics, a 64-pin connector is used. figure 4 slic connector slc pin use signal 1 C not connected 2 o identifier (sld = "0", iom = "1") 3 i reset 4 o du (iom mode) i/o sip4 (sld mode) 5 i dd (iom mode) i/o sip0 (sld mode) 6 i fsc 7 i dcl 8 i +5v 9 i gnd
semiconductor group 363 module sipb 5135 pin definition and function pin row signal 1 a bridge to other slic connector 2 a bridge to other slic connector 3 a bridge to other slic connector 4 a bridge to other slic connector 5 a bridge to other slic connector 6 a fsc 7 a clk 512 khz 11 a sip4 (only in sld C interface mode) 12 a gnd 13 a +5v 14 a ring ac 65 v 15 a C5v 16 a reset (high active) 17 a C70v 19 a C48v 20 a sip0 (only in sld C interface mode) 21 a so1 (sld) / c1 (iom-2) 22 a so2 (sld) / c2 (iom-2) 23 a so3 (sld) / c3a (iom-2) 24 a si1 (sld) / i1 (iom-2) 25 a si2 (sld) / ci1 (iom-2) 26 a si3 (sld) / ci2 (iom-2) 28 a gnd analog 29 a vin (sicofi analog input) 30 a gnd analog 31 a vout (sicofi analog output) 32 a gnd analog 2 c C12v 4 c +12v 21 c sb (sld) / ci1 (iom-2) 22 c ci2 (iom-2) use i/o i/o i/o i/o i/o o o i/o o o o o o o o o o o o i i i o i o o o o o i/o i/o
semiconductor group 364 module sipb 5135 bridges between both slic connectors are provided at the sicofi-2 module to allow for direct signaling between the slics. these connections are established by jumpers. the signaling pins ci1 and ci2 are connected to pins c21 and c22 or to a25 and a26 respectively. selection is done by dil switch s. this selection is needed to provide additional input pins at row a when operating in the iom-2 interface mode. 4.2.3 power supply plug psc (st3) figure 5 power supply connector psc pin function 1 +5v 2 digital ground (dgnd) 3 +12v 4 analog ground (agnd) 5 C48v 6 battery ground (bgnd) 7 C5v 8 ring ground (rgnd; not used) 9 C12v 10 ring signal (not used) 11 not used
semiconductor group 365 module sipb 5135 4.3 list of replaceable parts component type/value ic1 peb 2260 ic2 74 hc 147 ic3 74 hc 4052 ic4 74 hc 4052 ic5 74 hc 4053 ic6 74 hc 4316 ic7 74 hc 4053 ic8 74 hc 93 ic9 74 hc 4053 ic10 74 hc 04 ic11 74 hc 125 ic12 74 hc 126 ic13 74 hc 00 t1, t2 bc 237a d1, d2 1 n 4007 r 1 r 7 10 k w r 8 7 10 k w c 1 , c 2 10 m f c 3 , c 4 10 nf c 5 100 nf s1 10 1 s2 C s5 dip 8 pol. relay k1 ds4e-sl2 5 v relay k2 ds2e-sl2 5 v
semiconductor group 366 module sipb 5135 4.4 floor plan figure 6 floor plan of the sicofi ? -2 module
semiconductor group 367 module sipb 5135 5 operational information 5.1 configuring the sicofi ? -2 module before power is applied to the sicofi-2 module, it has to be configured by means of switch and jumper settings for a given application. possible configurations of the sicofi-2 module are: C selecting the interface mode (sld- or iom modes) C selecting the signaling pins at the slic connectors slc. selection of the interface mode is done by means of rotary switch s1, and of the signaling pins in using the dip switch s2. switch s1 the 10-position rotary switch s1 selects the interface modes sld or iom. an identifier signal is transmitted to the configuration register of the line card module for indicating the actual interface mode. this configuration register is readable by the menu software. in the iom mode, 9 different modes are possible. only a single iom mode works at a 512 khz clock frequency (slow iom). all other iom modes (fast iom) operate at 4096 mhz, and 8 different channels at the interface are selectable. all existing possibilities are summarized in the following table. s1 position interface mode 0 sld mode 1 iom (dcl = 512 khz) 2 iom channel 0 (dcl = 4096 khz) 3 iom channel 1 (dcl = 4096 khz) 4 iom channel 2 (dcl = 4096 khz) 5 iom channel 3 (dcl = 4096 khz) 6 iom channel 4 (dcl = 4096 khz) 7 iom channel 5 (dcl = 4096 khz) 8 iom channel 6 (dcl = 4096 khz) 9 iom channel 7 (dcl = 4096 khz)
semiconductor group 368 module sipb 5135 5.1.1 sld interface mode in the sld interface mode the pertining identifier signal is logical "0". the sip-line 4 is connected to the sicofi-2. the sip-line 0 is connected to the slic connectors 1 and 2. in the sld interface mode the dip- switches have no function (don't care). 5.1.2 iom ? interface mode there are two different timing modes, 512 khz (slow iom) and 4096 khz (fast iom). in both modes the identifier is logical "1". both bidirectional pins ci1 and ci2 of both sicofi channels (a and b) are switchable between row a and c of the slic connector. this is necessary, because some slics have more signaling outputs at the connector row a than the sicofi-2 board has inputs. selection of the signaling paths is described in the following table 1 . dip switch s2 the module has four dip-switches to select the pin assignment at the slic-connector. selection is only possible in the iom mode and affects the two bidirectional pins ci1a/b and ci2a/b of the sicofi-2 board. table 1 dip switch settings for pin assignment of ci1a/b and ci2a/b dip C switch pin C assignment s1 off off on on s2 off on off on s3 off off on on s4 off on off on a25 x x ci1 ci1 a26 x ci2 x ci2 c21 ci1 ci1 x x c22 ci2 x ci2 x x = open, high impedance
semiconductor group 369 module sipb 5135 5.2 programming being in the iom interface mode , the clock generator, the interface mode, and the epic configuration are programmed first. then the sicofi-2 is to follow. the corresponding track files for programming the epic and sicofi-2 are found in chapter 6 . after this procedure the system is ready for measuring the transfer functions using the pcm4. 5.3 power supply the pc does not provide all necessary voltages to supply the connected boards accordingly. that is why the sicofi-2 module is equipped with a connector for additional external power supply. the voltage + 5 v is selectable internal or external by jumper j1. external 5 v power supply is choosen if sensitive noise measurements are done. with all other measurements the internal voltage source is used.
semiconductor group 370 module sipb 5135 6 glossary arcofi ? audio ringing codec filter b 64 kbit/s voice and data channel not frame oriented d 16 kbit/s packetized data and control transmission channel dd data downstream (at iom interface) dir direction signal (same as fsc) dtmf dual tone multi frequency du data upstream (at iom interface) epic ? extended pcm interface controller fsc frame signal icc isdn communication controller iec-q isdn echo cancellation circuit 2b1q iom ? isdn oriented modular ios iom software isac ? -s isdn subscriber access controller on s-bus isdn integrated services digital network lt/s line termination simulator pc personal computer pcm pulse code modulation s double wire pair (2 b + d) sac service access connector sicofi ? signal codec filter sip serial interface port slc slic connector sld subscriber line digital slic subscriber line interface card te terminal equipment 2b1q transmission code requiring 120-khz bandwidth
semiconductor group 371 module sipb 5135 7 menu software track files this section contains track files for connecting the line-card module and the sicofi-2.the line-card module is configured just by software. the pertinent track file lisisld.trk contains the line card configuration, when the sicofi-2 board is operated in the sld interface mode . when working in the iom mode (4096 khz), the correct track file is lisiiom2.trk. 7.1 track files for sld interface mode lisisld.trk c ***************************************** c lc_sld2 c ***************************************** c c application: initialization of the c line card module c for an sld architecture c additional modules: sicofi2 board c (sipb 5135) c c c configuration: c pcm interface: 4 hws with 32 ts each c cfi interface: 8 bi.ports with 8 ts c each (8 sld lines) c c configuration of the lc module: c config register bits: c id,cks/tc2/tc1/tc0/dch/dma/cts/res c clock mode 7 (xtal 2048 khz) c * reset of on board devices c * cks=1 (3rd slot may be occupied by c an audio module v2.0) w /lineca/config/config/config f1 w /lineca/config/config/config f0 c c configuration of the pcm interface: c * pcm mode 0, single clock rate c * pfs evaluated with falling edge c * no comparison function w /lineca/epic/pcmcfi/pmod 00 c * pcm bit number is 256 w /lineca/epic/pcmcfi/pbnr ff c * pcm offset is 2 bits (pfs marks c bit 5 of ts 0) in up and downstream c direction
semiconductor group 372 module sipb 5135 w /lineca/epic/pcmcfi/pofd ef w /lineca/epic/pcmcfi/pofu 17 c * transmit with rising edge, receive c with falling edge of pcl w /lineca/epic/pcmcfi/pcsr 01 c c configuration of the cfi interface: c * cfi mode 3, clock source: pcl/pfs c * pfs evaluated with falling edge c * prescaler = 1 w /lineca/epic/pcmcfi/cmd1 2c c * fsc output: fc mode 6 c * dc output: single rate c * xmit rising, rec falling edge w /lineca/epic/pcmcfi/cmd2 c0 c * cfi bit number is 64 w /lineca/epic/pcmcfi/cbnr 3f c * pfs marks cfi ts0, bit7 c * no shift between xmit and rec w /lineca/epic/pcmcfi/ctar 02 w /lineca/epic/pcmcfi/cbsr 20 c * subchannel position: 64kbps=bits7.0 c 32kbps=bits7.4 c 16kbps=bits7.6 w /lineca/epic/pcmcfi/cscr 00 c c initialization of cm ctrl field: c * cm reset mode w /lineca/epic/marscr/omdr 00 c * ff is copied to all positions of c * the cm ctrl field w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/macr 70 c c cfi configuration for sld: c * cm init mode w /lineca/epic/marscr/omdr 80 c cfi time slots 2 and 3 of port 4 are c programmed as downstream feature c control and signaling channels, c time slots 6 and 7 as upstream c feature ctrl and signaling channels c cfi ts 0-7 of port 4 represent thus c sld port 4 (amc pin 10c) c * ts 2 downstream: c sig value ff is transmitted w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 18 w /lineca/epic/marscr/macr 7a c * ts 3 downstream: w /lineca/epic/marscr/madr 00 w /lineca/epic/marscr/maar 19
semiconductor group 373 module sipb 5135 w /lineca/epic/marscr/macr 7b c * ts 6 upstream: c ff is init value for sig receive w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar b8 w /lineca/epic/marscr/macr 7b c * ts 7 upstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar b9 w /lineca/epic/marscr/macr 7b c c * pcm status is r /lineca/epic/marscr/star 05 c * not synchronized (pss=0) c c setting epic to normal mode w /lineca/epic/marscr/omdr c0 r /lineca/epic/marscr/ista 08 r /lineca/epic/marscr/star 25 c pcm status: synchronized (pss=1) c c initialization of the pcm tristate c field, all ch. to high impedance w /lineca/epic/marscr/madr 00 w /lineca/epic/marscr/macr 68 c c activation epic: c * normal mode, pcm and cfi active c * cfi output drivers push-pull c * mf ch. handshake protocol disabled w /lineca/epic/marscr/omdr e2 c c mask of idecl interrupts: w /lineca/idec/common/vism 0f c c programming of sicofi2: c power down, 3bytes will follow: w /lineca/epic/mchstr/mffifo 05 c transmit signaling bits to tristate: w /lineca/epic/mchstr/mffifo 10 c tone generator off w /lineca/epic/mchstr/mffifo 00 c all filters off, a-law, sb input: w /lineca/epic/mchstr/mffifo 00 c address for sld port 4: w /lineca/epic/mchstr/mfsar 0c c transmit command: w /lineca/epic/mchstr/cmdr 04 r /lineca/epic/mchstr/ista 20 c mffi interrupt: fc transfer complete c
semiconductor group 374 module sipb 5135 c read back from sicofi: r /lineca/epic/mchstr/star 25 c mffifo: empty and may be written c read back command for sicofi: c power up, read back cr2, cr1: w /lineca/epic/mchstr/mffifo 66 c address of sld port 4, 8 bytes are c expected w /lineca/epic/mchstr/mfsar 8c c transmit+receive same line command: w /lineca/epic/mchstr/cmdr 0c r /lineca/epic/mchstr/ista 20 c mffi interrupt: fc transfer complete r /lineca/epic/mchstr/star 26 c mffifo is not empty and may be read r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 26 c mffifo is not empty and may be read r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 26 r /lineca/epic/mchstr/mffifo df c nop command received i.e. no further c bytes will follow! c reset mffifo: w /lineca/epic/mchstr/cmdr 01 r /lineca/epic/mchstr/star 25 c mffifo empty and may be written c c digital loop back via pcm-register c in sicofi2 b1 channel: w /lineca/epic/mchstr/mffifo 25 w /lineca/epic/mchstr/mffifo 11 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mfsar 0c w /lineca/epic/mchstr/cmdr 04 r /lineca/epic/mchstr/ista 20 c c transmission of idle code "aa" in b1 w /lineca/epic/marscr/madr aa w /lineca/epic/marscr/maar 08 w /lineca/epic/marscr/macr 79 c up ch. setup for b1 receive: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar a8 w /lineca/epic/marscr/macr 79 c reading received b1 value: w /lineca/epic/marscr/maar a8 w /lineca/epic/marscr/macr c8 r /lineca/epic/marscr/madr aa c change value to "12":
semiconductor group 375 module sipb 5135 w /lineca/epic/marscr/madr 12 w /lineca/epic/marscr/maar 08 w /lineca/epic/marscr/macr 48 c reading received value: w /lineca/epic/marscr/maar a8 w /lineca/epic/marscr/macr c8 r /lineca/epic/marscr/madr 12 c c removing digital pcm loop: w /lineca/epic/mchstr/mffifo 25 w /lineca/epic/mchstr/mffifo 10 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mfsar 0c w /lineca/epic/mchstr/cmdr 04 r /lineca/epic/mchstr/ista 20 c c transmission of idle codes in pcm c time slots 0 and 31 of port0: c * "99" in ts 0: w /lineca/epic/marscr/madr 99 w /lineca/epic/marscr/maar 80 w /lineca/epic/marscr/macr 08 c * ts 0 to low impedance: w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 80 w /lineca/epic/marscr/macr 60 c * "88" in ts 31: w /lineca/epic/marscr/madr 88 w /lineca/epic/marscr/maar f9 w /lineca/epic/marscr/macr 08 c * ts 31 to low impedance: w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar f9 w /lineca/epic/marscr/macr 60 c c switching of b channels between sld c and pcm interface: c (u=upstream, d=downstream) c c * u: sip4, b1 to pcm port0, ts1: w /lineca/epic/marscr/madr 81 w /lineca/epic/marscr/maar a8 w /lineca/epic/marscr/macr 71 c * pcm port0, ts1 to low impedance: w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 81 w /lineca/epic/marscr/macr 60 c * d: pcm port0, ts1 to sip4, b1: w /lineca/epic/marscr/madr 01
semiconductor group 376 module sipb 5135 w /lineca/epic/marscr/maar 08 w /lineca/epic/marscr/macr 71 c c the connection sld b1 <-> pcm ts 1 c is established, a loop back can be c realized by a short circuit at sac c (pins 6 and 7) or by using the pcm c test loop bit (ptl) in omdr: w /lineca/epic/marscr/omdr f2 c removing the test loop: w /lineca/epic/marscr/omdr e2 c c transmission of signaling byte to c subscriber: c write value in madr (e.g. 34h) w /lineca/epic/marscr/madr 34 c write subscr. address into maar c (e.g. 18h for sip4) w /lineca/epic/marscr/maar 18 c write moc=1001 in macr: w /lineca/epic/marscr/macr 48 c change value to "00": w /lineca/epic/marscr/madr 00 w /lineca/epic/marscr/maar 18 w /lineca/epic/marscr/macr 48 7.2 track file for fast iom ? interface mode lisiiom2.trk c ********************************************* c lc_iom2 c ********************************************* c c application: initialization of the c line card module c for an iom2 line card c c setup: line card module sipb 5121 c optional: s-access or layer-1 c modules in 3rd amc slot and/ c or external layer-1 modules c connected to sac c for the configuration of the c additional modules please c refer to the pertaining c module descriptions c the layer-1 modules should be c set to lt mode, iom2 mode c with an appropriate iom chan.
semiconductor group 377 module sipb 5135 c assignment as indicated c below c c note: this track file exists also in c a non commented version: c nc_iom2 c c iom2 channel assignment: c * ch0: dig. subsc. decentral d c * ch1: dig. subsc. central d c * ch2: dig. subsc. mixed d c * ch3: analog subscriber (sicofi2) c c interface characteristics: c pcm interface: 2 hws with 64 ts each c cfi interface: 4 hws with 32 ts each c (4 iom2 interfaces) c c configuration of the lc module: c config register bits: c id,cks/tc2/tc1/tc0/dch/dma/cts/res c * clock mode 6 (xtal 4096khz) c * reset of on board devices c * cks=0: 3rd slot may be s-access c or p-access module w /lineca/config/config/config 61 w /lineca/config/config/config 60 c * note: if 3rd slot should be layer-1 c module please program: c config e1 c config e0 c c configuration of the pcm interface: c * pcm mode 1, single clock rate c * pfs evaluated with falling edge c * port assignment: port0=txd0,rxd0 c port1=txd2,rxd3 c * no comparison function w /lineca/epic/pcmcfi/pmod 44 c * pcm bit number is 512 w /lineca/epic/pcmcfi/pbnr ff c * no pcm offset, output with rising, c * input with falling edge w /lineca/epic/pcmcfi/pofd f0 w /lineca/epic/pcmcfi/pofu 18 w /lineca/epic/pcmcfi/pcsr 45 c c configuration of the cfi interface: c * cfi mode 0, clock source: pcl/pfs c * pfs evaluated with falling edge c * prescaler = 1
semiconductor group 378 module sipb 5135 w /lineca/epic/pcmcfi/cmd1 20 c * fsc output: fc mode 6 c * dcl output: double rate c * xmit rising, rec falling edge w /lineca/epic/pcmcfi/cmd2 d0 c * cfi bit number is 256 w /lineca/epic/pcmcfi/cbnr ff c * pfs marks cfi ts31,bit1 w /lineca/epic/pcmcfi/ctar 02 c * no shift between xmit and rec w /lineca/epic/pcmcfi/cbsr 00 c * subchannel position: 64kbps=bits7.0 c 32kbps=bits7.4 c 16kbps=bits7.6 w /lineca/epic/pcmcfi/cscr 00 c c initialization of cm ctrl field: c * cm reset mode w /lineca/epic/marscr/omdr 00 c * ff is copied to all positions of c * the cm ctrl field w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/macr 70 c c cfi configuration for iom2: c * cm init mode w /lineca/epic/marscr/omdr 80 c c cfi time slots 2 and 3 of port 0 c are programmed as monitor and c/i c channels, decentral d ch. handling c (d ch. not switched to pcm) c cfi ts 0-3 represent thus iom2 ch.0 c with b1, b2, monitor and d/ci/mr,mx c * ff is copied to all addressed c * positions of the cm data field w /lineca/epic/marscr/madr ff c * ts 2 downstream: w /lineca/epic/marscr/maar 08 w /lineca/epic/marscr/macr 78 c * ts 3 downstream: w /lineca/epic/marscr/maar 09 w /lineca/epic/marscr/macr 7b c * ts 2 upstream: w /lineca/epic/marscr/maar 88 w /lineca/epic/marscr/macr 78 c * ts 3 upstream: w /lineca/epic/marscr/maar 89 w /lineca/epic/marscr/macr 70 c c cfi time slots 6 and 7 of port 0 are
semiconductor group 379 module sipb 5135 c programmed as monitor and c/i c channels, central d ch. handling c (d ch. is switched to pcm port 0, c ts 5, bits 1..0 in up and downstream c direction c cfi-ts 4-7 represent thus iom2 ch. 1 c * ts 6 downstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 18 w /lineca/epic/marscr/macr 7a c * ts 7 downstream: w /lineca/epic/marscr/madr 09 w /lineca/epic/marscr/maar 19 w /lineca/epic/marscr/macr 74 c * ts 6 upstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 98 w /lineca/epic/marscr/macr 78 c * ts 7 upstream: w /lineca/epic/marscr/madr 89 w /lineca/epic/marscr/maar 99 w /lineca/epic/marscr/macr 74 c c cfi time slots 10 and 11 of port 0 c are programmed as monitor and c/i c channels, mixed d ch. handling c upstream the d ch. is switched to c pcm port 0, ts 5, bits 3..2 c downstream the d ch. is not switched c directly to cfi port 0, ts 11 but c is switched to cfi port 3, ts 1, c bits 7..6 which is connected to cdr c of the decentralized idec c cfi ts 8-11 represent thus iom2 ch.2 c * ts 10 downstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 28 w /lineca/epic/marscr/macr 78 c * ts 11 downstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 29 w /lineca/epic/marscr/macr 7b c * ts 10 upstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar a8 w /lineca/epic/marscr/macr 78 c * ts 11 upstream: w /lineca/epic/marscr/madr 89 w /lineca/epic/marscr/maar a9 w /lineca/epic/marscr/macr 75 c * downstream connection d ch.:
semiconductor group 380 module sipb 5135 w /lineca/epic/marscr/madr 09 w /lineca/epic/marscr/maar 07 w /lineca/epic/marscr/macr 75 c c cfi time slots 14 and 15 of port 0 c are programmed as monitor and c signaling channels (analog iom) c cfi ts 12-15 represent thus iom2 ch3 c * ts 14 downstream: w /lineca/epic/marscr/madr ff w /lineca/epic/marscr/maar 38 w /lineca/epic/marscr/macr 7a c * ts 15 downstream: w /lineca/epic/marscr/maar 39 w /lineca/epic/marscr/macr 7b c * ts 14 upstream: w /lineca/epic/marscr/maar b8 w /lineca/epic/marscr/macr 7a c * ts 15 upstream: w /lineca/epic/marscr/maar b9 w /lineca/epic/marscr/macr 7a c * pem status is r /lineca/epic/marscr/star 05 c * not synchronized (pss=0) c c setting epic to normal mode w /lineca/epic/marscr/omdr c0 r /lineca/epic/marscr/ista 08 r /lineca/epic/marscr/star 25 c pcm status: synchronized (pss=1) c c initialization of the pcm tristate c field, all ch. to high impedance w /lineca/epic/marscr/madr 00 w /lineca/epic/marscr/macr 68 c c activation epic: c * normal mode, pcm and cfi active c * cfi output drivers push-pull c * mf ch. handshake protocol enabled w /lineca/epic/marscr/omdr e6 c c reset cififo: w /lineca/epic/marscr/cmdr 10 c c setting pcm port0, ts 5 to low c impedance: w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 89 w /lineca/epic/marscr/macr 60 c
semiconductor group 381 module sipb 5135 c mask of idec1 interrupts: w /lineca/idec/common/vism 0f c c initialization of idec1 c * single connection iom mode c * cha assigned to iom ch0, uncond. c transmission, no address compare c (completely decentral d channel c handling) c * chb not used (central d handling) c * chc assigned to iom ch2, master c mode, sapi s compare (mixed d ch. c handling) c * chd not used (analog iom) c c common registers: w /lineca/idec/common/ccr 82 w /lineca/idec/common/acr 4a c c cha registers: w /lineca/idec/cha_a/mode 0c c c chc registers: w /lineca/idec/cha_c/tsr 04 w /lineca/idec/cha_c/mode 6c c c * enabling interrupts, reset cha,c w /lineca/idec/common/vism 0a w /lineca/idec/cha_a/cmdr c1 r /lineca/idec/cha_a/ista 10 r /lineca/idec/cha_a/star 11 w /lineca/idec/cha_c/cmdr c1 r /lineca/idec/cha_c/ista 50 r /lineca/idec/cha_c/star 51 c c initialization of idec2 c * single connection ts mode c * ch b is assigned to pcm port0, ts5 c bits 1..0, uncond. transmission c no address compare (the d ch. of c iom ch1 is handled centralized) c * chc is assigned to pcm port0, ts5 c bits 3..2, uncond., tr., sapi p c address compare (the p data of iom c ch2 is handled centralized) c c * common registers: w /lineca/idec_2/common/ccr 04 w /lineca/idec_2/common/acr 49 c c * chb registers
semiconductor group 382 module sipb 5135 w /lineca/idec_2/cha_b/tsr 17 w /lineca/idec_2/cha_b/mode 0c c c * chc registers: w /lineca/idec_2/cha_c/tsr 16 w /lineca/idec_2/cha_c/mode 0c c c * enabling interrupts, reset chb,c w /lineca/idec_2/common/vism 09 w /lineca/idec_2/cha_b/cmdr c1 r /lineca/idec_2/cha_b/ista 30 r /lineca/idec_2/cha_b/star 31 w /lineca/idec_2/cha_c/cmdr c1 r /lineca/idec_2/cha_c/ista 50 r /lineca/idec_2/cha_c/star 51 c c the line card is now ready for use c in order to test the setup you can c execute the track file lc_isac c c ***************************************** c c **************************************** c * sicofi2 * c **************************************** c c hardware: line card sipb 5121 c sicofi2 board sipb 5135 c pcm4 adaptor sipb 5311 c c configuration: c line card: via software c c sicofi 2: s1 in position 5 c c pcm4 adaptor: j1 is open c **************************************** c c sicofi2 set up in channel 3 of iom2 c c s1 in position 5 c c **************************************** c please run the track file c lc_iom2.trk c first to configure the line card c **************************************** c **************************************** c c selecting epic to monitor handshake c in channel 3
semiconductor group 383 module sipb 5135 w /lineca/epic/mchstr/mfsar 1c c **************************************** c in case of channel 0 mfsar = 04 * c s1 position 2 * c in case of channel 1 mfsar = 0c * c s1 position 3 * c in case of channel 2 mfsar = 14 * c s1 position 4 * c in case of channel 4 mfsar = 24 * c s1 position 6 * c in case of channel 5 mfsar = 2c * c s1 position 7 * c in case of channel 6 mfsar = 34 * c s1 position 8 * c in case of channel 7 mfsar = 3c * c s1 position 9 * c **************************************** c c channel 3 b1 to pcm time slot 1 w /lineca/epic/marscr/madr 81 w /lineca/epic/marscr/maar b0 w /lineca/epic/marscr/macr 71 w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 81 w /lineca/epic/marscr/macr 60 c c pcm time slot 1 to channel 3 b1 w /lineca/epic/marscr/madr 01 w /lineca/epic/marscr/maar 31 w /lineca/epic/marscr/macr 71 c c channel 3 b2 to pcm time slot 2 w /lineca/epic/marscr/madr 82 w /lineca/epic/marscr/maar b1 w /lineca/epic/marscr/macr 71 w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 82 w /lineca/epic/marscr/macr 60 c c pcm time slot 2 to channel 3 b2 w /lineca/epic/marscr/madr 02 w /lineca/epic/marscr/maar 30 w /lineca/epic/marscr/macr 71 c c c sicofi identification: c write to sicofi2 80h, 00h w /lineca/epic/mchstr/mffifo 80 w /lineca/epic/mchstr/mffifo 00 c epic enable receive + transmit w /lineca/epic/mchstr/cmdr 08
semiconductor group 384 module sipb 5135 r /lineca/epic/mchstr/ista 20 c epic received data r /lineca/epic/mchstr/star 26 c first byte from sicofi2 r /lineca/epic/mchstr/mffifo 80 r /lineca/epic/mchstr/star 26 c second byte from sicofi2 r /lineca/epic/mchstr/mffifo 80 r /lineca/epic/mchstr/star 27 c reset fifo w /lineca/epic/mchstr/cmdr 01 r /lineca/epic/mchstr/star 25 c c initialization of sicofi: c cr4, cr3, cr2, cr1 c 00h, 00h, 00h, 00h c for both channels of sicofi2 c c sicofi2 address = 81h w /lineca/epic/mchstr/mffifo 81 c channel a: w /lineca/epic/mchstr/mffifo 05 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 c channel b: w /lineca/epic/mchstr/mffifo 85 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 47 c send the initialisation bytes w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c c c power up both channels w /lineca/epic/mchstr/mffifo 24
semiconductor group 385 module sipb 5135 w /lineca/epic/mchstr/mffifo e4 c send the bytes w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 w /lineca/epic/mchstr/cmdr 01 r /lineca/epic/mchstr/star 25 c end of power up c c c end of track file c
semiconductor group 386 slic babyboard stus 5502 slic babyboard stus 5502 for harris slic hc 5502 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 390 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 390 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 0 3.1.4 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 390 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394 4.2 mode select. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394 4.2.1 mode select for stut 2060 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394 4.2.2 mode select for sipb 5135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396
semiconductor group 387 slic babyboard stus 5502 1features l interface to sicofi testboard stut 2060 l interface to sicofi 2 sipb 5135 l analog telephone directly connectable l ring relay on board l secondary protection circuit on board 2use for one of our slic-applications a harris slic babyboard has been designed in order to connect it with the sicofi testboard stut 2060. with both boards it is possible to measure the transfer functions of the harris slic hc 5502a together with the sicofi and to check the calculations done with sicofi coefficients program. the signaling pins of sicofi are connected with the control interface of the harris slic to control the slic functions. therefore it is possible to select the modes power down power up ringing and to read out the status of hook switch (off or on), ring/tip, and ground-key.
semiconductor group 388 slic babyboard stus 5502 figure 1 connecting the slic babyboard to the sicofi ? testboard for practical use the slic babyboard stus 5502 is inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up like that shown in figure 1 , the transfer functions of an analog line card can be established. for programming, the byte file is used which is to be found in the harris slic hc 5502 application note.
semiconductor group 389 slic babyboard stus 5502 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 5502 in figure 2 the three functional blocks of the slic babyboard are shown: Cslic C protection circuit C signaling
semiconductor group 390 slic babyboard stus 5502 3.1.1 slic the slic requires a few external components for output impedance, echo cancellation, filter capacitors, and power supply. some of these functions are realized by the sicofi and hence it was possible to reduce the number of extra components. the description of the slic is to be found in the pertinent application note. the slic switches the ringer relay and provides a digital parallel interface to control the slic modes. these modes are C power down C conversation (active) C ringing. C 3.1.2 protection circuit the protection circuit screens the slic against high voltages (secondary protection). this is realized by 2 diodes d1, d2 and the fuse resistors r b1 r b4 . no primary protection, however, e.g. surge arristors, is provided. 3.1.3 signaling the signaling lines connect the sicofi signaling interface to the digital slic interface. the sicofi switches the slic into one of the three possible modes and the slic provides the corresponding information on the loop status (ground key or on/off-hook) for the sicofi or sicofi-2. actual ringing, however, is not possible because there is no ringer relais installed. 3.1.4 power supply power is supplied to the slic via the slic connector slc.
semiconductor group 391 slic babyboard stus 5502 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected pin row signal 12 a gnd 13 a +5v 19 a C48v 21 a so1 22 a so2 24 a si1 25 a si2 26 a si3 28 a agnd 29 a vin 31 a vout 32 a agnd 4 c +12v function i i i i i o o i i o i i i meaning power supply power supply power supply /rc /pd /shd /gkd /gkd analog ground 4-wire analog output 4-wire analog input analog ground power supply
semiconductor group 392 slic babyboard stus 5502 3.3 wiring diagram figure 4 wiring diagram
semiconductor group 393 slic babyboard stus 5502 3.4 list of replaceable parts component type/value ic1 hc 5502 d1 d4 bay 45 d5, d6 zpo3v9 c 1 470 nf/100 v c 2 150 nf/100 v c 3 1 m f/100 v c 4 330 nf/100 v c kx , c kr 470 nf/100 v r 1 , r 2 1k w r b1 r b4 150 w r ix 10 k w 3.5 floor plan figure 5 floor plan of the stus 5502 babyboard
semiconductor group 394 slic babyboard stus 5502 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of setting the jumpers j1 and j2 and switches s1 and s2. possible configurations are: C with or without voltage divider in receive direction C connection to 4-wire slic side the babyboard contains two jumpers j1 and j2 to select the voltage divider, and two switches s1 and s2 to establish the connection to the 4-wire slic side ( see figure 5 ). voltage divider not used j1 set voltage divider used j2 set connection to sicofi vin s2 in position on connection to sicofi vout s1 in position on 4.2 mode select the actual modes of the harris slic hc 5502 are selected by the digital interface. this interface is connected to the signaling pins of the sicofi. the signaling commands are different for the sicofi testboard stut 2060 and for the sicofi-2 board sipb 5135. 4.2.1 mode select for stut 2060 mode selection differs for the testboard stut 2060 being equipped with the sicofi peb 2060 or with the sicofi-2 peb 2260. following byte sequences apply to the stut 2060 using the peb 2060 : sig0 = 80 power down sig0 = c0 active, conversation sig0 = 30 ringing (no on-board ring relais) the line status (off-hook/ground-key), which is selected by the above signaling, can be read out via the sicofi sip-line: sig0: 7f on-hook sig0: 6f off-hook and ground-key sig0: 0f off-hook (no ground-key) following byte sequences apply to the stut 2060 using the peb 2260 for both channels: sig0 = 11 power down sig0 = 33 active, conversation sig0 = 00 ringing (no on-board ring relais) the line status can be read out via the sicofi sip-line: sig0: 77 on-hook sig0: 00 off-hook and ground-key sig0: 66 off-hook (no ground-key)
semiconductor group 395 slic babyboard stus 5502 4.2.2 mode select for sipb 5135 following byte sequences apply to the sipb 5135 using the peb 2260 channel a (channel b = + 80 h ): c/i = 07 power down c/i = 0f active, conversation c/i = 03 ringing (no on-board ring relais) the loop and ground key information are available from the sicofi-2 board for both slics at the same time): c/i = db loop detection: off-hook, ground key not pushed c/i = 03 loop detection: off-hook, ground key pushed c/i = ff loop detection: on-hook 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pc personal computer pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc user board (system) sld subscriber line data stus siemens telecom user board slic stut siemens telecom user board testboard syp synchronous port
semiconductor group 396 slic babyboard stus 5502 6 application and example the babyboard stus 5502 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using harris slics hc 5502a. to demonstrate its functionality a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in chapter 4 . the pcm4 is connected to the testboard for to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sicofi peb 2060 + harris slic hc 5502". the byte file (hc5502.byt) is shown in the following table 1 for the sicofi testboard stut 2060 using the peb 2060: table 1 byte file to program the sicofi ? psr = 36 cam00 = 41 cam20 = 40 ciw0 = 06, f4, 80 ciw0 = 13, 30, ba, ea, 25, 23, 41, c1, bb ciw0 = 23, 50, c8, b5, 4a, c2, 21, 04, 90 ciw0 = 2b, d0, c8, 84, dc, b1, 93, 02, 1d ciw0 = 30, a0, 11, 20, 92 ciw0 = 03, c4, 12, 23, 32, 72, b9, b2, ba ciw0 = 0b, 00, 97, fd, c8, dd, 4c, c2, bc ciw0 = 18, 19, 19, 11, 19 ciw0 = 26, f4, 78 sig0 = c0 switch and jumpers settings before connecting the testboard to the pcm4 and slic babyboard respectively, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1 C 1.4 on dil switch 2.1 C 2.4 on babyboard: voltage divider not used j1 set voltage divider used j2 set connection to sicofi vin s2 in position on connection to sicofi vout s1 in position on
semiconductor group 397 slic babyboard stus 5502 figure 6 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set of wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 398 slic babyboard stus 5509 slic babyboard stus 5509 for harris slic hc 5509 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 401 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 401 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2 3.1.4 ring detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402 3.1.5 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 403 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 404 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406 4.2 mode select. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406 4.2.1 mode select for stut 2060 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406 4.2.2 mode select for sipb 5135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408
semiconductor group 399 slic babyboard stus 5509 1features l interface to sicofi testboard stut 2060 l interface to sicofi-2 board sipb 5135 l analog telephone directly connectable l ring relay on board l secondary protection circuit on board 2use for one of our slic-applications a harris slic babyboard has been designed in order to connect it with the sicofi testboard stut 2060. with both boards it is possible to measure the transfer functions of the harris slic hc 5509 together with the sicofi and to check the calculations done with sicofi coefficients program. the signaling pins of sicofi are connected with the control interface of the harris slic to control the slic functions. therefore it is possible to select the modes power down power up ringing and to read out the status of hook switch (off or on), ring/tip, and ground-key.
semiconductor group 400 slic babyboard stus 5509 figure 1 connecting the slic babyboard to the sicofi ? testboard for practical use the slic babyboard stus 5509 is inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up like that shown in figure 1 , the transfer functions of an analog line card can be established. for programming, the byte file is used which is to be found in the harris slic hc 5502 application note, the sicofi however has to be switched to the 'agr' with 6 db attenuation. the reason is that in contrast to the stus 5502 the stus 5509 has no voltage devider on board.
semiconductor group 401 slic babyboard stus 5509 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 5509 in figure 2 the four functional blocks of the slic babyboard are shown: Cslic C protection circuit Csignaling C ring detector
semiconductor group 402 slic babyboard stus 5509 3.1.1 slic the slic requires a few external components for output impedance, echo cancellation, filter capacitors, and power supply. some of these functions are realized by the sicofi and hence it was possible to reduce the number of extra components. the description of the slic is to be found in the hc 5502a application note. the slic switches the ringer relay and provides a digital parallel interface to control the slic modes. these modes are C power down C conversation (active) C ringing. 3.1.2 protection circuit the protection circuit screens the slic against high voltages (secondary protection). this is realized by 2 diodes d1, d2 and the fuse resistors r b1 r b4 . no primary protection, however, e.g. surge arristors, is provided. 3.1.3 signaling the signaling lines connect the sicofi signaling interface to the digital slic interface. the sicofi switches the slic into one of the three possible modes and the slic provides the corresponding information on the loop status (ground key or on/off-hook) for the sicofi or sicofi-2. 3.1.4 ring detector the ring detector provides a signal when the ringing signal crosses 0 v. only in this moment the slic can activate the ring relais, because there is no noise on the line. 3.1.5 power supply power is supplied to the slic via the slic connector slc.
semiconductor group 403 slic babyboard stus 5509 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected. pin row signal 12 a gnd 13 a +5v 19 a C48v 21 a so1 22 a so2 24 a si1 25 a si2 26 a si3 28 a agnd 29 a vin 31 a vout 32 a agnd 4 c +12v function i i i i i o o i i o i i i meaning power supply power supply power supply /f0 /f1 /shd /gkd /alarm analog ground 4-wire analog output 4-wire analog input analog ground power supply 23 a so3 i /test
semiconductor group 404 slic babyboard stus 5509 3.3 wiring diagram figure 4 wiring diagram of the slic babyboard stus 5509
semiconductor group 405 slic babyboard stus 5509 3.4 list of replaceable parts component type/value d1 d5 1n4007 d6 bzx55c3v3 d7 1n4148 c 1 300 nf/30 v c 2 680 nf/20 v c 3 , c 4 1 m f/100 v c 5 47 nf c 6 2.2 m f/40 v c 7 100 nf c 8 1 m f c s1 , c s2 100 nf c ac 470 nf/100 v r 1 3.3 k w r 2 , r 3 10 k w r 4 20 k w r b1 r b4 50 w 1% r s1 , r s2 1k w r l1 , r l2 100 k w r f 20 k w z 0 60 k w 3.5 floor plan figure 5 floor plan of the stus 5509 babyboard
semiconductor group 406 slic babyboard stus 5509 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be connected to the a/b-lines or a telephone and to be plugged to the testboard. 4.2 mode select the actual modes of the harris slic hc 5509 are selected by the digital interface. this interface is connected to the signaling pins of the sicofi. the signaling commands are different for the sicofi testboard stut 2060 and for the sicofi-2 board sipb 5135. in addition a software reset is required to switch it to the conversation mode. 4.2.1 mode select for stut 2060 mode selection differs for the testboard stut 2060 being equipped with the sicofi peb 2060 or with the sicofi-2 peb 2260. following byte sequences apply to the stut 2060 using the peb 2060 : sig0 = 60 power down sig0 = 20 active, conversation sig0 = 10 ringing sig0 = e0 loop power denial active the line status (off-hook/ground-key), which is selected by the above signaling, can be read out via the sicofi sip-line: sig0: 111x xxxx on-hook sig0: 001x xxxx off-hook and ground-key sig0: 011x xxxx off-hook (no ground-key) sig0: xx0x xxxx thermal protection active conversation is programmed as follows: sig0 = 20 sig0 = 60 sig0 = 20 following byte sequences apply to the stut 2060 using the peb 2260 for both channels: sig0 = 66 power down sig0 = 44 active, conversation sig0 = 33 ringing (no on-board ring relais) the line status can be read out via the sicofi sip-line (both slics have the same status): sig0: x111 x111 on-hook sig0: x010 x010 off-hook and ground-key sig0: x110 x110 off-hook (no ground-key)
semiconductor group 407 slic babyboard stus 5509 4.2.2 mode select for sipb 5135 following byte sequences apply to the sipb 5135 using the peb 2260 channel a (channel b = + 80h): c/i = 7b power down c/i = 73 active, conversation c/i = 0f ringing (no on-board ring relais) the loop and ground key information are available from the sicofi-2 board for both slics at the same time): c/i = db loop detection: off-hook, ground key not pushed c/i = 93 loop detection: off-hook, ground key pushed c/i = ff loop detection: on-hook 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc user board (system) slc slic interface connector sld subscriber line data slic subscriber line interface circuit stus siemens telecom user board slic stut siemens telecom user board testboard syp synchronous port
semiconductor group 408 slic babyboard stus 5509 6 application and example the babyboard stus 5509 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using harris slics hc 5509. to demonstrate its functionality a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in chapter 4 . the pcm4 is connected to the testboard for to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sicofi peb 2060 + harris slic hc 5509". the byte file (hc5509.byt) is shown in the following table 1 for the sicofi testboard stut 2060 using the peb 2060: table 1 byte file to program the sicofi ? psr = 36 cam00 = 41 cam20 = 40 ciw0 = 06, 04, 80 ciw0 = 13, 30, ba, ea, 25, 23, 41, c1, bb ciw0 = 23, 50, c8, b5, 4a, c2, 21, 04, 90 ciw0 = 2b, d0, c8, 84, dc, b1, 93, 02, 1d ciw0 = 30, a0, 11, 20, 92 ciw0 = 03, c4, 12, 23, 32, 72, b9, b2, ba ciw0 = 0b, 00, 97, fd, c8, dd, 4c, c2, bc ciw0 = 18, 19, 19, 11, 19 sig0 = 20 sig0 = 60 sig0 = 20 ciw0 = 25, 00, 18, 04, 78 switch and jumpers settings before connecting the testboard to the pcm4 and slic babyboard respectively, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1 C 1.4 on dil switch 2.1 C 2.4 on
semiconductor group 409 slic babyboard stus 5509 figure 6 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set by wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 410 slic babyboard stus 3762 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 14 3.1.4 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418 4.2 mode select for sipb 5135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420 5 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
semiconductor group 411 slic babyboard stus 3762 1features l performs telephone line interface functions l interface to sicofi testboard stut 2060 l interface to sicofi-2 board sipb 5135 l analog telephone directly connectable to the slic babyboard l ring relay driver provided on board l secondary protection circuit on board l loop monitoring functions 2use for applications of the ericsson slic pbl 3736 an ericsson slic babyboard has been designed. this babyboard fits to the sicofi testboard stut 2060. by means of these two boards, namely the slic babyboard and the sicofi testboard, the transfer functions, levels, return loss, transhybrid loss, and other properties of the slic linked to the sicofi can be evaluated. this way test results obtained with the pcm4 measuring set and calculations performed by the sicofi coefficients program can be compared. by doing so, the validity of the calculations is checked and errors that might have occurred can be eliminated. to program the slic functions the signaling pins of the sicofi are connected to the control interface of the ericsson slic. it is possible to select the modes power down power up ringing and also to read out the status of the loop current detector and the ring/trip comparator.
semiconductor group 412 slic babyboard stus 3762 figure 1 connecting the slic babyboard to the sicofi ? testboard the slic babyboard stus 3736 must be inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up as shown in figure 1 , the transfer functions of an analog line card can be measured. the programming bytes which have been calculated with the sicofi coefficients program are sent via the rs232 interface to the sicofi on the testboard.
semiconductor group 413 slic babyboard stus 3762 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 3736 in figure 2 the four functional blocks of the slic babyboard are shown: Cslic C protection circuit Csignaling C ringing 3.1.1 slic the slic requires some external components for output impedance matching, echo cancellation, filter completion, and power supply. some of these functions are already provided by the sicofi and hence it was possible a) to reduce the number of extra components and b) to use one slic hardware for two different country specifications. the slic is described in the application note "calculating slic transfer functions of the ericsson slic pbl 3736 using k-parameters and spice". the slic switches the ring relay and provides a digital parallel interface to control the slic modes. these different modes are power-down (stand-by state: the loop current is reduced to 1.5 times the loop current detector threshold) conversation (normal state: signal transmission is normal) ringing (the ring relay driver is activated).
semiconductor group 414 slic babyboard stus 3762 3.1.2 protection circuit the protection circuit screens the slic against high voltages (secondary protection). this is realized by 4 diodes d2 ... d5 and the fuse resistors rf1 and rf2 for energy dissipation. no primary protection, however, e.g. by surge arrestors, is provided. 3.1.3 signaling the signaling lines connect the sicofi signaling interface to the digital slic interface (pins e 0 , c 1 , c 2 , c 3 , det). via these pins the sicofi switches the slic into one of the three possible modes (power-up, power-down, and ringing). the slic performs two different loop monitoring functions, namely loop current detection and ring/trip status detection. the respective detectors report their status through the slic output pin det (pin 13) and thus provide the corresponding information about the loop current or ring/trip status to the sicofi. the det output is enabled by the "read enable pin" e 0 . a logic high enables the det pin, a logic low disables the det output. if you want to get information about the loop functions of the slic, you have to program the sicofi with the signaling byte so that the e 0 pin is set to a logic high. examples are given in chapters 4.2.1 "mode select for stut 2060" and 4.2.2 "mode select for sipb 5135" respectively. the actual state of operation of the slic determines which monitoring function is provided by the det output, e.g. in the normal state the det pin provides the loop current status. for programming the slic the configuration registers 1 and 2 of the sicofi have to be defined correctly in order to match the controlling pins of the slic to the signaling pins of the sicofi. the pins c 3 , c 2 , c 1 , det, and e 0 of the slic are connected to the sicofi pins so1, so2, sa, si1 and so3. when the sicofi is in the sld mode the signaling byte puts the slic to the desired status; being in the iom mode, the command/indicate byte sets the operating state. 3.1.4 power supply power is supplied to the slic via the slic connector slc. a relay switches the ringing voltage from the slc to the a/b-line.
semiconductor group 415 slic babyboard stus 3762 3.2 connector pin-outs figure 3 slic connector slc note 1: pins not mentioned are not connected note 2: the pin numbering in the list below refers to the numbering on the sicofi testboard pin row signal 12 a gnd 13 a +5v 19 a C48v 21 a so1 22 a so2 24 a si1 25 a +5v 26 a +5v 28 a agnd 29 a vin 31 a vout 32 a agnd 21 c sa function i i i i i o o o i o i i o meaning power supply power supply power supply c3 c2 /det si2 si3 analog ground 4 wire analog output 4 wire analog input analog ground c1 23 a so3 i e0 7 a sclk i clock 30 a agnd i analog ground 14 a 65 v ac 15 a C5v i i ringer power supply 65 v ac power supply 16 a reset i reset
semiconductor group 416 slic babyboard stus 3762 3.3 wiring diagram figure 4 wiring diagram
semiconductor group 417 slic babyboard stus 3762 3.4 list of replaceable parts component type/value ic1 pbl 3736 ic2 hc4040 ic3 hct125 d1 1n4448 d2, d3, d4, d5 bav 19 c d 10 nf c dc 150 nf c hp , c rt 220 nf c ch1 47 nf c ch2 560 pf c t , c r 2.2 nf c bat , c q 330 nf c fil 470 nf c tx 1 m f r 1 , r 2 390 r r 3 , r 4 205 k w r 8 , r 9 , r 11 10 k w r d 51.1 k w r dc1 , r dc2 20 k w r t 560 k w r ix 22 k w r f1 , r f2 20 r r ch 680 r r b1 , r b2 249 k w r rx 300 k w k1 relay 5 v
semiconductor group 418 slic babyboard stus 3762 3.5 floor plan figure 5 floor plan of the stus 3736 babyboard 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of dip switches s1 and s2. possible configurations are: C switch s1 for the hct125 switched to the left side (away from switch s2) the hct 125 puts through the signal from the frequency divider hc4040 to the clock input of the slic. switched to the right side, the driver is switched off. C switch s2 for the hc4040 switched to the left side (towards switch s1) the 512 khz clock frequency coming from the sicofi is divided by two. thus the slic is provided with the nominal frequency of 256 khz. in case the sicofi is in the iom-2 mode and provides a frequency of 4096 khz, the switch has to be in the right position (away from switch s1). the 4096 khz frequency from the sicofi then is divided down to 256 khz.
semiconductor group 419 slic babyboard stus 3762 figure 6 slic babyboard with the switches s1 and s2 sig0 = 20 open-circuit state: the tipx and the ringx power amplifier present a high impedance to the line; loop current detector not active. sig0 = 22 ringing state: ring relay driver activated, ring trip detector is connected to the detector output (/det), tipx and ringx are in the high-impedance state, and signal transmission is inhibited. sig0 = 60 normal state: tipx is the terminal closest to gnd and sources loop current; signal transmission is normal, loop current detector is on. sig0 = 62 stand-by state: the loop current is limited to 1.5 times the loop current detector threshold current, loop current detector is on. sig0 = a0 tipx open-circuit state: the tipx power amplifier presents a high impedance to the line, loop current detector is on. sig0 = e0 polarity reversal state: tipx and ringx polarity is reversed compared to normal state: ringx is closest to gnd and sources current, tipx sinks current, loop current detector is on, signal transmission is normal. sig0 = c2 polarity reversal and stand-by state: see above. following byte sequences apply to the stut 2060 using the peb 2260 for both channels: sig0 = 44 open-circuit state sig0 = cc ringing state sig0 = 66 normal state sig0 = ee stand-by state sig0 = 55 tipx open-circuit state sig0 = 77 polarity reversal state sig0 = ff polarity reversal and stand-by state.
semiconductor group 420 slic babyboard stus 3762 4.2 mode select for sipb 5135 the following byte sequences apply to the sipb 5135 using the peb 2260 for programming channel a. for programming channel b one has to add 80hex to the c/i commands listed below. e.g. for putting the slic to channel b in the normal state, the command would be: c/i = cb (4b h + 80 h ). c/i = 43 open-circuit state c/i = 53 ringing state c/i = 4b normal state c/i = 5b stand-by state c/i = 47 tipx open-circuit state c/i = 4f polarity reversal state c/i = 5f polarity reversal and stand-by state when the sicofi-2 board output c3a is a detection select output, then the loop and ground key information are available from the sicofi-2 board.
semiconductor group 421 slic babyboard stus 3762 5 application and example the babyboard stus 3736 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using the ericsson slic pbl 3736. to demonstrate its functionality, a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in section 4. the pcm4 is connected to the testboard to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "calculating slic transfer functions of the ericsson slic pbl 3736 using k-parameters and spice". the byte file for the sicofi testboard stut 2060 using the peb 2060 is shown below in table 1: table 1 byte file to program the sicofi ? peb 2060 psr = 36 cam00 = 41 cam20 = 40 ciw0 = 26, 04, 80 ciw0 = 13, 30, fa, ba, 52, 14, c2, b1, 2c ciw0 = 23, f0, 19, 87, fb, 19, e5, 0a, b5 ciw0 = 2b, f0, 19, 87, fc, 29, 16, 00, bd ciw0 = 03, 4b, 2b, 23, ab, b6, 19, bb, 23 ciw0 = 0b, 00, 35, c1, 32, 24, 65, 2b, ab ciw0 = 18, 19, 19, 11, 19 ciw0 = 30, 41, b2, 00, 23 ciw0 = 25, 00, 08, 04, 78 sig0 = 60 switch settings before connecting the testboard to the pcm4 measuring set and slic babyboard respectively, make sure that all switches are set correctly. testboard: dil switch 1.1 C 1.4 on dil switch 2.1 C 2.4 on babyboard: s1 in left position (away from switch s2, see figure 6 ) s2 in left position (towards switch s1, see figure 6 )
semiconductor group 422 slic babyboard stus 3762 figure 7 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or equivalent 1 pcm4 (measuring set by wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 423 slic babyboard stus 3762 slic babyboard stus 3762 for ericsson slic pbl 3762/64 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7 3.1.4 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432 4.2 mode select. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433 4.2.1 mode select for stut 2060 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433 4.2.2 mode select for sipb 5135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435
semiconductor group 424 slic babyboard stus 3762 1features l interface to sicofi testboard stut 2060 l interface to sicofi-2 module sipb 5135 l ericsson slic pbl 3762 or pbl 3764 to be used on board l analog telephone directly connectable l ring relay on board l secondary protection circuit on board 2use for one of our slic-applications a ericsson slic babyboard has been designed in order to connect it with the sicofi testboard stut 2060. with both boards it is possible to measure the transfer functions of the ericsson slics pbl 3762 or pbl 3764 together with the sicofi and to check the calculations done with sicofi coefficients program. the signaling pins of sicofi are connected with the control interface of the ericsson slic to control the slic functions. therefore it is possible to select the modes power down power up ringing and to read out the status of hook switch (off or on), ring/tip, and ground-key.
semiconductor group 425 slic babyboard stus 3762 figure 1 connecting the slic babyboard to the sicofi ? testboard for practical use the slic babyboard stus 3762 is inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up like that shown in figure 1 , the transfer functions of an analog line card can be established. for programming, the byte file is used which is to be found in the ericsson slic pbl 3762/64 application note.
semiconductor group 426 slic babyboard stus 3762 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 3762 in figure 2 the five functional blocks of the slic babyboard are shown: Cslic C protection circuit C signaling C ringing
semiconductor group 427 slic babyboard stus 3762 3.1.1 slic the pbl 3762 and pbl 3764 slics are pin and software compatible the only difference being, that the pbl 3762 has resistive feeding and the pbl 3764 has constant current feeding. thus both may be used with the slic babyboard stus 3762. the slic requires some external components for output impedance, echo cancellation, filter capacitors, and power supply. some of these functions are realized by the sicofi and hence it was possible to reduce the number of extra components. the description of the slic is to be found in the pertinent application note. the slic switches the ringer relay and provides a digital parallel interface to control the slic modes. these modes are C power down C conversation (active) C ringing. 3.1.2 protection circuit the protection circuit screens the slic against high voltages (secondary protection). this is realized by 4 diodes d3 ... d6 and the fuse resistors r f1 and r f2 . no primary protection, how- ever, e.g. surge arristors, is provided. 3.1.3 signaling the signaling lines connect the sicofi signaling interface to the digital slic interface. the sicofi switches the slic into one of the three possible modes and the slic provides the corresponding information of the loop status (ground key or on/off-hook) for the sicofi. when the sicofi-2 is used in the iom-2 mode, the slic sends both information (ground-key and loop status) with the detection select output enabled. in this case the sicofi-2 changes the logic level at the output c3a every 250 m sec. depending on the logic level at the c3a output of the sicofi-2, the slic transmits the ground-key or loop status to a sicofi-2 input (i1a). the detector output switches the loop information to the signaling bit i1x, and the ground-key information to bit ci1x of the c/i-channel. 3.1.4 power supply power is supplied to the slic via the slic connector slc. a relay switches the ringing voltage from the slc to the a/b-line.
semiconductor group 428 slic babyboard stus 3762 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected pin row signal 12 a gnd 13 a +5v 14 a 65 v ac 15 a C5v 19 a C48v 21 a so1 22 a so2 23 a so3 24 a si1 26 a dgnd 28 a agnd 29 a vin 21 c sa function i i i i i i i i o i i o o meaning power supply power supply ringer power supply 65 v ac power supply power supply c2 c1 e1 /det digital ground analog ground 4-wire analog output e0 30 a agnd i analog ground 31 a vout i 4-wire analog input 32 a agnd i analog ground
semiconductor group 429 slic babyboard stus 3762 3.3 wiring diagram figure 4 wiring diagram
semiconductor group 430 slic babyboard stus 3762 3.4 list of replaceable parts component type/value ic1 pbl 3762 or pbl 3764 d1, d7 1n4007 d2 1n4148 d3, d4, d5, d6 bay 45 c 1 , c 2 2.2 nf/100 v c 3 330 nf/100 v c kx 1 m f c d 15 nf/100 v c dc 3.3 nf/10 v c hp 33 nf/100 v r 1 5.6 w r 2 1.2 m w r 3 910 k w r 4 200 k w r 5 150 w /2 w r 6 200 k w r 7 0 w r 8 , r 9 4.7 k w r d 39 k w r dc1/1 20 k w r dc2/1 20 k w r dc1/2 41.2 k w r dc2/2 41.2 k w z t 598 k w z r 300 k w r ix 24 k w r sg 20 k w r f1 , r f2 20 w k1 relay 5 v
semiconductor group 431 slic babyboard stus 3762 3.5 floor plan figure 5 floor plan of the stus 3762 babyboard
semiconductor group 432 slic babyboard stus 3762 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of dip switch s1 and setting the jumpers j1 ... j4. possible configurations are: C with or without blocking capacitor in transmit direction C selecting the r dc resistors for pbl 3762 or pbl 3764 the babyboard contains four jumpers j1 ... j4 to select the r dc resistors for the pbl 3762 (20 k w : j1, j2 set) or for the pbl 3764 (41.2 k w : j3, j4 set) respectively. dip switch s1 selects the blocking capacitor in transmit direction at the slic 4-wire side. when switch s1 points towards the slic, then the capacitor is inserted. the capacitor is shunted out, when s1 is at the distant side ( see figure 6 ). figure 6 slic babyboard and switch s1
semiconductor group 433 slic babyboard stus 3762 4.2 mode select the actual modes of the ericsson slics pbl 3762 or pbl 3764 are selected by the digital interface. this interface is connected to the signaling pins of the sicofi. the signaling commands are different for the sicofi testboard stut 2060 and for the sicofi-2 board sipb 5135. 4.2.1 mode select for stut 2060 mode selection differs for the testboard stut 2060 being equipped with the sicofi peb 2060 or with the sicofi-2 peb 2260. following byte sequences apply to the stut 2060 using the peb 2060 : sig0 = e0 stand-by, loop current detector on sig0 = c0 stand-by, ground key detector on sig0 = a0 active, loop current detector on sig0 = 80 active, ground key detector on sig0 = 60 ringing, ring/tip detector on the line status (off-hook/ground-key), which is selected by the above signaling, can be read out via the sicofi sip-line: sig0: 80 on-hook or ground key detection following byte sequences apply to the stut 2060 using the peb 2260 for both channels: sig0 = 77 stand-by, loop current detector on sig0 = 33 stand-by, ground key detector on sig0 = 55 active, loop current detector on sig0 = 11 active, ground key detector on sig0 = 66 ringing, ring/tip detector on the line status (off-hook/ground-key), which is selected in the above signaling, can be read out via the sicofi sip-line. sig0: 11 on-hook or ground-key detection
semiconductor group 434 slic babyboard stus 3762 4.2.2 mode select for sipb 5135 following byte sequences apply to the sipb 5135 using the peb 2260 channel a (channel b = + 80 h ): c/i = 4f stand-by, loop current detector on c/i = 0f stand-by, ground key detector on c/i = 47 active, loop current detector on c/i = 07 active, ground key detector on c/i = 4b ringing, ring/tip detector on when the sicofi-2 board output c3a is a detection select output, then the loop and ground key information are available from the sicofi-2 board: c/i = db loop detection off-hook, ground key is pushed c/i = 93 loop detection on-hook, ground key is pushed c/i = ff loop detection off-hook, ground key not found c/i = b7 loop detection on-hook, ground key not found 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pc personal computer pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc user board (system) sld subscriber line data stus siemens telecom user board slic stut siemens telecom user board testboard
semiconductor group 435 slic babyboard stus 3762 6 application and example the babyboard stus 3762 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using ericsson slics pbl 3762/64. to demonstrate its functionality a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in chapter 4 . the pcm4 is connected to the testboard to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sicofi peb 2060 + ericsson slic pbl 3762". the byte file (pbl3762.byt) is shown in the following table 1 for the sicofi testboard stut 2060 using the peb 2060: table 1 byte file to program the sicofi ? psr = 36 cam00 = 41 cam20 = 40 ciw0 = 06, f4, 80 ciw0 = 13, 30, 22, 2a, 6b, 2b, 22, b3, 22 ciw0 = 23, f0, bc, 37, 72, 49, 36, 0f, a6 ciw0 = 2b, f0, 2b, 97, 74, 2a, 27, 02, ce ciw0 = 30, 61, b1, 00, b4 ciw0 = 03, 35, 12, 52, 91, be, f9, a9, f4 ciw0 = 0b, 00, 33, ab, 23, 32, 73, 39, fa ciw0 = 18, 19, 19, 11, 19 ciw0 = 26, f4, 78 sig0 = a0 switch and jumpers settings before connecting the testboard to the pcm4 and slic babyboard respectively, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1C1.4 on dil switch 2.1C2.4 on babyboard: pbl 3762 being used j1, j2 is closed, j3, j4 is open pbl 3764 being used j1, j2 is open, j3, j4 is closed capacitor c kx is enabled s1 in position right ( figure 6 ) capacitor c kx is shorted s1 in position left ( figure 6 )
semiconductor group 436 slic babyboard stus 3762 figure 7 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set of wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 437 slic babyboard stus 3030 slic babyboard stus 3030 for stm slic l3000/l3030 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 41 3.1.4 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441 3.1.5 4-wire selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446 4.1.1 setting switches s1 and s2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446 4.1.2 solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446 4.1.3 jumpers j1 ... j6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 447 4.2 mode select. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 448 4.2.1 mode select for stut 2060 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 448 4.2.2 mode select for sipb 5135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 449 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450
semiconductor group 438 slic babyboard stus 3030 1features l interface to sicofi testboard stut 2060 l interface to sicofi-2 board sipb 5135 l serial or parallel interface selectable l 4-wire side of the slic selectable for internal or external measurements l analog telephone directly connectable l external battery supply of + 72 v can be connected via banana plugs 2use for one of our slic-applications a sgs-thomson slic babyboard has been designed in order to connect it with the sicofi testboard stut 2060. with both boards it is possible to measure the transfer functions of the sgs-thomson slic l3000/l3030 together with the sicofi and to check the calculations done with sicofi coefficients program. the switches s1 and s2 select the 4-wire side of the slic. the control interface of the l3030 is connected to the sld line via external hardware to control the slic functions (serial interface). therefore it is possible to select the modes power down power up ringing current on the a/b-line and to read out the status of hook switch (off or on), ground-key.
semiconductor group 439 slic babyboard stus 3030 figure 1 connecting the slic babyboard to the sicofi ? testboard for practical use the slic babyboard stus 3030 is inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up like that shown in figure 1 , the transfer functions of an analog line card can be established. for programming, the byte file is used which is to be found in the sgs-thomson l3030 application note.
semiconductor group 440 slic babyboard stus 3030 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 3030 in figure 2 the five functional blocks of the slic babyboard are shown: Cslic C protection circuit Csignaling C external power supply C 4-wire connection 3.1.1 slic the slic is divided into two parts, a low voltage part (l3030) and a high voltage part (l3000). the high voltage part is connected to the line. it realizes the battery feeding and switches the ringing and the speech signals in both directions through the slic. the line current is programmable to 4 threshold values (25 ma, 30 ma, 45 ma, and 70 ma). an internal temperature sensing part shuts the line current off, when the temperature threshold is exceeded. the ringing signal is supplied by the battery on a small ac control-voltage (0.285 vrms). the ringing signal starts and stops when the control signal crosses zero. the maximum time to switch-on the ringing signal is 1 s. the control signal is amplified and fed in balanced mode to the line with a superimposed dc voltage of 22 v.
semiconductor group 441 slic babyboard stus 3030 the low voltage part synthesizes the dc characteristics. echo cancellation is performed by controlling the output impedance. as several of these functions are already realized by the sicofi it was possible to reduce the number of external components. the l3030 contains a digital interface to control the slic modes. these modes are C power down C conversation (active) C ringing. the l3030 contains also a capacitor multiplier. it is selected via a resistor. if used the multiplier simulated a big capacitance from two little ones. these do not require as much space and are less expensive. 3.1.2 protection circuit the protection circuit screens the slic against high voltages (e.g. lightnings). this is realized by 2 protection circuits l3121 from sgs-thomson and several diodes. these circuits apply to the a/b-lines. 3.1.3 signaling being in the serial interface mode the control interface of the slic is connected to the sld- line via external hardware. information from and to the slic are sent in the signaling byte of the sip-line. the external hardware is synchronized by a pbc. working in the parallel interface mode the slic gets signaling from the sicofi signaling pins. 3.1.4 power supply power is supplied to the slic via the slic connector slc. only for battery voltage supply of + 72 v in some special applications an external power source is required. 3.1.5 4-wire selection two switches s1 and s2 select the 4-wire connection for to measure the slic functions exclusively or in combination with the sicofi.
semiconductor group 442 slic babyboard stus 3030 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected pin row signal 12 a gnd 13 a +5v 19 a C48v 21 a so1 22 a so2 24 a si1 25 a si2 28 a agnd 29 a vin 31 a vout 32 a agnd function i i i i i o o i o i i meaning digital ground power supply power supply power down timing ground key /gkd analog ground 4-wire analog output 4-wire analog input analog ground 23 a so3 i ring 15 a C5v i power supply 30 a agnd i analog ground
semiconductor group 443 slic babyboard stus 3030 3.3 wiring diagram figure 4 wiring diagram of the slic babyboard stus 3030
semiconductor group 444 slic babyboard stus 3030 3.4 list of replaceable parts component type/value ic1 74hc 4040 ic2 74hc 00 ic3 74hc 08 ic4 74hc 74 ic5 74hc 32 ic6 l3030 ic7 l3000 ic8, ic9 l3121 ic10 74ls126 ic11 74ls241 d1 ... d6 1n4004 c 1 , c 2 22 nf c 3 , c 4 47 m f c kx 1 m f c ac1 , c ac2 1 m f c comp 22 nf c con 150 nf c rts 330 nf r 1 , r 2 1k w r 3 4.7 k w r ref1 , r b ref2 25.5 k w r ix 10 k w z a 6.2 k w (not installed) z b 10 k w z ac 499 w r r 49.9 k w r pc 100 w r dc 300 w r p1 , r p2 50 w
semiconductor group 445 slic babyboard stus 3030 3.5 floor plan figure 5 floor plan of the stus 3030 babyboard
semiconductor group 446 slic babyboard stus 3030 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of setting switches s1, s2, jumpers j1 ... j6 and connecting the solder bridge for a particular application. possible configurations are: C selecting the 4-wire analog side of the slic C selecting serial or parallel mode at the digital interface C using the balancing networks z a and z b and the voltage divider in receive direction 4.1.1 setting switches s1 and s2 the babyboard contains two switches s1 and s2 to connect the 4-wire side of the slic to particular pins of the slic connector slc or to the tags vin/vout at the board. switch position pin connection s1 int. vin at slc sicofi and slic s1 ext. vin slic to tag vin s2 int. vout at slc sicofi and slic s2 ext. vout slic to tag vout 4.1.2 solder bridges the voltage divider and the capacitor multiplier are selected by establishing peculiar connections at solder bridges 1 ... 3: solder bridge 1 (below r1 C see floor plan ) is to enable the voltage divider: figure 6 solder bridge 1. left: divider is active. right: divider is inactive. solder bridge 2 (close to c ac1 at the soldering side of the board) is to connect c ac1 to pin 7. if bridged, capacitor c ac1 is connected to pin 7.
semiconductor group 447 slic babyboard stus 3030 solder bridge 3 (near solder bridge 2) is to enable the capacitor multiplier. figure 7 solder bridge 3. left: capacitor multiplier is active ( r r connected to pin 7). right: capacitor multiplier is inactive ( r r disconnected, pin 7 connected to pin 14) 4.1.3 jumpers j1 ... j6 the jumpers j1 ... j6 select the digital interface for the slic. jumpers j5 and j6 are to select serial or parallel interface mode. when jumpers j1 or j2 are set, being in the serial interface mode, the slic is connected to external hardware; instead, being in parallel interface mode, it is connected to the sicofi signaling interface via the slc. operating in the serial interface mode, the slic may be clocked externally. together with jumpers j1 and j2 jumpers j3 and j4 select the data clock source. serial interface mode j1 j2 j3 j4 j5 j6 set open set open set set slic-a, clocked internally open set open set set set slic-b, clocked internally open open set open set set slic-a, clocked externally open open open set set set slic-b, clocked externally parallel interface mode ---------- not defined --------- open open
semiconductor group 448 slic babyboard stus 3030 4.2 mode select the actual modes of the sgs-thomson slic hc 3030 are selected by the digital interface. this interface is connected to the sip line of the sicofi via external hardware or to the signaling pins of the sicofi when operating in the serial or parallel interface modes respectively. information is transferred to the slic by the signaling byte of the sip line. the signaling commands are different for the sicofi testboard stut 2060 and for the sicofi-2 board sipb 5135. 4.2.1 mode select for stut 2060 the slic may be operated both in the serial or parallel interface mode. when working in the parallel mode, mode selection differs for the testboard stut 2060 being equipped with the sicofi peb 2060 or with the sicofi-2 peb 2260. when using the testboard stut 2060 in the serial interface mode, the slc2 requires the signaling byte at the sip line 1 with the command sig1 instead of sig0. following byte sequences apply to the stut 2060 using the peb 2060 or peb 2260 in serial interface mode : sig0 = 00 power down sig0 = 80 power up (i = 25 ma) sig0 = 81 power up (i = 30 ma) sig0 = 82 power up (i = 70 ma) sig0 = 83 power up (i = 45 ma) sig0 = c0 active, conversation sig0 = a0 ringing the line status (off-hook/ground-key) can be read via the sicofi sip-line: sig0: 40 on-hook sig0: c0 off-hook, ground-key not found sig0: 80 off-hook, ground-key found the scr register of the pbc has to be programmed to generate a signal at its sigs pin. using this signal the discrete logic creates a chip select signal for the slic. the particular slic is selected by: scr = 90 slic a scr = 50 slic b
semiconductor group 449 slic babyboard stus 3030 following byte sequences apply to use the peb 2060 in parallel interface mode : sig0 = 00 power down sig0 = 80 power up, conversation sig0 = e0 power up, ringing the line status can be read from the sip-line: sig0: 80 on-hook sig0: 00 off-hook, no ground-key found sig0: 40 off-hook, ground-key found following byte sequences apply to using the peb 2260 in parallel interface mode : sig0 = 00 power down sig0 = 11 power up, conversation sig0 = 77 power up, ringing the line status can be read from the sip-line for both slics: sig0: 11 on-hook sig0: 00 off-hook, no ground-key found sig0: 22 off-hook, ground-key found 4.2.2 mode select for sipb 5135 attention: in connection with the sicofi-2 board sipb 5135 the slic babyboard can be operated only in the parallel interface mode (jumpers j5 and j6 open). following byte sequences apply to the sipb 5135 using the peb 2260 channel a (channel b = + 80 h ): c/i = 03 standby c/i = 07 active, conversation c/i = 4f ringing the loop and ground key information is available for both slics: c/i: 27 on-hook c/i: 03 off-hook, no ground-key found c/i: 4b off-hook, ground-key found
semiconductor group 450 slic babyboard stus 3030 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc user board (system) slc slic interface connector sld subscriber line data slic subscriber line interface circuit stus siemens telecom user board slic stut siemens telecom user board testboard 6 application and example the sgs-thomson babyboard stus 3030 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using sgs-thomson slics l3000/l3030. to demonstrate its functionality a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in chapter 4 . the required clocks are generated at the testboard. the pcm4 is connected to the testboard for to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sgs-thomson slic l3000/l3030". the byte file (l3030.byt) is shown in the following table 1 (serial interface mode): table 1 byte file to program the sicofi ? peb 2060 in serial interface mode psr = 36 cam00 = 41 cam20 = 40 scr = 90 ciw0 = 06, f4, 80 ciw0 = 13, b0, ba, a1, 6a, bb, 19, dc, 22 ciw0 = 23, 00, 09, 8d, 5d, ba, 9b, 02, 35 ciw0 = 2b, 60, 1a, 9c, 42, 93, 3a, 14, 12 ciw0 = 30, 21, a2, 10, b3 ciw0 = 03, cc, 23, bb, ab, d6, a9, dc, b1 ciw0 = 0b, 00, fe, 69, b1, dd, f2, c1, de ciw0 = 18, 19, 19, 11, 19 ciw0 = 26, f4, 78 sig0 = a0
semiconductor group 451 slic babyboard stus 3030 table 2 byte file to program the sicofi-2 peb 2260 channel a in serial interface mode psr = 36 cam00 = 41 cam20 = 40 ciw0 = 05, 00, 00 ciw0 = 13, b0, b4, a1, 6a, bb, 19, dc, 22 ciw0 = 23, 00, 09, 8d, 5d, ba, 9b, 02, 35 ciw0 = 2b, 60, 1a, 9c, 42, 93, 3a, 14, 12 ciw0 = 30, 10, b3, 80, 80 ciw0 = 3a, 21, a2 ciw0 = 03, cc, 23, bb, ab, d6, a9, dc, b1 ciw0 = 0b, 00, fe, 69, b1, dd, f2, c1, de ciw0 = 18, 19, 19, 11, 19 ciw0 = 25, 00, 00, fc sig0 = a0 switch and solder bridge settings before connecting the testboard to the pcm4 and slic babyboard respectively, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1 C 1.4 on dil switch 2.1 C 2.4 on babyboard: switch s1 position int. switch s2 position int. solder bridge 1 open solder bridge 2 open solder bridge 3 bridged jumpers j1, j3 set jumpers j2, j4 open jumpers j5, j6 set (serial interface mode)
semiconductor group 452 slic babyboard stus 3030 figure 8 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set of wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 453 slic babyboard stus 3090 slic babyboard stus 3090 for stm slic l3000/l3090 contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457 3.1.3 signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 7 3.1.4 power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457 3.1.5 4 -wire-selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 458 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 459 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462 4.1.1 setting switches s1 and s2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462 4.1.2 solder bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462 4.2 mode select. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464
semiconductor group 454 slic babyboard stus 3090 1features l interface to sicofi testboard stut 2060 l interface to sicofi-2 module sipb 5135 l 4-wire side of the slic for internal or external measurements selectable l analog telephone directly connectable l battery voltage + 72 v can be connected via two banana plugs 2use for one of our slic-applications a sgs-thomson slic babyboard has been designed in or- der to connect it with the sicofi-testboard stut 2060. with both boards it is possible to measure the transfer functions of the sgs-thomson Cslic l3090/l3000 together with the sicofi and to check the calculations done with sicofi coefficients program. the switches s1 and s2 select the 4-wire side of the slic. in this way measurements with or without the sicofi are possible. the signaling pins of sicofi are connected with the control interface of the l3090 to control the slic functions. therefore it is possible to select the modes power down power up ringing and to read out the status of off- or on-hook and ground-key.
semiconductor group 455 slic babyboard stus 3090 figure 1 slic connecting with the sicofi ? testboard using a set-up like that shown in figure 1 , the transfer measurements of an analog line card can be established. for programming, the byte file are used which can be found in the sgs- thomson l3090 application note.
semiconductor group 456 slic babyboard stus 3090 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 3090 in figure 2 the five functional blocks of the slic babyboard are shown: Cslic C protection circuit Csignaling C external power supply C 4-wire connection
semiconductor group 457 slic babyboard stus 3090 3.1.1 slic the slic is divided into two parts, a low voltage part (l3090) and a high voltage part (l3000). the high voltage part is connected with the line. it realizes the battery feeding and switches the ringing signal and the speech signal in both directions through the slic. the line current is programmable with 4 values and an internal temperature detection unit switches the line current off, when the temperature gets too high. the ringing signal is produced by the battery voltage and a slow control ac-voltage. the ringing signal starts and stops when the signal crosses zero. the low voltage and frequency signal is amplified and injected in balancemode into the line with a superimposed dc voltage of 22 v. the low voltage part synthesizes the dc characteristic, the output impedance performs the echo cancellation. some of these functions can be realized by the sicofi and therefore it was possible to reduce the number of external components. the l3090 has a digital parallel interface to control the slic modes. the modes are C power down C standby C conversation C ringing. 3.1.2 protection circuit the protecting circuit protects the slic from high voltages (as lightning). this is realized by two protection circuits l 3121 from sgs-thomson and some diodes. this circuit is designed between the a/b-lines. 3.1.3 signaling the signaling lines connect the sicofi signaling interface with the digital slic interface. the sicofi switches the slic into one of the four possible modes and the slic generates the information of the loop status (ground key and on/off-hook) for the sicofi. 3.1.4 power supply the slic gets the power from the slic connector. only for the battery voltage + 72 v an external power supply has to be connected in some special applications. 3.1.5 4-wire selection two switches s1 and s2 select the 4-wire connection to measure the slic functions alone (ext.) or with sicofi (int.).
semiconductor group 458 slic babyboard stus 3090 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected pin row signal 12 a gnd 13 a +5v 15 a C5v 19 a C48v 21 a so1 22 a so2 23 a so3 24 a si1 25 a si2 26 a dgnd 28 a agnd 29 a vin 21 c sa function i i i i i i i o o i i o o meaning power supply power supply power supply power supply signaling power up/down signaling ringing current limiting hook detection ground key digital ground analog ground 4-wire analog output pull up sicofi input 30 a agnd i analog ground 31 a vout i 4-wire analog input 32 a agnd i analog ground 24 c sd o pull up sicofi input 23 c sc o pull up sicofi input 22 c sb o pull up sicofi input
semiconductor group 459 slic babyboard stus 3090 3.3 wiring diagram figure 4 wiring diagram
semiconductor group 460 slic babyboard stus 3090 3.4 list of replaceable parts component type ic1 l3090 ic2 l3000 ic3, ic4 l3121 d1, d2, d3 1n4007 d4, d5, d6 1n4007 c 1 , c 3 10 m f c 2 , c 4 100 nf c 5 47 m f c 6 , c 7 22 nf c kx 22 m f c ring 1 m f c comp 330 pf c int 47 nf c lac1 , c lac2 47 m f r 1 , r 2 1k w r gin 10 k w r ix 100 k w z iac1 13 k w z iac2 500 w r d 750 w r ref1 62 k w r ref2 24.9 k w r p1 , r p2 30 w r a1 4 4.7 k w
semiconductor group 461 slic babyboard stus 3090 3.5 floor plan figure 5 floor plan
semiconductor group 462 slic babyboard stus 3090 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of switches s1, s2 and connecting the solder bridge for a given application. possible configurations are: C selecting the 4-wire analog side of the slic C operating with z a , z b and the voltage divider in receive direction 4.1.1 setting switches s1 and s2 the babyboard contains two switches s1 and s2 to connect the 4-wire slic side to the pins at the slic connector slc or to the external pins vin/vout. switch position pin connection s1 int. vin at slc sicofi with slic s1 ext. vin slic with external pin vin s2 int. vout at slc sicofi with slic s2 ext. vout slic with external pin vout 4.1.2 solder bridge the solder bridges select the voltage divider and the impedances z a and z b . solder bridge (1) below r 1 open the divider is active shorted the divider is inactive solder bridge (2) close z a open the impedance z b is not connected to z iac1 shorted the impedance z b is connected to z iac1 solder bridge (3) close z b open pin zb from the slic is open shorted pin zb from the slic is shorted to ground
semiconductor group 463 slic babyboard stus 3090 4.2 mode select the mode of the sgs-thomson slic l3090 is selected by the digital interface. this interface is connected with the signaling pins from sicofi. the signaling pins are programmed with the sig command of the sicofi testboard. following bytes sequences are possible: sig0 = a0 conversation, ilim = 42 ma sig0 = 80 conversation, ilim > 42 ma sig0 = 40 power down sig0 = c0 ringing the line status (off-hook/ground-key) can be read out through the sicofi (sip-line). sig0: 00 on-hook sig0: 40 off-hook sig0: 80 ground-key 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pc personal computer pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc userboard (system) sld subscriber line data stus siemens telecom userboard slic stut siemens telecom userboard testboard
semiconductor group 464 slic babyboard stus 3090 6 application and example the sgs-thomson l3090 babyboard is used in applications with sicofi testboard stut 2060 in which an analog line card application is tested using this slic. to demonstrate its functionality a set-up is given. the clocks are generated on the testboard and the pcm4 can measure the transfer functions. the babyboard is connected with the testboard via the slic connector slc and configured as described in chapter 4 . the connection and programming of the pcm4 are shown in the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sgs-thomson slic l3090/l3000". the byte file (l3090.byt) is shown in the following table 1 : table 1 byte file to program the sicofi ? psr = 36 cam00 = 41 cam20 = 40 ciw0 = 06, f4, 80 ciw0 = 13, 30, d5, 1a, 5d, cb, b1, 25, 33 ciw0 = 23, 50, d8, 8c, 3c, a8, bc, 0a, a4 ciw0 = 2b, 40, c8, ad, 41, a4, 3a, 13, 12 ciw0 = 30, a0, c1, 10, 22 ciw0 = 03, 4b, 13, 14, 20, 14, b1, 42, ba ciw0 = 0b, 00, 26, dd, 4d, 25, 72, 2b, 46 ciw0 = 18, 19, 19, 11, 19 ciw0 = 26, f4, 78 sig0 = a0 switch and solder bridge setting before connecting the testboard with the pcm4 and slic babyboard, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1 C 1.4 on dil switch 2.1 C 2.4 on babyboard: switch 1 in position int. switch 2 in position int. solder bridge 1 open solder bridge 2 open solder bridge 3 shorted
semiconductor group 465 slic babyboard stus 3090 figure 7 sicofi ? measurement tool required hardware for a measurement system: 1 pc ibm at or compatible 1 pcm4 (measurement set from wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 466 slic babyboard stus 1001 slic babyboard stus 1001 for transformer slic contents page 1features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467 2use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467 3 circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469 3.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469 3.1.1 slic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469 3.1.2 protection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469 3.2 connector pin-outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 3.3 wiring diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471 3.4 list of replaceable parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471 3.5 floor plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472 4 operational information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472 4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472 5 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472 6 application and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
semiconductor group 467 slic babyboard stus 1001 1features l interface to sicofi testboard stut 2060 l interface to sicofi-2 board sipb 5135 l transformer slic to be used on board l only transverse feeding possible 2use for one of our slic-applications a transformer slic babyboard has been designed in order to connect it with the sicofi testboard stut 2060. with both boards it is possible to measure the transfer functions of the transformer slic together with the sicofi and to check the calculations done with sicofi coefficients program.
semiconductor group 468 slic babyboard stus 1001 figure 1 connecting the slic babyboard to the sicofi ? testboard for practical use the slic babyboard stus 1001 is inserted into one of the slic connectors slc of the sicofi testboard stut 2060. using a set-up like that shown in figure 1 , the transfer functions of an analog line card can be established. for programming, the byte file is used which is to be found in the transformer slic application note.
semiconductor group 469 slic babyboard stus 1001 3 circuitry 3.1 block diagram figure 2 block diagram of the slic babyboard stus 1001 in figure 2 the three functional blocks of the slic babyboard are shown: Cslic C protection circuit C feeding circuit 3.1.1 slic the slic contains two transformers. one of them (tr1) transforms the analog signal to the a/ b lines. the other one (zsp) may be used for line feed. in a trunk application the slic may be fed externally. this transformer slic can be used only in transverse (parallel) feeding configurations. 3.1.2 protection circuit the protection circuit screens the slic against high voltages (secondary protection). this is realized by 2 diodes d1, d2 at the sicofi input.
semiconductor group 470 slic babyboard stus 1001 3.2 connector pin-outs figure 3 slic connector slc note: pins not mentioned are not connected pin row signal 12 a gnd 28 a agnd 29 a vin 31 a vout 32 a agnd function i i o i i meaning power supply analog ground 4-wire analog output 4-wire analog input analog ground 30 a agnd i analog ground
semiconductor group 471 slic babyboard stus 1001 3.3 wiring diagram figure 4 wiring diagram of the slic babyboard stus 1001 3.4 list of replaceable parts component type/value d1, d2 c2v7 c sp 1f c v 2nf z oca2 100 nf r v 792 w z 0ra1 700 w r ax 4 4.7 k w zsp v33101-g2039-b174 tr1 u transformer
semiconductor group 472 slic babyboard stus 1001 3.5 floor plan figure 5 floor plan of the stus 1001 babyboard 4 operational information 4.1 configuration before power is applied, the slic babyboard has to be configured by means of setting the solder bridge. possible configurations are: C with or without blocking capacitor in the a-line. the solder bridge is at the soldering side underneath the capacitor c sp . bridging the solder bridge shorts the capacitor c sp . in this case a dc current may flow through the transformer. 5 glossary dir direction signal (same as fsc) fsc frame synchronization clock pc personal computer pcm pulse code modulation sicofi signal processing codec filter sig signaling byte at the sip-line sip serial interface port sipb siemens isdn pc user board (system) slc slic interface connector sld subscriber line data slic subscriber line interface circuit stus siemens telecom user board slic stut siemens telecom user board testboard
semiconductor group 473 slic babyboard stus 1001 6 application and example the babyboard stus 1001 is used in connection with the sicofi testboard stut 2060 when an analog line card application is tested using the transformer slic. to demonstrate its functionality a set-up is given below: the babyboard is connected to the testboard via the slic connector slc and configured as described in chapter 4 . the pcm4 is connected to the testboard for to measure the transfer functions of the sicofi and the slic. for the connection and programming procedures of the pcm4 refer to the sicofi testboard description. the programming of sicofi is listed in the sicofi application note "sicofi peb 2060 + transformer slic with transverse feeding". the byte file is shown in the following table 1 for the sicofi testboard stut 2060 using the peb 2060: table 1 byte file to program the sicofi ? psr = 36 cam00 = 41 cam20 = 40 ciw0 = 06, f4, 80 ciw0 = 13, 20, ba, 2a, 7b, 1b, 32, b2, 5b ciw0 = 23, 70, e2, 97, 73, c1, d6, 03, 36 ciw0 = 2b, 70, 23, 8f, ec, 3c, ac, 0b, 50 ciw0 = 30, 41, c3, 00, c3 ciw0 = 03, bb, c1, db, 2b, 46, 22, 21, 2b ciw0 = 0b, 00, 2c, 31, c1, aa, 6f, 33, 23 ciw0 = 18, 19, 19, 11, 19 ciw0 = 26, f4, 78 before connecting the testboard to the pcm4 and slic babyboard respectively, make sure that all jumpers and switches are set correctly. testboard: dil switch 1.1 - 1.4 on dil switch 2.1 - 2.4 on babyboard: solder bridge is open
semiconductor group 474 slic babyboard stus 1001 figure 7 sicofi ? measurement set-up required hardware for a measurement set-up: 1 pc ibm at or compatible 1 pcm4 (measuring set by wandel & goltermann) 1 sicofi testboard stut 2060 1 slic babyboard
semiconductor group 475 application note i sicofi ? application together with harris-slic hc 5502 contents page 1introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476 2 hardware sicofi ? and harris-slic hc 5502 . . . . . . . . . . . . . . . . . . . . . . . . . 477 2.1 harris-slic hc 5502 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 2.2 programming sicofi ? and slic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 478 2.3 model of the harris-slic hc 5502 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479 3 software of harris-slic hc 5502 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 480 3.1 general slic parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 480 3.2 harris-slic parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481 3.3 calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 2 4 comparison between calculation and measurement . . . . . . . . . . . . . . . . . . . 482 5 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 482
semiconductor group 476 application note i 1 introduction this application note describes the combination of a codec filter device (sicofi) with an electronic slic (harris hc 5502a) as it can be used on a line card for the connection of analog subscribers. this note consists of: C a general description of the harris-slic hc 5502a C a proposal for the interconnection of sicofi and slic C a description of the model for the slic's function C a listing of fortran program to calculate slic transfer function C result of calculation and measurements generated for the requirements of the 'deutsche bundespost'.
semiconductor group 477 application note i 2 hardware sicofi ? and harris-slic hc 5502 2.1 harris-slic hc 5502 the harris-slic hc 5502 combines many of the borsht-functions on a single chip. the functions are: Cbattery C overvoltage C ringing Csignaling C hybrid the slic needs a positive (+ 12 v) and a negative (C 48 v) supply voltage. the loop resistance can take on values between 200 w and 1200 w . the current through the loop is then between 21 ma and 30 ma typically. the slic in conjunction with an external protection bridge will with-stand high voltage lightning surges and power line crosses, for a short time (10 m s). the hc 5502 has two logical input pins (rc, pd) and two logical output pins (shd, gkd) and a ring synchronisation input rs. C rc ring command C pd power denial C shd switch hook detection C gkd ground key detection with the two input pins you can switch the slic into the three modes: C power down C power up C ringing if the slic is switched into the ringing mode and the rs input has a positive voltage and the ring source then goes to zero, the ring relay driver output will go to low. it goes low only on the next rising edge of the ring synchronisation input, as long as the slic is not in the power denial state or the subscriber is not already in off-hook stage. the maximum voltage of the ring relay is 15 v. the slic sends a too high dc voltage at the four wire side, therefore the voltage has to be blocked with one capacitor per wire (> 470 nf). the digital interface is connected via 4 wires with the sicofi. the two input pins of the slic are connected with two output pins of the sicofi. the two output pins of the harris slic are connected with the three input pins of the sicofi. that we get no instability, we connect two input pins of the sicofi with one output pin of the harris slic.
semiconductor group 478 application note i figure 1 harris slic hc 5502 a note: this voltage divider is used only for application that need high attenuation in receive direction ( r 3 300 w ). the two resistors are not required by using the sicofi peb 2060 version. 4.x or the sicofi-2 peb 2260 (set attenuation agr = 6 db). 2.2 programming the sicofi ? and slic the signaling byte is used to program the slic via the sicofi: C power down: sig0 = 00 C power up: sig0 = c0 C ringing: sig0 = 40 the slic sends ground key and on-/off-hook detection to the sicofi: C sig0: = 1e ground key C sig0: = 7e off-hook C sig0: = fe on-hook
semiconductor group 479 application note i 2.3 model of the harris-slic hc 5502 figure 2 note: r f1 = r b1 + r b3 r r2 = r b2 + r b4 the specification of 'deutsche bundespost' allows an attenuation of 7 db in receive direction. due to this we have more than 12 db attenuation at the sicofi and this is too much for the sicofi. in this case either a voltage divider in receive direction is necessary or you can make an analog 6 db attenuation by programming the agr of the sicofi peb 2060 version 4.x or the sicofi-2 peb 2260.
semiconductor group 480 application note i 3 software for harris-slic hc 5502 3.1 general slic-parameters to calculate the coefficients we need the mixed matrix parameters: objectives: C calculation of the mixed matrix parameters using a simplified three port model. method: C a slic is a circuit with a number of elements accessible through three ports: figure 3 i 1 , i 2 and i 3 are port currents v 1 , v 2 and v 3 are port voltages i 1 = m11 v 1 + m12 v 3 + m13 i 2 (1) v 2 = m21 v 1 + m22 v 3 + m23 i 2 (2) i 3 = m31 v 1 + m32 v 3 + m33 i 2 (3) note: description of a port: simplification of the three port model when the slic is connected to the sicofi, we can assume that: C i 2 = 0 because the input impedance of sicofi can be included in the three port model C i 3 is not relevant in the following calculations because the equation (3) is not used in the si- cofi program. i 1 = m11 v 1 + m12 v 3 (4) v 2 = m21 v 1 + m22 v 3 (5)
semiconductor group 481 application note i the parameters m11, m12, m21 and m22 are determined as follows: figure 4 3.2 harris-slic parameter the mixed matrix parameters are: m11 = 1 / (2 r f ) m12 = C ar / r f m21 = ax m22 = C 2 ar ax m11 = v 1 i 1 for v 3 = 0 (6) m12 = v 3 i 1 for v 1 = 0 (7) m21 = v 1 v 2 for v 3 = 0 (8) m22 = v 3 v 2 for v 1 = 0 (9)
semiconductor group 482 application note i 3.3 calculation the slic has a 0 db gain in receive direction and therefore the sicofi must attenuate the incoming signal in order to match the german specs (gr = C 7 db). because of the attenuation being too high (> 12 db absolute) for the sicofi, either a voltage divider in receive direction is needed or the agr of the sicofi has to be programmed to 6 db analog attenuation. the slic-program is written in fortran and the user may modify this for his own slic. the program needs an inputfile with the values of the external circuit, and then it calculates the mixed matrix parameters and writes them into a slic-file. together with the sicofi-program you are able to calculate the sicofi coefficients. if you set both resistors of the voltage divider equal, then you do not have a v or = 0.5, because the input impedance of the slic in receive direction is only 90 k w . if you need the exact v or you must calculate it or use a different circuit. in this case you can use the internal op of the harris-slic. now you do not note the input impedance in receive direction, but you have shifted the signal. in this case you have to write v or = C 0.5 into the input file. 4 comparison between calculation and measurement the values of the measurement are confirmed by the calculation. the difference between both are small (see results of calculation and measurement in the appendix). only the high attenu- ation of calculated echo return loss (> 35 db) cannot be reached by measurement. 5 appendix on the next pages you will find the following details: C harris-slic hc 5502 fortran program listing C calculated sicofi-harris slic transfer functions for the harris-slic model. the val- ues of the external harris-slic components are listed on bottom at page... note: r = 300 w input impedance of slic = 90000 w . in this case: v or = 0.5 C measured sicofi-harris-slic transfer functions.
semiconductor group 483 application note i c******************************** top ****************************** c################################################################### c program harris c 6.04.88 udo stueting / klaus kliese c################################################################### implicit logical (a-k, m-z), character (l) * integer in, out, i character*14 buf1, buf2*7, buf3*7, buf4*7, buf5*7 character*7 buf6, buf7*7, buf8*7, buf9*7, buff2*12, buff3*12 character buff1*12, fileout*12, answ*1, infile*12 real*8 ha(2), hb(2), hc(2), hd(2), freq, r0, ar(2), ax(2) real*8 vor,rir,ckr,vox,rix,ckx,pi2,zsli * common /arc/ rir,ckr,vor common /axc/ rix,ckx,vox common /pi2c/ pi2 c c******************************************************************* c initialisation part c******************************************************************* c
semiconductor group 484 application note i data buf1/* harris slic / data buf2/* vor =/,buf3/ rir =/,buf4/ ckr =/ data buf5/* vox =/,buf6/ rix =/,buf7/ ckx =/ data buf8/* r0 =/,buf9/ zsli =/ * out = 6 in =5 pi2 = 4.*dasin(1.d0) fileout = write(out,(a)) & enter input file name(xxxxxxxx.inp): 10 read (in,(a)) infile if (index(infile, ).eq.1 & .or.(index(infile..inp).eq.0 & .and.index(infile,.inp).eq.0 )) then write (out,(a)) enter correct input file name: infile= goto 10 endif write (out,(a)) enter output file name (xxxxxxxx.sli): 20 read (in,(a)) fileout if (index(fileout, ).eq.1) then write (out,(a)) & enter correct output file name (with extention .sli): fileout= goto 20 endif
semiconductor group 485 application note i open (30, file=fileout, err=1000, status= unknown) open (10, file=infile, err=1100, status= old) read(10,(a)) write(6,*) reading input file read(10,*) vor read(10,(a)) read(10,*) rir read(10,(a)) read(10,*) ckr read(10,(a)) read(10,*) vox read(10,(a)) read(10,*) rix read(10,(a)) read(10,*) ckx read(10,(a)) read(10,*) r0 read(10,(a)) read(10,*) zsli close (10) c c ****************************************************************** c documentation part c ****************************************************************** c write (30,(a)) buf1 write (buff1,(g12.5)) vor write (buff2,(g12.5)) rir write (buff3,(g12.5)) ckr write (30,(a)) buf2//buff1//buf3//buff2//buf4//buff3 write (buff1,(g12.5)) vox write (buff2,(g12.5)) rix write (buff3,(g12.5)) ckx write (30,(a)) buf5//buff1//buf6//buff2//buf7//buff3 write (buff1,(g12.5)) r0 write (30,(a)) buf8//buff1 write (30,(a)) zsli write (30,(g12.5)) zsli
semiconductor group 486 application note i c******************************************************************* c calculation parta c******************************************************************* c c m11 = 1. / r0 c write (out,*) running m11 calcuation... write (30,(a)) m11-table d0 100 i=1,399 freq = dble(i*10) ha(1)=1.d0/r0 ha(2)= 0. write (30,*) freq,ha(1),ha(2) 100 continue c c m12 = C2.*ar / r0 c write (out,*) running m12 calcuation... write (30,(a)) m12-table d0 110 i=1,399 freq = dble(i*10) call arw(freq,ar) hb(1) = -ar(1)*2.d0/r0 hb(2) = -ar(2)*2.d0/r0 write (30,*) freq,hb(1),hb(2) 110 continue c c m21 = ax c write (out,*) running m21 calcuation... write (30,(a)) m21-table d0 120 i=1,399 freq = dble(i*10) call axw(freq,ax) hc(1)= 1.*ax(1) hc(2)= 1.*ax(2) write (30,*) freq,hc(1),hc(2) 120 continue
semiconductor group 487 application note i c m22 = -2.*ax*ar c write (out,*) running m22 calcuation... write (30,(a)) m22-table d0 130 i=1,399 freq = dble(i*10) call axw(freq,ax) call arw(freq,ar) call cmul(ar,ax,hd) hd(1)= -2.*hd(1) hd(2)= -2.*hd(2) write (30,*) freq,hd(1),hc(2) 130 continue write(30,(a1)) ; close (30) write(out,(a)) data written in file: //fileout stop 1000 write(out,(a)) open error at output-file: //fileout stop 1 1100 write(out,(a)) open error at input-file: //infile stop 2 end c c################################################################### c subroutine arw(freq,ar) c c################################################################### c c name of subroutine: arw c c formal parameter list: freq,ar c c input parameters: c freq (double) c c output parameters: c arw (double) array 2 c c task of this routine: calculation of transfer function in c receive path for rc highpass and c voltage devider vor c c ar = vor*jwrir*ckr/(1.+jwrir*ckr) c with w = 2.*pi*freq c c###################################################################
semiconductor group 488 application note i implicit logical (a-k,m-z), character (l) * integer luout logical ltest real*8 ar(2),freq,rir,ckr,vor,omp,pi2,v1(2),v2(2) * common /arc/ rir,ckr,vor common /pi2c/ pi2 * omp = pi2*freq*rir*ckr v1(1) = 0 v1(2) = omp v2(1) = 1.d0 v2(2) = omp call cdiv(v1,v2,ar) ar(1) = ar(1)*vor ar(2) = ar(2)*vor return end c################################################################### c subroutine axw(freq,ax) c c################################################################### c c name of subroutine: axw c c formal parameter list: freq,ax c c input parameters: c freq (double) c c output parameters: c ax (double) array 2 c c task of this routine: calculation of transfer function in c transmit path for rc highpass c c ax = vox*jwrix*ckx/(1.+jwrix*ckx) c with w = 2.*pi*freq c c################################################################### c
semiconductor group 489 application note i implicit logical (a-k,m-z), character (l) * integer luout logical ltest real*8 ax(2),freq,rix,ckx,vox,omp,pi2,v1(2),v2(2) * common /axc/ rix,ckx,vox common /pi2c/ pi2 * ax(1) = vox ax(2) = 0. omp = pi2*freq*rix*ckx v1(1) = 0 v1(2) = omp v2(1) = 1.d0 v2(2) = omp call cdiv(v1,v2,ax) ax(1) = ax(1)*vox ax(2) = ax(2)*vox return end c################################################################### c subroutine cmul(c,d,e) c c################################################################### c c name of subroutine: cmul c c formal parameter list: c,d,p c c input parameters: c c (double) array [2] c d (double) array [2] c c output parameters: c e (double) array [2] c c task of this routine: c subroutine complex multiplication c routine called in the following subroutines or functions: c c################################################################### c
semiconductor group 490 application note i implicit logical (a-k,m-z),character (l) * real*8 c(2),d(2),p(2),e(2) * p(1)=c(1)*d(1)-c(2)*d(2) p(2)=c(2)*d(1)-c(1)*d(2) e(1)=p(1) e(2)=p(2) return end c################################################################### c subroutine cdiv(c,d,e) c c################################################################### c c name of subroutine: cdiv c c formal parameter list: c,d,p c c input parameters: c c (double) array [2] c d (double) array [2] c c output parameters: c e (double) array [2] c c task of this routine: c subroutine complex division c c routine called in the following subroutines or functions: c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 c(2),d(2),p(3),e(2) * p(2)=d(1)*d(1)-d(2)*d(2) p(1)=c(1)*d(1)-c(2)*d(2) p(3)=c(2)*d(1)-c(1)*d(2) * e(1)=p(1)/p(2) e(2)=p(3)/p(2) return end c c******************************bottom*******************************
semiconductor group 491 application note i input_file_name: harris.ctl date: 18.04.88 10:32 spec = harris.spe slic = harris.sli byte = ref.byt chnr = 0,a plq = n on = all rel = y short = n opt = z+x+r+b zxrb = nnnn fz = 300.00 3400.0 zlim = 2.00 zrep =y zsign = 1 fr = 300.00 3400.0 rfil = y rrefq = n rref = 0.12220 fx = 300.00 3400.0 xfil = y xrefq = n xref = -5.9995 fb = 300.00 3400.0 blim = 2.00 tbm = 1 brep = y bsign = 1 apof = 0.00e+00 dpof = 0.00e+00 apre = 0.00e+00 dpre = 0.00e+00 xzq = -0.55664062500000000e-01 0.54687500000000000e+00 0.28906250000000000e+00 -0.24597167968750000e+00 0.19531250000000000e+00 xrq = 0.9531250000 0.0468750000 -0.0449218750 0.0039062500 -0.0019531250 xxq = 1.5000000000 0.6328125000 0.0771484375 0.0283203125 0.0019531250 xbq = -0.97656250000000000e-01 -0.42187500000000000e+00 0.15649414062500000e+00 0.16406250000000000e+00 -0.85937500000000000e-01 -0.54199218750000000e-01 0.77148437500000000e-01 -0.30334472656250000e-01 -0.48828125000000000e-03 0.40283203125000000e-02 xgq = 0.5625000000 1.2812500000 ; bytes for z-filter (13): 20,ba,ea,25,23,41,c1,bb bytes for r-filter (2b): d0,c8,84,dc,b1,93,02,1d bytes for x-filter (23): 50,c8,b5,4a,c2,21,04,90 bytes for gain-factors (30): a0,11,20,92 2nd part of bytes b-filter (0b): 00,97,fd,c8,dd,4c,c2,bc 1st part of bytes b-filter (03): c4,12,23,32,72,b9,b2,ba bytes for b-filter delay (18): 19,19,11,19 * harris slic_ * vor = 0.50000 rir = 90000. ckr = 0.10000e-05 * vox = 1.0000 rix = 0.10000e+06 ckx = 0.10000e-05 * r0 = 600.00
semiconductor group 492 application note i run # 1 z-filter calculation results generator impedance zi at a,b line! calculated and quantized coefficients: xz = -0.05549 0.54647 0.29193 -0.24595 0.19619 xzq = -0.05566 0.54687 0.28906 -0.24597 0.19531 bytes for z-filter (13): 20,ba,ea,25,23,41,c1,bb return loss freq loss freq loss (hz) (db) (hz) (db) 100. 36.621 1800. 23.691 200. 34.580 1900. 24.104 300. 32.126 2000. 24.653 400. 30.127 2100. 25.360 500. 28.533 2200. 26.258 600. 27.251 2300. 27.391 700. 26.214 2400. 28.815 800. 25.373 2500. 30.567 900. 24.695 2600. 32.512 1000. 24.157 2700. 33.815 1100. 23.740 2800. 33.009 1200. 23.435 2900. 30.551 1300. 23.232 3000. 27.877 1400. 23.128 3100. 25.483 1500. 23.119 3200. 23.405 1600. 23.207 3300. 21.590 1700. 23.395 3400. 19.985 min. z-loop reserve: 3.290 db at frequency: 500.0 hz min. z-loop mirror signal reserve: 8.343 db at frequency: 7500.0 hz warning! sicofi specs(noise,gain tracking...) not guaranteed increase slic gain in transmit path at least by 0.17db run # 2 x-filter calculation results calculated and quantized coefficients: xx = 1.49519 0.63652 0.07668 0.02832 0.00308 xxq = 1.50000 0.63281 0.07715 0.02832 0.00195 bytes for x-filter (23): 50,c8,b5,4a,c2,21,04,90
semiconductor group 493 application note i x-filter attenuation function (in db),(always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. -6.912 0.048 1900. -4.040 0.009 400. -6.839 0.046 2000. -3.794 0.006 500. -6.747 0.045 2100. -3.545 0.004 600. -6.636 0.043 2200. -3.292 0.001 700. -6.507 0.041 2300. -3.036 -0.001 800. -6.361 0.039 2400. -2.776 -0.004 900. -6.200 0.037 2500. -2.512 -0.007 1000. -6.025 0.034 2600. -2.243 -0.010 1100. -5.837 0.031 2700. -1.970 -0.014 1200. -5.638 0.028 2800. -1.694 -0.018 1300. -5.429 0.025 2900. -1.415 -0.023 1400. -5.211 0.023 3000. -1.135 -0.028 1500. -4.987 0.020 3100. -0.856 -0.033 1600. -4.757 0.017 3200. -0.583 -0.039 1700. -4.522 0.014 3300. -0.320 -0.045 1800. -4.283 0.011 3400. -0.071 -0.052 1900. -4.040 0.009 3500. 0.048 0.000 2000. -3.794 0.006 3600. 0.046 1.008 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z vref/vsicofi xref gx 0.00 - 3.75 - 4.42 - -6.00 = -2.17 ideal 0.02 = 3.75 + 4.42 + -6.00 + -2.15 quant second byte for gain: ,20,92 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz generator impedance zi at a,b line!
semiconductor group 494 application note i tgref ca = 0.259 ms tgref cb = 0.273 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 13.827 2.523 2000. 0.017 0.010 200. 0.339 1.786 2100. 0.011 0.015 300. 0.006 0.589 2200. 0.004 0.021 400. 0.028 0.287 2300. -0.003 0.027 500. 0.025 0.166 2400. -0.009 0.035 600. 0.016 0.103 2500. -0.014 0.044 700. 0.007 0.067 2600. -0.015 0.054 800. 0.001 0.044 2700. -0.013 0.079 900. -0.002 0.028 2800. -0.006 0.079 1000. -0.002 0.018 2900. 0.006 0.095 1100. 0.000 0.011 3000. 0.025 0.115 1200. 0.004 0.006 3100. 0.051 0.139 1300. 0.009 0.003 3200. 0.087 0.169 1400. 0.014 0.001 3300. 0.137 0.208 1500. 0.019 0.000 3400. 0.212 0.262 1600. 0.022 0.000 3500. 0.335 0.339 1700. 0.024 0.001 3600. 0.565 0.456 1800. 0.024 0.003 3700. 1.071 0.649 1900. 0.022 0.006 3800. 2.402 0.984
semiconductor group 495 application note i run # 2 r-filter calculation results calculated and quantized coefficients: xr = 0.95239 0.04758 -0.04485 0.00311 -0.00350 xrq = 0.95312 0.04687 -0.04492 0.00391 -0.00195 bytes for r-filter (2b): d0,c8,84,dc,b1,93,02,1d r-filter attenuation function (in db),(always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. 0.350 -0.004 1900. 0.008 0.010 400. 0.326 -0.003 2000. 0.026 0.010 500. 0.298 -0.002 2100. 0.051 0.010 600. 0.266 -0.001 2200. 0.085 0.010 700. 0.232 0.001 2300. 0.127 0.010 800. 0.197 0.002 2400. 0.177 0.009 900. 0.161 0.003 2500. 0.236 0.008 1000. 0.127 0.004 2600. 0.303 0.007 1100. 0.095 0.005 2700. 0.379 0.005 1200. 0.066 0.006 2800. 0.462 0.004 1300. 0.041 0.007 2900. 0.552 0.002 1400. 0.021 0.008 3000. 0.647 -0.001 1500. 0.006 0.009 3100. 0.746 -0.004 1600. -0.003 0.009 3200. 0.846 -0.006 1700. -0.006 0.010 3300. 0.945 -0.009 1800. -0.002 0.010 3400. 1.039 -0.012 1900. 0.008 0.010 3500. -0.004 0.000 2000. 0.026 0.010 3600. -0.003 0.887 gx results: all attenuation values (in db) refer to fref= 1014. hz -rlr slic+z vsicofi/vref rref gr 7.00 - 6.29 - -4.42 - 0.12 = 5.01 ideal 6.99 = 6.29 + -4.42 + 0.12 + 5.00 quant first byte for gain (30): a0,11 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz terminating impedance zi at a,b line! tgref ca = 0.236 ms tgref cb = 0.219 ms
semiconductor group 496 application note i freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. -0.001 0.013 2000. -0.010 0.041 200. -0.001 0.002 2100. -0.015 0.047 300. -0.002 0.000 2200. -0.021 0.054 400. -0.002 0.000 2300. -0.026 0.062 500. -0.003 0.000 2400. -0.029 0.071 600. -0.003 0.001 2500. -0.032 0.081 700. -0.004 0.002 2600. -0.031 0.093 800. -0.004 0.004 2700. -0.028 0.106 900. -0.003 0.005 2800. -0.020 0.121 1000. -0.002 0.007 2900. -0.007 0.139 1100. 0.000 0.009 3000. 0.012 0.160 1200. 0.001 0.011 3100. 0.039 0.186 1300. 0.003 0.013 3200. 0.078 0.219 1400. 0.004 0.016 3300. 0.136 0.261 1500. 0.004 0.019 3400. 0.225 0.317 1600. 0.003 0.022 3500. 0.373 0.397 1700. 0.001 0.026 3600. 0.642 0.516 1800. -0.001 0.030 3700. 1.203 0.712 1900. -0.005 0.035 3800. 2.612 1.049 run # 2 b-filter calculation results terminating impedance zl at a,b line! calculated and quantized coefficients: xb = -0.09979 -0.41835 0.15620 0.16296 -0.08400 -0.05427 0.07695 -0.03033 -0.00038 0.00406 xbq = -0.09766 -0.42187 0.15649 0.16406 -0.08594 -0.05420 0.07715 -0.03033 -0.00049 0.00403 2nd part of bytes b-filter (0b): 00,97,fd,c8,dd,4c,c2,bc 1st part of bytes b-filter (03): c4,12,23,32,72,b9,b2,ba
semiconductor group 497 application note i trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 52.656 1800. 54.439 200. 45.934 1900. 54.867 300. 49.743 2000. 54.697 400. 51.739 2100. 54.142 500. 51.819 2200. 53.518 600. 51.108 2300. 53.043 700. 50.330 2400. 52.826 800. 49.712 2500. 52.922 900. 49.300 2600. 53.364 1000. 49.100 2700. 54.195 1100. 49.113 2800. 55.481 1200. 49.340 2900. 57.354 1300. 49.788 3000. 60.071 1400. 50.461 3100. 63.930 1500. 51.350 3200. 65.910 1600. 52.410 3300. 61.158 1700. 53.520 3400. 56.393 additional b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 498 application note i figure 5 equivalent circuit diagram 1 the configurations 1b) and 1c) can be derived from the equivalent circuit diagram 1a) by ze- roing the elements that are not used. figure 6 equivalent circuit diagram 2 with r par = 0 the entry of a series impedance 2b) becomes possible with equivalent circuit di- agram 2a). figure 7 equivalent circuit diagram 3
semiconductor group 499 application note i figure 8 figure 9
semiconductor group 500 application note i figure 10 figure 11
semiconductor group 501 application note i figure 12 figure 13
semiconductor group 502 application notes ii sicofi ? application together with ericsson slic pbl 3762 contents page 1introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 503 1.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 03 1.2 overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 4 1.3 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 04 2 basic setup sicofi ? -pbl 3762 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505 2.1 circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505 2.2 application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 506 3 mathematical model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 509 3.1 circuit model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 509 3.2 preliminary data and symbols meaning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510 3.3 input circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 12 3.4 calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513 3.4.1 k-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513 3.4.2 starting equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515 3.4.3 calculation of k11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515 3.4.4 calculation of k12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516 3.4.5 calculation of k21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 517 3.4.6 calculation of k22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 517 3.5 summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518 4software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520 4.1 input file 'pbl 3762.inp' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520 4.2 test mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521 4.3 model for impedances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521 4.4 other input parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522 4.5 fortran source file 'pbl 3762.for' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523 5 coefficient calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524 5.1 input file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524 5.2 specification file. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534 6 measurement results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 536 7 correlation: other examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545
semiconductor group 503 application notes ii 1 introduction 1.1 general the introduction of digital switching systems has led to a significant reduction of the central part of the hardware constituent. in order to achieve further integration at the periphery, i.e. at the interface to the analog subscriber, the state of the art is to split up the analog subscriber circuit into a line driver and sensor chip (solid state slic: subscriber line interface circuit) on the one hand and a signal processor (in our case sicofi) on the other; an even more cost effective possibility is to use a dual channel sicofi (sicofi-2) and two slic's for a group of two analog subscribers. in this note, we will call slic the combination of the solid state slic and the other discrete components which are not integrated and have an influence on the transmission characteristics. we will call subscriber line module the combination slic + sicofi. the aim of this paper is to describe an example of design of such a module for given specifications. it includes the corresponding hardware, the calculations necessary to build up a mathematical model of the slic, the software using this model and the results of the calculations with the slic and sicofi software, which will permit to adapt the module to the specifications. the siemens si gnal processing co dec fi lter (sicofi) peb 2060 is a fully integrated pcm codec (coder/decoder) and transmit/receive filter produced in an advanced low power cmos technology. it can be used in combination with a variety of solid state subscriber line interface circuits (slic). this note describes an example of application with the ericsson slic pbl 3762 which allows a compact and low cost realisation of pabx subscriber line cards. other realisations (e.g. in central offices) are also possible with the full feature ericsson slic's pbl 3736 and 3739. the corresponding software will be included in an other application note. the combination of sicofi and pbl 3762 provides a costeffective solution because few ex- ternal components are necessary and a high flexibility because of the flexibility of the digital signal processing: C the ericsson pbl 3762 performs borscht functions as loop current, resistive battery feed, ring relay driver and signaling functions as well as signal transmission including 2- to 4-wire and 4- to 2-wire conversion. the 2-wire termination impedance ("hybrid function" or "impedance matching") is adjustable by external impedances. C the peb 2060 (sicofi) consists of several digital filters (z,b,gr,gx,r and x-filters), which provide software controlled adjustment of the analog behavior of the digital switching system. C these adjustments include improved hybrid function ("z-filter"), transhybrid balancing function ("b-filter") as well as frequency correction ("r and x-filters") and level control in receive and transmit direction ("gr and gx-filters").
semiconductor group 504 application notes ii furthermore the programmable parallel signaling inputs and outputs of the peb 2060 (sicofi) provides a flexible interface to the pbl 3762 signaling pins. 1.2 overview in the chapter 2, an example of design of a subscriber line interface module using the sicofi and the pbl 3762 will be given (basic set-up). the chapter 3 explains in details the calculation of a mathematical model of this slic. this model allows to write a program described in chapter 4. the program enables to calculate parameters describing the slic as a function of the frequency. with these parameters, coefficients can be calculated with the sicofi coefficient program for the peb 2060 (sicofi) in chapter 5. these coefficients have then to be programmed into the sicofi. results of measurements are given in chapter 6. the last chapter shows the good correlation between the calculated results and the measured ones for various configurations and specifications. 1.3 glossary pbx : private branch exchange (usa) pabx : private automatic branch exchange (= pbx in europe) c.o. : central office sicofi : peb 2060 sicofi software : see sicofi software description slic : ericsson pbl 3762 slic + sicofi : subscriber line module (slic + sicofi) + peripheral board controller + microprocessor + discrete components + ... (= all borscht functions) : subscriber line interface circuit slic in our model : pbl 3762 + discrete components borscht : battery feed overvoltage protection ringing supervision codec + filtering hybrid testing
semiconductor group 505 application notes ii 2 basic set-up sicofi ? -pbl 3762 2.1 circuit diagram the diagram of the basic set-up can be seen in figure 1 . figure 1 basic set-up sicofi ? + ericsson pbl 3762
semiconductor group 506 application notes ii parts list corresponding to figure 1 . capacitors: c r = 2.2 nf c t = 2.2 nf c hp = 10 nf c dc = 3.3 m f c kx = 1 m f c d = 15 nf resistors: (1/4 w, 10% if not else specified) z t = 600 k w 0.5% z r = 300 k w 0.5% r dc1 = 20 k w r dc2 = 20 k w r ix = 24 k w r sg = 20 k w r d = 39 k w r 1 = 5.6 w diodes: d1 = 1n4007 d2 = 1n4148 2.2 application hints no attention has been paid to the overvoltage protection, signaling and loop monitoring functions in this application note because they should not influence the transmission characteristics. circuit design 1. the capacitors c t and c r are used to stabilize the circuit at high frequencies; a value of 2.2 nf for both is correct. 2. the two impedances z t (matching impedance) and z r (gain impedance) have been exactly measured in order to make correct calculations. these are sensitive components and have to be precise (at least 1%). 3. the rsn pin is very sensitive to noise and therefore the leads to z t , r dc1 and z r should be kept as short as possible and close to the ground plane. 4. the c kx capacitor and the r ix resistor (decoupling circuit) are not necessary with the sicofi version v4.x and later: the pbl 3762 dc offset is limitted to +/C 25 mv and the maximum allowed input dc offset of the sicofi v4.x is +/C 50 mv. 5. a diode (d1) and a resistor ( r 1 ) prevent having currents flowing in the wrong direction and limits the d i /d t at the v bat pin of the peb 3762. 6. a diode (d2) prevents v ee to become lower than v bat . d1, d2 and r 1 may be shared by several slic's.
semiconductor group 507 application notes ii control inputs the sicofi peb 2060 has three output signaling pins and four programmable signaling pins which allow an easy control of the two control pins c1 and c2 and of the two enable inputs e0 and e1 of the pbl 3762. the det output of the pbl 3762 is connected to the si1 input pin of the sicofi. connections sicofi pbl3762 so1 --------- c2 so2 --------- c1 so3 --------- e1 sd --------- e0 si1 --------- det with: c2 c1 e1 e0 x x x x so1 so2 so3 sd sc sb sa sel 1000 0000 := 80 in the sicofi signaling byte, the slic is programmed in active state and det as ground key status. loop monitoring functions the loop current, ground key and ring trip detectors report their status via a common output: det (pin 14). the detector connected to det is selected via the four bit wide control interface c2,c1,e1,e0. the threshold for the loop current detector is set-up by the resistor r d by the following formula: i loop threshold = i lth = 375 / r d (amperes) in our application r d = 39 k gives i lth = 9.6 ma. c d is then calculated by c d = 0.5 ms / r d . for more details see the pbl 3762 data sheet. hybrid function there is no need of extra external components to build the echo attenuation path because this is taken care of by the sicofi b-filter.a ac-dc decoupling capacitor the high pass filter capacitor c hp connected between pin 1 and pin 22 of the pbl 3762 provides decoupling of circuits sensing tip-to-ring conditions and circuits processing ac signals. w
semiconductor group 508 application notes ii c hp should be choosen as high as possible in order to have a low cut off frequency: f chp = 1/( c hp r hp 2 p ). r hp is a pbl 3762 internal resistor with a value of 400 k w . we have choosen a worst case ( c hp = 10 nf, f chp = 40 hz) in our basic setup ( see circuit diagram in figure 1 ). a value of 33 nf for c hp is counselled; it will position f chp at 14 hz and so have less influence on the transmission characteristics. battery feed and saturation guard case 1: active state ( v tr < v ref ) for a tip-to-ring voltage v tr less than the saturation guard reference voltage v ref , the slic emulates a resistive feed characteristic with an apparent battery voltage of 50 v (independent of the actual battery voltage v bat connected). the voltage at the line is: v tr = 50 r i / ( r i + ( r dc1 + r dc2 )/50) with r l = loop resistance (dc). for C 24 v < v bat < C 28 v, v ref is correctly set with the pin rsg not connected. for higher battery voltages, v ref may be adjusted to let resistive feed as described above remain in force until the tip-to-ring dc voltage approches the supply voltage. guide line: adjust v ref = 15.5 + 500 000/ r sg to approximately: v ref = v bat C 8 v i.e.: in our case v bat = C 48 v therefore r sg = 20 k w . case 2: active state and saturation guard ( v tr > v ref ) when the tip-to-ring voltage v tr exceeds v ref , the feed characteristic changes in order to prevent the line drive amplifiers from distorting the ac signal (may occur by insufficient amplifier bias voltages). this has an influence on the transmission characteristics, especially on the return loss. case 3: c 1 = c 2 = 1 with the slic in disabled state ("stand by") a high resistance feed characteristic is enabled. dc path the dc feed resistance is programmed by two resistors r dc1 and r dc2 connected in series to the receive summing node (rsn) and decoupled from ac by the capacitor c dc (recommended cutoff frequency: 14 hz). this has only a small influence on the transmission caracteristics depending on the cutoff frequency value of the system r dc1 , r dc2 , c dc . r sg = 500 000 v bat C 8.0 C 15.5
semiconductor group 509 application notes ii 3 mathematical model 3.1 circuit model a software emulation of the slic is necessary in order to produce a file of the so-called "k-parameters" (see chapter 3.4.1 ) to interface with the sicofi program. we need first to calculate a mathematical model of the slic which will then be used to write a slic program (see chapter 4 ). this model must include all external components which influence the transfer functions of the whole circuit. therefore in the next pages we will call slic the part of our basic setup composed by all analog external components and by the pbl 3762. the resistors and capacitors of the circuit drawing are transformed in complex impedances in order to be as general as possible (see impedance model in chapter 4.3). for more details about the ericsson slic model see the pbl 3762 data sheet.
semiconductor group 510 application notes ii figure 2 shows the grounded model which has been choosen for its simplicity. figure 2 equivalent model of the slic 3.2 preliminary data and symbols meaning the values of the different parameters from figure 2 are listed hereunder: r 2 = 20 w gain setting of output current amplifier r 3 = 9.98 k w gain setting of output current amplifier c hp = 10 nf high pass filter in transmit direction r hp = 400 k w high pass filter in transmit direction r dc1 = 20 k w dc path r dc2 = 20 k w dc path c dc = 3.3 m f dc path z t = 600 k w matching impedance
semiconductor group 511 application notes ii z r = 300 k w gain impedance (gain 4w C 2w # C z t / 2 z r ) z p = 2.2 nf parallel impedance at (a,b) line: this grounded impedance will be doubled in the program pbl 3762. for because there are two of them at the slic input. z f = 20 w fuse impedance z g = 600 w line/generator ac impedance rax dc decoupling circuit in transmit direction prsg coefficient for saturation guard (7 when saturation guard, 1normally) f cdc : cut-off frequency of the dc low pass filter hp1: high pass filter in transmit direction rax: decoupling circuit in transmit direction rax = j c kx r ix omega / (1. + j c kx r ix omega) prsg: saturation guard: x: total correction factor 1/x = hp1 + hsg the ac output stage of the pbl 3762 is a current controlled current source (ccs) which amplifies the current at the rsn summing point ( i rsn ) and which is loaded by the input circuit. f: open loop gain of the current amplifier f = 10000. / (1. + j f /100) f cdc = 1 (( r dc1 + r dc2 ) /2) c dc 2 p ) = 1 1 C j f chp / f hp1 = j 2 p f c hp r hp 1 + j 2 p f c hp r hp hsg = z t prsg 20. (( r dc1 + r dc2 ) / 2) (1 + j f / f cdc )
semiconductor group 512 application notes ii figure 3 current controlled current source amplifier (ccs) and input circuit 3.3 input circuit the figure 4 shows the input circuit of the slic where z out is the equivalent output impedance of the ccs. the equivalent impedance ( z eq ) of the input circuit needs to be calculated: figure 4 equations: i 0 = i 1 C i p (10) v 0 = C i 1 ( z g + z f ) + v g (11) i p = v 0 / z p (12) i 0 = C v 0 / z out (13) v 0 = z p i p (12) from (10) & (11) & (12), we can deduce: i 0 = v 0 / z p + v g / z g C ( v g C v 0 ) / ( z g + z f )
semiconductor group 513 application notes ii that is: i 0 = v g /( z g + z f ) C v 0 / z eq (14) with z eq = z p //( z g + z f )(15) 3.4 calculations the pbl 3762 has a current output; therefore we need to work with the k-parameters which do not require to short-circuit the output (for more information about these parameters see the sicofi software description). 3.4.1 k-parameters a slic with a symmetrical generator v g and a symmetrical line impedance z g can be considered as a circuit accessible through the currents and voltages of a three port: ( v 1 , i 1 ), ( v 2 , i 2 ), ( v 3 , i 3 ). three equations are sufficient to describe the slic completely and any linear combination of the variables is possible. let us take the following combination: (100) a1 = v 1 + z g i 1 (200) b1 = v 1 C z g i 1 then using these new variables, the model of the slic becomes: figure 5 k-1 three port model with the variables a1 and b1 following equations can now be written: (300) b1 = k11 a1 + k12 v 3 + k13 i 2 (400) v 2 = k21 a1 + k22 v 3 + k23 i 2 (500) i 3 = k31 a1 + k32 v 3 + k33 i 2 when the slic is connected to the sicofi, we can assume that: * i 2 = 0 because the input impedance of sicofi is very high. * i 3 is not relevant in the sicofi calculations. according to these remarks, the equations system can be simplified as follow: (600) b1 = k11 a1 + k12 v 3 (700) v 2 = k21 a1 + k22 v 3
semiconductor group 514 application notes ii parameter k11 equation (600) gives k11 = b1/a1 when v 3 = 0 from (100) and (200) we can deduce: b1/a1 = ( v 1 C z g i 1 ) / ( v + z g i 1 ) = ( v 1 / i 1 C z g ) / ( v 1 / i 1 + z g ) let us call z in the input impedance of the slic: z in = v 1 / i 1 therefrom k11 = ( z in C z g ) / ( z in + z g ) for v 3 = 0 parameter k12 k12 = b1 / v 3 when a1 = 0 from (100) follows: v 1 + z g i 1 = 0 i.e. v 1 = C z g i 1 thus b1 = v 1 C z g i 1 = v 1 + v 1 therefrom k12 = 2 v 1 / v 3 for v 1 = C z g i 1 parameter k21 k21 = v 2 / a1 when v 3 = 0 in this case: a1 = v 1 + z g i 1 = v g then k21 = v 2 / v g for v 3 = 0 parameter k22 from (100) and a1 = 0 follows: v 1 = C z g i 1 and we can deduce from (700) and a1 = 0: k22 = v 2 / v 3 for v 1 = C z g i 1 remarks: 1. all these parameters are accessible by measurement with a symmetrical ground free generator and a complex voltmeter. 2. r l = C 20 log10 (|k11|) is nothing else than the return loss of the slic without sicofi.
semiconductor group 515 application notes ii 3.4.2 starting equations using the data given by ericsson one can write the following starting equations: cf figure 2 and figure 3 (1) v 8 = ( v i C v 8 ) f (2) i 0 = ( v 0 C v t ) / r 2 C i i (3) i 0 = v g / ( z g + z f ) C v 0 / z eq (4) v i = v 0 + i i r 3 current summation point rsn: (7) g = C i i / i 0 (total current gain) (8) v 1 = v g C z g i 1 the transmit path is simply described by: (9) v t / v 0 = rax hp1 3.4.3 calculation of k11 k11 is defined by ( z in C z g ) / ( z in + z g ) where 1/x = hp1 + hsg v 0 / i 0 = 1 / z out 1 / z p = j f c tr 2 p (24) z in = z f + z p / / z out (25) rar v r z r (5) i i = C 2 ( v 0 z t hp1 rax + + v 0 hrsg ) (6) f = 1e + 04 1 + j f / 100 (open loop gain) (1) & (4) ? v 8 = f (1 + f ) ( v 0 + i i r 3 ) (20) (20) & (2) ? i 0 = v 0 r 2 C i i C f v 0 r 2 (1 + f ) C f i i r 3 r 2 (1 + f ) i 0 = (21) v 0 C f r 3 i i C r 2 (1 + f ) i i r 2 (1 + f ) (22) 2 v 0 z t x ( v r = 0) & (5) ? i i = C (22) and (21) ? i 0 = v 0 z t x + v 0 2 f r 3 + v 0 2 r 2 (1 + f ) r 2 z t x (1 + f ) 1 / z out = 2 f ( r 2 + r 3 ) + 2 r 2 + z t x z t x r 2 (1 + f ) (23)
semiconductor group 516 application notes ii k11 = ( z in C z g ) / ( z in + z g )(26) 3.4.4 calculation of k12 k22 is defined by: 2 v 1 / v 3 when v g = 0 let us calculate first the current gain g ( cf figure 3 ): ( v g = 0) & (3) ? v 0 = C i 0 z eq (30) (30) & (2) ? r 2 ( i 0 + i i ) + v 8 = i 0 z eq (31) (1) ? v 8 = v i f / (1 + f )(32) (4) ? v i = C i 0 z eq + i i r 3 (32) & (4) & (31) ? r 2 ( i 0 + i i ) + (C i 0 z eq + i i r 3 ) f / (1 + f ) = C i 0 z eq i 0 ( r 2 (1 + f ) + z eq ) = i i ( r 2 (1 + f ) C r 3 f )(33) calculation of v 0 / v r : ( v g = 0) & (3) ? i 0 = C v 0 / z eq = C i i g (35) (35) & (5) ? v 0 / ( g z eq ) = C 2 v 0 / ( z t x rax) C 2 v r / z r (36) and by regrouping the terms in v 0 and v r : we have to calculate now v 1 / v 0 : figure 6 g = C i 0 / i i =(34) r 3 f + r 2 (1 + f ) r 2 (1 + f ) + z eq C 2 g z eq / z r 1 + 2 g z eq / z t x rax v 0 v r =(37)
semiconductor group 517 application notes ii z f and z g form a voltage divider; the calculations are then straightforward: v 1 / v 0 = z g / ( z g + z f )(38) 3.4.5 calculation of k21 k21 is defined by v t / v g when v r = 0 figure 7 we have a simple voltage divider: v t / v g = ( v t / v 0 ) ( v 0 / v g ) hence: 3.4.6 calculation of k22 k22 is defined by v t / v r when v g = 0 thus (37) & (38) ? 2 v 1 / v r =(39) C 2 2 g z eq / z r 1 + 2 g z eq / z t x rax z g z g + z f v g z f + z g + z p / z out v 0 z p // z outt =(40) rax hp1 ( z p // z out ) z f + z g + ( z p // z out ) (41) (40) & (9) ? v t / v g = C 2 g z eq / z r 1 + 2 g z eq / z t x rax (50) (37) & (9) ? v t / v r = rax hp1
semiconductor group 518 application notes ii 3.5 summary z in = z f + z p // z out (25) k11 = ( z in C z g ) / ( z in + z g )(26) z eq = z p // ( z g + z f ) (15) r 2 = 20 w gain setting of output current amplifier r 3 = 9.98 k w gain setting of output current amplifier c hp = 10 nf high pass filter in transmit direction r hp = 400 k w high pass filter in transmit direction r dc1 = 20 k w dc path r dc2 = 20 k w dc path c dc = 3.3 m f dc path z t = 600 k w matching impedance z r = 300 k w gain impedance (gain 4w C 2w # C z t / 2 z r ) z p = 2.2 nf parallel impedance at (a,b) line z f = 20 w fuse impedance z g = 600 w line/generator ac impedance rax decoupling circuit in transmit direction (high pass c kx , r ix ) prsg coef. for saturation guard (7 when saturation guard, 1 normally) f cdc : cut-off frequency of the dc low pass filter hp1 : high pass filter in transmit direction 2 f ( r 2 + r 3 ) + 2 r 2 + z t x z t x r 2 (1 + f ) (23) 1 / z out k12 (39) C 2 2 g z eq / z r 1 + 2 g z eq / z t x rax z g z g + z f rax hp1 ( z p // z out ) ( z p // z out ) + z f + z g (41) k21 C 2 g z eq / z r 1 + 2 g z eq / z t x rax (50) k22 = rax hp1 f cdc 1 (( r dc1 + r dc2 ) / 2) c dc 2 p ) j 2 p f c hp r hp 1 + j 2 p f c hp r hp hp1 1 1 C j f chp / f req
semiconductor group 519 application notes ii rax : connection circuit in transmit direction rax = j c kx r i x omega / (1. + j c kx r ix omega) hsg : saturation guard x : total correction factor 1 / x = hp1 + hsg i i : current summation point rsn f : open loop gain of current amplifier g : total current gain: g = C i i / i 0 (7) v 1 : voltage at (a,b) line: v 1 = v g C z g i 1 (8) the transmit path is simply described by: v t / v 0 = rax hp1 (9) hsg z t prsg 20. (( r dc1 + r dc2 ) / 2) (1 + j f / f cdc ) rar v r z r + v 0 z t hp1 rax )(5) i i = C 2 (+ v 0 hrsg 10 000 1 + j f req / 100 (6) f =
semiconductor group 520 application notes ii 4software each k-parameter is expressed in the pbl 3762.for program as an algebraic equation, combination of the various slic parameters which are provided by the slic input file pbl 3762.inp. according to the values of the slic input data, the slic program pbl 3762.exe calculates the values of the k-parameters in function of the frequency and writes them in an output file pbl 3762.sli. this file will be used by the sicofi program to calculate the coefficients for the peb 2060 (for more information about the use of the sicofi program see the sicofi software description). explanations about the input file and the subroutines of the program are given in the following pages as well as a listing of the source file (eric.for). please note that the program has been written in fortran (and compiled with the microsoft fortran optimizing compiler); therefore it is important to respect the fortran convention of using a "." (point) for each real value. 4.1 input file the input file pbl 3762.inp is listed hereunder: test (t:test=>amplitude and phase of kij; x:normal calculation) x *zfra1, zfca1, zfca2, zfra2, zfrs, zfcs : fuse impedance zf 0. 0. 0. 0. 20.2 0. *ztra1, ztca1, ztca2, ztra2, ztrs, ztcs : matching impedance zt 598.e+03 0. 0. 0. 0. 0. *zrra1, zrca1, zrca2, zrra2, zrrs, zrcs : gain impedance zr 300.e+03 0. 0. 0. 0. 0. chp : capacitor for internal high pass 10.18e-09 *zpra1, zpca1, zpca2, zpra2, zprs, zpcs : parallel impedance zp (= ct = cr) 0. 0. 0. 0. 0. 2.24e-09 ckx = high pass in transmit direction 0.98e-06 rix = high pass in transmit direction 23.7e+03 rdc1 rdc2 cdc : dc path 20.40e+03 20.4e+03 3.33e-06 prsg = saturation guard (yes = 7. no = 1.) 1. *zsli = half loop attenuation 0.5 *zg : source/line impedance (with 6 elements ) *zgra1, zgca1, zgca2, zgra2, zgrs, zgcs 600. 0. 000.e-00 0. 000. 0. remark: because the line impedance is embedded in the k-parameters, the slic file has to be recalculated every time the line impedance is changed.
semiconductor group 521 application notes ii 4.2 test mode test = "t" in order to make a rough adaptation of the pbl 3762 to the required specifications, it is interesting to work first with the slic alone without sicofi and to be able to view the different transfer functions and the input impedance. a test mode was therefore inserted in the slic program: when the switch test equals "t", the program writes the amplitude and phase (polar coordinates) of the input impedance and of all kij parameters as a function of the frequency in the output file pbl 3762.sli at 100 hz steps. the transformation cartesian to polar coordinates is made by the subroutine cpol. if test is other than "t" (default mode) then the program calculates the k-parameters for the sicofi program. real and imaginary part (cartesian coordinates) are written as a function of the frequency to the output file pbl 3762.sli at 10 hz steps. 4.3 model for impedances in order to match any specification with the sicofi + slic circuit, all the impedances z t , z f , z r , z p and z g can have complex values ( see figure 1 and figure 2 ). they are described in the subroutine imped6 using 6 resistors and capacitors; a component value set to 0 means that this component does not exist. the equivalent circuit diagram is the following: figure 8 where * stands for f, t, r, g or b. r means resistor; c means capacitance; s means series. these values are read from the input file. example: *zg : source/line impedance (with 6 elements ) *zgra1, zgca1, zgca2, zgra2, zgrs, zgcs 820. 0. 115.oe-9 0. 220. 0.
semiconductor group 522 application notes ii is the equivalent impedance corresponding to a resistor of 220 w in series with 820 w in par- allel with 115 nf: 4.4 other input parameters half loop attenuation zsli: zsli = v t / v r in worst case and with sicofi filters off. zsli is a variable controlling the sicofi + slic z-filter loop. it should be measured in a worst case condition (for instance z g = 1 m w ). for more information see the chapter about input file in the sicofi software description. the other parameters are allready defined in the preceding chapter.
semiconductor group 523 application notes ii 4.5 fortran source file listing of pbl 3762.for ************************* siemens a.g.****************************** * program pbl3762 * * version v3.0 16 nov. 88 mr. glasser hl it pd 22 * revision v3.1 25 jan. 89 * revision v3.2 5 juni 89 * * revision v3.3 14 sept. 89 subroutine imped6 * mr. kliese hl it at * * pbl 3762 and following * ******************************************************************** * implicit logical (a-k,m-z),character (l) * integer in,out,i,n10,n399,type character*13 fileout,infile character*1 test * real ztr1,ztr2,ztc1,ztc2,ztrs,ztcs real zrr1,zrr2,zrc1,zrc2,zrrs,zrcs real zfr1,zfr2,zfc1,zfc2,zfrs,zfcs real zpr1,zpr2,zpc1,zpc2,zprs,zpcs real zgr1,zgr2,zgc1,zgc2,zgrs,zgcs real rix,ckx,rzt,rzr,chp,rhp,cab real freq,fchp,fcdc real db,ph,haha(2),hap(2),pi real flp1,prsg real pi2,zsli real rdc1,rdc2,cdc,r2,r3 * complex k11t(399),k12t(399),k21t(399),k22t(399),kdett(399) complex k11,k12,k21,k22,kdet complex zout,zin,zp,zl,zt,zr,zf,zg,den complex g,lp1,rax,o,f,yab,y,yp,yout,hp1,z1,x complex zint(399),zpt(399),zlt(399) complex var1,zeq * * data storage for line/source impedance zg, zt, zr, fuse * impedance zf, zp common /qzg/zgr1,zgr2,zgc1,zgc2,zgrs,zgcs common /qzt/ztr1,ztr2,ztc1,ztc2,ztrs,ztcs common /qzr/zrr1,zrr2,zrc1,zrc2,zrrs,zrcs common /qzf/zfr1,zfr2,zfc1,zfc2,zfrs,zfcs common /qzp/zpr1,zpr2,zpc1,zpc2,zprs,zpcs * common /qk/k11,k12,k21,k22,kdet common /qpi2/ pi2 common /qp/ pi
semiconductor group 524 application notes ii 5 coefficient calculation the execute file pbl 3762.exe is a compiled version of the file pbl 3762. for. it gives an output file named pbl 3762.sli using the input file pbl 3762.inp. pbl 3762. sli used in combination with the specification file allows the sicofi coefficient program to calculate and optimize the sicofi coefficients. in order to show the accuracy of the model, we have choosen to calculate using the measured values of the components on the test board. in practice it will be sufficient to calculate for the nominal values, but z t and z r are sensitive components and have to be precise (1% or better 0.5%). several runs have been made with automatic z- and b-filter calculations. 5.1 input file hereunder is a listing of our input file pbl 3762.inp with the measured values: test (t:test=>amplitude and phase of kij; x:normal calculation ) x *zfra1, zfca1, zfca2, zfra2, zfrs, zfcs : impedance zf 0. 0. 0 0. 20.2 0. *ztra1, ztca1, ztca2, ztra2, ztrs, ztcs : impedance zt 598.e+03 0 0 0. 0. 0. *zrra1, zrca1, zrca2, zrra2, zrrs, zrcs : impedance zr 300.e+03 0 0 0. 0. 0. chp : capacitor for internal high pass 10.18e-09 *zpra1, zpca1, zpca2, zpra2, zprs, zpcs : impedance zp(=ct=cr) 0 0 0 0. 0. 2.24e-09 ckx = decoupling circuit in transmit direction (rax) 0.98e-06 rix = decoupling circuit in transmit direction (rax) 23.7e+03 rdc1 rdc2 cdc : dc path 20.40e+03 20.4e+03 3.33e-06 prsg = saturation guard (yes = 7. no =1.) 1. *zsli = half loop attenuation 0.5 *zg : source/line impedance (with 6 elements) *zgra1, zgca1, zgca2, zgra2, zgrs, zgcs 600. 0. 000.e-00 0. 000. 0.
semiconductor group 525 application notes ii c******************************************************************* c initialisation part c******************************************************************* * internal data given by ericsson flp1 = 100.0 rhp = 400.e+03 r2 = 20. r3 = 9.98e+03 * other data n10 = 10 out = 6 in = 5 pi2 = 4.*asin(1.) pi = pi2/2. fileout = ' ' infile = ' ' * c******************************************************************* c inputs c******************************************************************* * write(out,'(a)')' enter input file name : ' 50 read (in,'(a)') infile if ( index(infile,' ').eq.1 ) then write (out,'(a)')' enter correct input file name: ' infile=' ' goto 50 endif write (out,'(a)') ' enter output file name : ' 10 read (in,'(a)') fileout if (index(fileout,' ').eq.1) then write (out,'(a)')' enter correct output file name : ' fileout=' ' goto 10 endif open (30, file=fileout, err=1000, status= 'unknown') * write(6,*) ' reading input file...' * open (10, file=infile, err=1100, status= 'old') read(10,'(a)') read(10,'(a)') test read(10,'(a)') read(10,*) zfr1,zfc1,zfc2,zfr2,zfrs,zfcs read(10,'(a)') read(10,*) ztr1,ztc1,ztc2,ztr2,ztrs,ztcs read(10,'(a)') read(10,*) zrr1,zrc1,zrc2,zrr2,zrrs,zrcs read(10,'(a)') read(10,*) chp read(10,'(a)') read(10,*) zpr1,zpc1,zpc2,zpr2,zprs,zpcs read(10,'(a)') read(10,*) ckx read(10,'(a)') read(10,*) rix
semiconductor group 526 application notes ii read(10,'(a)') read(10,*) rdc1,rdc2,cdc read(10,'(a)') read(10,*) prsg read(10,'(a)') read(10,*) zsli read(10,'(a)') read(10,'(a)') read(10,*) zgr1,zgc1,zgc2,zgr2,zgrs,zgcs close (10) c******************************************************************* c documentation part c******************************************************************* c write (30,*) '* ericsson slic: ',infile write (30,*) '* fuse impedance' write (30,*) '*zfr1= ',zfr1,' zfr2= ',zfr2 write (30,*) '*zfc1= ',zfc1,' zfc2= ',zfc2 write (30,*) '*zfrs= ',zfrs,' zfcs= ',zfcs write (30,*) '* line/generator impedance' write (30,*) '*zgr1= ',zgr1,' zgr2= ',zgr2 write (30,*) '*zgc1= ',zgc1,' zgc2= ',zgc2 write (30,*) '*zgrs= ',zgrs,' zgcs= ',zgcs write (30,*) '* matching impedance' write (30,*) '*ztr1= ',ztr1,' ztr2= ',ztr2 write (30,*) '*ztc1= ',ztc1,' ztc2= ',ztc2 write (30,*) '*ztrs= ',ztrs,' ztcs= ',ztcs write (30,*) '* gain impedance', write (30,*) '*zrr1= ',zrr1,' zrr2= ',zrr2 write (30,*) '*zrc1= ',zrc1,' zrc2= ',zrc2 write (30,*) '*zrrs= ',zrrs,' zrcs= ',zrcs write (30,*) '* parallel impedance at (a,b) line' write (30,*) '*zpr1= ',zpr1,' zpr2= ',zpr2 write (30,*) '*zpc1= ',zpc1,' zpc2= ',zpc2 write (30,*) '*zprs= ',zprs,' zpcs= ',zpcs write (30,*) '* other data' write (30,*) '* rix= ',rix, ' ckx = ',ckx write (30,*) '* chp= ',chp, ' rhp = ',rhp write (30,*) '*rdc1= ',rdc1,' rdc2= ',rdc2,' cdc= ',cdc write (30,*) '*prsg= ',prsg fchp = 1./(chp*pi2*rhp) fcdc = 1./( cdc*pi2*(rdc1*rdc2)/(rdc1+rdc2) ) write (30,*) '*fchp= ',fchp write (30,*) '*fcdc= ',fcdc * test if (test.eq.'t') then write (*,*) '*test: 100 hz steps and polar coordinates' n10 = 100 end if c
semiconductor group 527 application notes ii c******************************************************************* c calculation part c******************************************************************* n399= (4000/n10)-1 * write (out,*) ' running preliminary calculations...' do 123,i=1,n399 freq = real(i*n10) call imped6(zgr1,zgr2,zgc1,zgc2,zgrs,zgcs,freq,zg) call imped6(zfr1,zfr2,zfc1,zfc2,zfrs,zfcs,freq,zf) call imped6(ztr1,ztr2,ztc1,ztc2,ztrs,ztcs,freq,zt) call imped6(zrr1,zrr2,zrc1,zrc2,zrrs,zrcs,freq,zr) call imped6(zpr1,zpr2,zpc1,zpc2,zprs,zpcs,freq,zp) * zp is parallel at the output and connected to ground: * it must be doubled in our grounded model zp = 2.*zp * open loop gain f = 10000. / cmplx(1.,freq/flp1) * x: c if (type.eq.3762) then x = 1./ ( & (1./cmplx(1.,-fchp/freq) ) & + (zt*prsg /( 20.*(rdc1+rdc2)*cmplx(1.,freq/fcdc)) ) ) c else c x = 1./ ( c & (1./cmplx(1.,-fchp/freq) ) c & + (zt*prsg / c & ( 20.*(rdc1+rdc2)*cmplx(1.,freq/fcdc)*cmplx(1.,freq/fchp)) ) ) c endif * yp yp = 1./zp * rax = j*ckx*rix*omega/1.+j*ckx*rix*omega : * ckx = 0 => no filter if (ckx.le.(1.e-12)) then rax = cmplx(1.,0) else var1 = cmplx(0,ckx*rix*pi2*freq) rax = var1/(1.+ var1) endif * * zload equivalent: zeq = zp//(zf+zg) zeq = (zp*(zf+zg))/(zp+zg+zf) * g g = ( r2*(1.+f) + f*r3 ) / & ( r2*(1.+f) + zeq ) * * zout zout = ( zt*x*r2*(1.+f) ) / & ( 2.*f*(r3+r2) + 2.*r2 + zt*x ) yout = 1./zout * * zin zin = zf + 1./( yp+yout ) *
semiconductor group 528 application notes ii k11 = (zin-zg)/(zin+zg) * c hp1 = j* 2 p *freq*chp*rhp/ 1 + j* 2 p *freq*chp*rhp hp1 = 1./ & cmplx(1.,(-fchp/freq)) * *k12 = 2*gain 2w-4w ( but difference of measuring point) k12 = ( -2.*(zt/zr)*zg/(zg+zf) ) / & ( (zt/(2.*g*zeq)) + (1./(x*rax)) ) * *k21 = gain 4w-2w with divider zout, zg, zp, zf z1 = (zp*zout)/(zout + zp) k21 = rax*hp1*z1/( z1 + zf+zg ) * *k22 = gain 4w-4w k22 = -(2.*g*rax*hp1*zeq/zr ) / & ( 1. + 2.*g*zeq/(zt*x*rax) ) * * write the tables zint(i)=zin k11t(i)=k11 k12t(i)=k12 k21t(i)=k21 k22t(i)=k22 * intermediate results if ( freq.eq.300. & .or.freq.eq.1000. & .or.freq.eq.3000.)then write (*,*) '* freq:',int(freq) write (*,999) '* zin= ',zint(i) endif 123 continue * * if test, gives module and phase of zin as a function of frequency if (test.eq.'t') then write (30,*) & '* freq |zin| phi(zin) ' do 189 i=1,n399 freq = real(i*n10) haha(1) = real(zint(i)) haha(2) = imag(zint(i)) call cpol(haha,hap) db= 20.*log10(hap(1)+1.e-20) ph= 360.*hap(2)/pi2 write (30,*) freq,hap(1),ph 189 continue endif * 777 format( a1,f7.1,2(f13.3),a3,2(f13.3) ) 888 format( a1,f6.0,f10.1) 999 format( a7,g17.9,g17.9) * write (30,'(a)') 'zsli' write (30,'(g12.5)') zsli write (out,*) ' running k11 calculation...' write (30,'(a)') 'k11-table'
semiconductor group 529 application notes ii do 100 i=1,n399 freq = real(i*n10) haha(1)=real(k11t(i)) haha(2)=imag(k11t(i)) if (test.eq.'t') then call cpol(haha,hap) db= 20.*log10(hap(1)+1.e-20) ph= 360.*hap(2)/pi2 write (30,*) freq,db,ph else write (30,*) freq,real(k11t(i)),imag(k11t(i)) endif 100 continue c if (test.eq.'t') then write (out,*) ' running k12/2. calculation...' write (30,'(a)') 'k12/2-table' else write (out,*) ' running k12 calculation...' write (30,'(a)') 'k12-table' endif do 110 i=1,n399 freq = real(i*n10) haha(1)=real(k12t(i)) haha(2)=imag(k12t(i)) if (test.eq.'t') then call cpol(haha,hap) db= 20.*log10(hap(1)+1.e-20) ph= 360.*hap(2)/pi2 c write (30,*) freq,db,ph write (30,*) freq,db-6.,ph else write (30,*) freq,real(k12t(i)),imag(k12t(i)) endif 110 continue c write (out,*) ' running k21 calculation...' write (30,'(a)') 'k21-table' do 120 i=1,n399 freq = real(i*n10) haha(1)=real(k21t(i)) haha(2)=imag(k21t(i)) if (test.eq.'t') then call cpol(haha,hap) db= 20.*log10(hap(1)+1.e-20) ph= 360.*hap(2)/pi2 write (30,*) freq,db,ph else write (30,*) freq,real(k21t(i)),imag(k21t(i)) endif 120 continue c write (out,*) ' running k22 calculation...' write (30,'(a)') 'k22-table' do 130 i=1,n399 freq = real(i*n10)
semiconductor group 530 application notes ii haha(1)=real(k22t(i)) haha(2)=imag(k22t(i)) if (test.eq.'t') then call cpol(haha,hap) db= 20.*log10(hap(1)+1.e-20) ph= 360.*hap(2)/pi2 write (30,*) freq,db,ph else write (30,*) freq,real(k22t(i)),imag(k22t(i)) endif 130 continue 1111 continue write(30,'(a1)') ';' close (30) write(out,'(a)') ' data written in file: '//fileout stop 1000 write(out,'(a)') ' open error at output-file: '//fileout stop 1 1100 write(out,'(a)') ' open error at input-file: '//infile stop 2 end c c################################################################### c subroutine cpol(z,zp) c c################################################################### c c name of subroutine: cpol c c formal parameter list: z,zp c c input parameters: c zp (double) array [2] c c output parameters: c zp (double) array [2] c c common blocks: c p c c task of this routine: c coordinate transformation cartesian --> polar c c required functions: c atan,sqrt c c################################################################### c implicit logical (a-k,m-z),character (l) real z(2),zp(2),pi,e,d * common /qp/ pi * zp(1) = sqrt(z(1)*z(1)+z(2)*z(2)) zp(2) = atan(z(2)/(z(1)+1.0e-20))
semiconductor group 531 application notes ii e = z(1) d = z(2) if (e) 1,4,4 1 if (d) 2,2,3 2 zp(2) = zp(2)-pi return 3 zp(2) = zp(2)+pi 4 return end c c#############################################################c c### ###c subroutine imped6(rp1,rp2,cp1,cp2,rs,cs,freq,zeq) c### ###c c### note : when a parameter is set to 0 then the ###c c### corresponding resistor or capacitance does not ###c c### exist ###c c### ###c c### formal parameter list:rp1,rp2,cp1,cp2,rs,cs,freq,zeq ###c c### ###c c### input parameters: ###c c### rs [ real ] ; series resistance ###c c### cs [ real ] ; series capacitance ###c c### rp1 [ real ] ; parallel resistance ###c c### rp2 [ real ] ; parallel resistance ###c c### cp1 [ real ] ; parallel capacitance ###c c### cp2 [ real ] ; parallel capacitance ###c c### freq [ real ] ; frequency ###c c### ###c c### output parameters: ###c c### zeq [ complex ] ###c c### ###c c### common blocks: qpi2 ###c c### ###c c### task of this routine: equivalent impedance of: ###cc c### special cases: ###c c### a. system parallel ###c c### 1. cp1 not 0 ###c c### 1.1 rp1 not 0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### 1.2 rp1 = 0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c
semiconductor group 532 application notes ii c### 2. cp1 =0 ###c c### ###c c#############################################################c c implicit logical (a-k,m-z),character (l) real cp1,cp2,rp1,rp2 real cs,rs,n,ul real freq,pi2,omega complex d,c,zeq,za,zb * common /qpi2/ pi2 * omega = pi2*freq if (cp1.eq.0) then c=cmplx(rp1,0.) else c = rp1 + (1. / cmplx(0.,omega*cp1)) endif if (cp2.eq.0) then d=cmplx(rp2,0.) else d = rp2 + (1. / cmplx(0.,omega*cp2)) c### 2.1 rp1 not 0 # c### # c### # c### # c### # c### # c### 2.2 rp1 =0 # c### # c### # c### # c### # c### 3. idem if cp2 = 0 # c### ## # c### 4. rp2 =0 and rp1 =0 # c### # c### # c### # c### # c### # c### 5.cp2 =0 and cp1 =0 # c### # c### # c### # c### # c### # c### b. system series # c### 1. cs = 0 # c### # c### 1. rs = 0 # c### # c### idem system a # c### # c### c.conclusion: zeq = sum of the two # c### systems in any case ## #
semiconductor group 533 application notes ii endif n = cabs(c) ul = cabs(d) * if one of them is 0 then no parallel calculation if ((n.eq.0.).or.(ul.eq.0.)) then za=c+d else * za = c & d in parallel za=c*d/(c+d) endif c system series if (cs .eq.0) then zb=cmplx(rs,0.) else zb = rs +( 1. / cmplx(0.,omega*cs)) endif c both zeq=za+zb return end c c#############################################################c
semiconductor group 534 application notes ii 5.2 specification file the spec file for 600 w specifications busa.spe is following: (please notice: * a-law and not m -law has been used * the limit values of the trans-hybrid loss in dd spec have been set artificially higher than required so that the sicofi program calculates coefficients which will give some margin between the required and the measured trans-hybrid loss) busa.spe fref = 1004.0 law = a uref = 0.7750 rlx = 0. rlr = 0.0 abimp = zi zlrp1= 0. zlcp1= 0. zlrp2= 0. zlcp2= 0.e-0 zlrs = 600. zlcs = 0. zirp1= 0. zicp1= 0. zirp2= 0. zicp2= 0.e-0 zirs = 600. zics = 0. z3rp1= 0. z3cp1= 0. z3rp2= 0. z3cp2= 0.e-0 z3rs = 600. z3cs = 0. zrrp1= 0. zrcp1= 0. zrrp2= 0. zrcp2= 0.e-0 zrrs = 600. zrcs = 0. zin fr 300 500 1k 3.4k at- 0 26 30 30 at+ 20 26 30 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k
semiconductor group 535 application notes ii ad,upper fr 300 500 2.7k 3k 3.41k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.39k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 536 application notes ii 6 measurement results the outputs of the sicofi program are: a byte file (pbl 3762.byt) to be transferred to the sicofi evaluation board. a result file (pbl 3762.res) with all the coefficients, some comments about the slic (beginning with "*") and the calculated transfer functions. the measurements on the following pages correspond well with the calculated values and the specifications are fulfilled. byte file: pbl 3762.byt psr=36 cam00=41 cam20=40 ciw0=26,f4,80 ciw0=13,30,22,2a,6b,2b,22,b3,22 ciw0=23,f0,bc,37,72,49,36,0f,a6 ciw0=2b,f0,2b,97,74,2a,27,02,ce ciw0=03,35,12,52,91,be,f9,a9,f4 ciw0=0b,00,33,ab,23,32,73,39,fa ciw0=18,19,19,11,19 ciw0=30,61,b1,00,b4 sig0=80 ciw0=26,f4,78 result file: pbl 3762.res input_file_name: pbl 3762.ctl date: 08.12.88 11:16 spec = busa.spe slic = pbl 3762.sli byte = ref.byt chnr = 0,a plq = n on = all version = v3.1 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = y pzin= 11 psp = 3 fz = 300.00 500.00 1000.0 1300.0 1500.0 2000.0 2500.0 2900.0 3000.0 3200.0 3400.0 7000.0 10000. 14000. wfz = .100 1.00 2.00 1.50 1.00 3.00 1.00 1.00 1.00 3.00 2.80 .230 1.00 1.00 fz = 300.00 3400.0 zlim = 10.00 zrep =y zdis = 1 fr = 200.00 3400.0 rdisp= n rrefq = n rref = .29230e-01
semiconductor group 537 application notes ii fx = 300.00 3400.0 xdisp= n xrefq = n xref = -.21669 bauto = y pb = 10 gwfb= .500e-01 bdf = 1 fb = 300.00 500.00 700.0 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 fb = 300.00 3400.0 blim = 10.00 bdf = 1 brep = y bdis = 1 arec = .00 drec = .00 axmi = .00 dxmi = .00 xzq = -.16406250e+00 .32031250e+00 .13183590e-01 -.30468750e+00 .16406250e+00 xrq = .98535160e+00 .10253910e-01 .53710940e-02 .36621090e-02 -.65917970e-02 xxq = .10117190e+01 .17562870e-01 .36621090e-02 .90332030e-02 -.73852540e-02 xbq = -.26550290e+00 -.49804690e+00 -.49316410e+00 .26171880e+00 .17187500e+00 -.24798580e+00 .34179690e-02 .28515630e+00 -.28906250e+00 .13867190e+00 xgq = .51123050e+00 .20546880e+01 ; bytes for z-filter (13): 30,22,2a,6b,2b,22,b3,22 bytes for r-filter (2b): f0,2b,97,74,2a,27,02,ce bytes for x-filter (23): f0,bc,37,72,49,36,0f,a6 bytes for gain-factors (30): 61,b1,00,b4 2nd part of bytes b-filter (0b): 00,33,ab,23,32,73,39,fa 1st part of bytes b-filter (03): 35,12,52,91,be,f9,a9,f4 bytes for b-filter delay (18): 19,19,11,19 * ericsson slic eric.inp * test= x * fuse impedance *zfr1= 0.000000e+00 zfr2= 0.000000e+00 *zfc1= 0.000000e+00 zfc2= 0.000000e+00 *zfrs= 20.200000 zfcs= 0.000000e+00 * line/generator impedance *zgr1= 600.000000 zgr2= 0.000000e+00 *zgc1= 0.000000e+00 zgc2= 0.000000e+00 *zgrs= 0.000000e+00 zgcs= 0.000000e+00 * matching impedance *ztr1= 598000.000000 ztr2= 0.000000e+00 *ztc1= 0.000000e+00 ztc2= 0.000000e+00 *ztrs= 0.000000e+00 ztcs= 0.000000e+00 * gain impedance
semiconductor group 538 application notes ii *zrr1= 300000.000000 zrr2= 0.000000e+00 *zrc1= 0.000000e+00 zrc2= 0.000000e+00 *zrrs= 0.000000e+00 zrcs= 0.000000e+00 * parallel impedance at (a,b) line *zbr1= 0.000000e+00 zbr2= 0.000000e+00 *zbc1= 0.000000e+00 zbc2= 0.000000e+00 *zbrs= 0.000000e+00 zbcs= 2.240000e-09 * other data * rix= 23700.000000 ckx = 9.800000e-07 * chp= 1.018000e-08 rhp = 400000.000000 *rdc1= 20400.000000 rdc2= 20400.000000 cdc= 3.330000e-06 *prsg= 1.000000 *fchp= 39.085200 *fcdc= 4.685713 run # 1 z-filter calculation results reference impedance for optimization: zirp1= 0. zicp1= .000 zirp2= 0. zicp2= .000 zirs = 600. zics = .000 calculated and quantized coefficients: xz = -.16279 .31968 .01322 -.30409 .16758 xzq = -.16406 .32031 .01318 -.30469 .16406 bytes for z-filter (13): 30,22,2a,6b,2b,22,b3,22 return loss freq loss freq loss (hz) (db) (hz) (db) 100. 15.460 1800. 36.898 200. 21.477 1900. 36.337 300. 25.144 2000. 35.902 400. 27.876 2100. 35.599 500. 30.134 2200. 35.433 600. 32.130 2300. 35.412 700. 33.973 2400. 35.549 800. 35.716 2500. 35.860 900. 37.354 2600. 36.372 1000. 38.807 2700. 37.117 1100. 39.912 2800. 38.134 1200. 40.477 2900. 39.435 1300. 40.434 3000. 40.878 1400. 39.920 3100. 41.813 1500. 39.164 3200. 41.100 1600. 38.347 3300. 38.833 1700. 37.575 3400. 36.154 min. z-loop reserve: 5.315 db
semiconductor group 539 application notes ii at frequency: 8500.0 hz min. z-loop mirror signal reserve: 9.927 db at frequency: 9000.0 hz run # 1 x-filter calculation results reference impedance for optimization: zirp1= 0. zicp1= .000 zirp2= 0. zicp2= .000 zirs = 600. zics = .000 calculated and quantized coefficients: xx = 1.01241 .01756 .00367 .00912 -.00740 xxq = 1.01172 .01756 .00366 .00903 -.00739 bytes for x-filter (23): f0,bc,37,72,49,36,0f,a6 gx results: all attenuation values (in db) refer to fref = 1004. hz rlx slic+z vref/vsicofi xref gx .00 - .29 - 6.17 - -.22 = -6.25 ideal -.01 = .29 + 6.17 + -.22 + -6.25 quant second byte for gain: ,00,b4 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1004.0 hz tgref ca = .278 ms tgref cb = .291 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 14.017 2.890 2000. .063 .010 200. .419 1.880 2100. .053 .016 300. .061 .629 2200. .041 .022 400. .069 .309 2300. .027 .030 500. .055 .179 2400. .015 .039 600. .036 .112 2500. .005 .049 700. .020 .073 2600. .000 .060 800. .008 .049 2700. .003 .073 900. .001 .032 2800. .015 .088 1000. -.001 .021 2900. .038 .105 1100. .003 .013 3000. .074 .126 1200. .010 .008 3100. .124 .151 1300. .021 .004 3200. .192 .182 1400. .033 .001 3300. .283 .223 1500. .045 .000 3400. .410 .277 1600. .056 .000 3500. .596 .355 1700. .065 .001 3600. .906 .473 1800. .069 .003 3700. 1.507 .666 1900. .068 .006 3800. 2.952 1.001
semiconductor group 540 application notes ii run # 1 r-filter calculation results reference impedance for optimization: zirp1= 0. zicp1= .000 zirp2= 0. zicp2= .000 zirs = 600. zics = .000 calculated and quantized coefficients: xr = .98529 .01014 .00518 .00364 -.00655 xrq = .98535 .01025 .00537 .00366 -.00659 bytes for r-filter (2b): f0,2b,97,74,2a,27,02,ce gr results: all attenuation values (in db) refer to fref= 1004. hz -rlr slic+z vsicofi/vref rref gr .00 - .31 - -6.17 - .03 = 5.83 ideal .00 = .31 + -6.17 + .03 + 5.83 quant first byte for gain (30): 61,b1 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1004.0 hz tgref ca = .059 ms tgref cb = .042 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. -.319 .000 2000. .060 .210 200. -.003 .113 2100. .055 .216 300. .049 .143 2200. .046 .224 400. .057 .155 2300. .035 .232 500. .050 .162 2400. .023 .242 600. .038 .167 2500. .012 .252 700. .025 .170 2600. .004 .264 800. .014 .173 2700. .001 .278 900. .005 .176 2800. .004 .293 1000. -.000 .179 2900. .016 .311 1100. -.001 .181 3000. .039 .333 1200. .002 .183 3100. .074 .358 1300. .010 .185 3200. .125 .391 1400. .020 .188 3300. .200 .432 1500. .031 .190 3400. .309 .488 1600. .042 .193 3500. .480 .566 1700. .052 .196 3600. .775 .685 1800. .058 .200 3700. 1.365 .879 1900. .061 .205 3800. 2.803 1.214
semiconductor group 541 application notes ii run # 1 b-filter calculation results reference impedance for optimization: zlrp1= 0. zlcp1= .000 zlrp2= 0. zlcp2= .000 zlrs = 600. zlcs = .000 calculated and quantized coefficients: xb = -.26544 -.49818 -.49274 .26327 -.17247 -.24799 .00340 .28698 -.28981 .13867 xbq = -.26550 -.49805 -.49316 .26172 .17188 -.24799 .00342 .28516 -.28906 .13867 2nd part of bytes b-filter (0b): 00,33,ab,23,32,73,39,fa 1st part of bytes b-filter (03): 35,12,52,91,be,f9,a9,f4 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 24.567 1800. 32.593 200. 18.341 1900. 30.544 300. 24.229 2000. 29.354 400. 32.242 2100. 28.809 500. 49.612 2200. 28.837 600. 35.027 2300. 29.452 700. 30.733 2400. 30.751 800. 28.902 2500. 32.940 900. 28.233 2600. 36.340 1000. 28.362 2700. 40.076 1100. 29.199 2800. 38.391 1200. 30.816 2900. 34.673 1300. 33.513 3000. 32.338 1400. 38.230 3100. 31.366 1500. 50.024 3200. 31.773 1600. 43.144 3300. 34.032 1700. 36.075 3400. 38.314 additonal b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 542 application notes ii figure 9 freq/hz res/dbm0 2208 -0.15 2309 -0.14 2409 -0.13 2509 -0.12 2610 -0.12 2710 -0.12 2811 -0.12 2911 -0.13 3011 -0.16 3112 -0.19 3212 -0.24 3312 -0.31 3413 -0.43 3513 -0.61 freq/hz res/dbm0 201 -0.09 301 -0.13 402 -0.16 502 -0.15 602 -0.13 703 -0.12 803 -0.11 903 -0.10 1004 -0.10 1104 -0.10 1205 -0.11 1305 -0.11 1405 -0.12 1506 -0.14 1606 -0.15 1706 -0.15 1807 -0.16 1907 -0.16 2008 -0.16 2108 -0.16 1
semiconductor group 543 application notes ii figure 10 freq/hz res/dbm0 2208 -0.29 2309 -0.28 2409 -0.26 2509 -0.25 2610 -0.24 2710 -0.25 2811 -0.27 2911 -0.28 3011 -0.32 3112 -0.37 3212 -0.44 3312 -0.58 3413 -0.69 3513 -0.89 freq/hz res/dbm0 201 -0.68 301 -0.30 402 -0.32 502 -0.30 602 -0.28 703 -0.27 803 -0.26 903 -0.25 1004 -0.26 1104 -0.27 1205 -0.28 1305 -0.28 1405 -0.30 1506 -0.31 1606 -0.32 1706 -0.33 1807 -0.32 1907 -0.32 2008 -0.32 2108 -0.30 1
semiconductor group 544 application notes ii figure 11 figure 12
semiconductor group 545 application notes ii 7correlation the same circuit has been tested for correlation between calculated and measured values with and without fuse resistors and with other specifications. we obtained a good correlation be- tween measured results and calculated results. brd spec and fuse resistor ( z f = 20 w ) results: bf3.byt psr=36 cam00=41 cam20=40 ciw0=26,f4,80 ciw0=13,c0,c1,c2,7b,19,2a,d1,2f ciw0=23,70,cb,97,51,ca,5d,01,45 ciw0=2b,70,d3,ad,4b,25,3a,1d,12 ciw0=03,21,ba,7d,8b,54,4a,ac,b2 ciw0=0b,00,b2,91,ca,12,ec,4b,b9 ciw0=18,19,19,11,19 ciw0=30,a0,cf,10,b2 sig0=80 ciw0=26,f4,78 the circuit as it is fulfills the requirement for germany of C 7 db relative level in receive direction only with the version 4 and later of sicofi (6 db attenuation are necessary). usa spec and no fuse resistor: results: pbl 3762.byt psr=36 cam00=41 cam20=40 ciw0=26,f4,80 ciw0=13,40,bc,fb,6c,12,33,cb,13 ciw0=23,70,29,77,75,19,26,07,36 ciw0=2b,f0,29,8f,7d,e8,e6,01,ce ciw0=03,32,b1,13,90,2f,e9,a3,b6 ciw0=0b,00,33,af,63,42,71,b8,ea ciw0=18,19,19,11,19 ciw0=30,71,c8,00,26 sig0=80 ciw0=26,f4,78
semiconductor group 546 application notes ii brd.spe with fuse resistor: bf3.byt figure 13 figure 14
semiconductor group 547 application notes ii usa.spe without fuse resistor: pbl 3762.byt figure 15 figure 16
semiconductor group 548 application notes iii sicofi ? application together with st slic l3000/l3030 contents page 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 549 2 software principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 549 2.1 sicofi ? software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 550 2.2 slic software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552 2.2.1 m-parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552 2.2.2 zsli - value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 55 3 sgs-thomson slic l3030 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556 3.1 high voltage part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556 3.1.1 dc-characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556 3.1.2 ac-characteristics of the st-slic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557 3.1.2.1 model without capacitor multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557 3.1.2.2 model with capacitor multiplier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 558 3.2 low voltage part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 559 3.3 digital interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 559 3.4 programming the st-slic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 562 4 calculations and results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 562 4.1 calculations on the slic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 562 4.2 format of the sicofi ? input file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 564 4.3 results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565 4.4 comparison of measurements and simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . 565 appendix appendix a: input file 'st l3030.inp' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 566 appendix b: program 'st l3030.for' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567 appendix c: spec file 'st l3030.spe' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581 appendix d: result file 'st l3030.res' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 583 appendix e: st-slic circuitry with and without the multiplier . . . . . . . . . . . . . . . . . . 589 appendix f: diagram of the measurement system . . . . . . . . . . . . . . . . . . . . . . . . . . . 591 appendix g: plots of measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 592
semiconductor group 549 application notes iii 1introduction due to the various existing technical realizations of the subscriber line interface (slic) it is necessary to write a dedicated 'slic program' for each slic type when calculating the slic parameters and simulating its transfer characteristics using e.g. the sts 2060 sicofi coeffi- cients program. this 'slic program' generates an input file for the sicofi coefficients pro- gram which in turn calculates the coefficients required for programming the sicofi peb 2060 or sicofi-2 peb 2260. this application note refers to the sgs-thomson slic l3030. besides of some information about operating the slic and the sicofi software, it contains the slic program written in fortran. in the appendix the calculated and measured transfer functions according to spec- ifications of the 'deutsche bundespost' are compared. a slic-babyboard answering these specifications has been designed by the hl it application group of siemens and is available under the name of stus 3030. this board is compatible to our sicofi-testboard stut 2060 and sicofi-2-board sipb 5135. 2 software principle the main functions of a subscriber line interface circuit (slic) are to provide the borsht functions (battery feeding, overvoltage protection, ringing, signaling, hybrid function, test- ing). in the case of a slic being used in combination with the sicofi, the hybrid function is splitted into the two-wire to four-wire junction realized by the slic, and the impedance match- ing, hybrid balancing and gain adjustment provided by the internal filters of the sicofi ( see figure 1 ). figure 1 slic-sicofi ? hardware in a similar way, the software consists of two major sections: the slic description file (.sli file) and the sicofi program.
semiconductor group 550 application notes iii figure 2 slic-sicofi ? software the other functions (such as off-hook detection, testing, standby mode, ringing) may also af- fect the speech signal, but will not be considered in the slic example described below. 2.1 sicofi ? software for modelling the slic, the complete sicofi software structure is shown in detail in figure 3 : figure 3 details of software structure
semiconductor group 551 application notes iii st l3030.inp the input file st l3030.inp contains all data of the external circuitry and, in addition, the worst case loop attenuation at the four-wire slic side. representation of numerical values is left to the user. st l3030.exe using the input file st l3030.inp, the slic program st l3030.exe calculates the transfer functions of the slic. it is written in fortran. st l3030.sli st l3030.sli is the output file of the slic program st l3030.exe. in the main part it contains a table of the m-parameters of the slic calculated in dependence of frequency. at the top of the file the external components and the worst case loop attenuation are included. auxiliary files: country.spe: country.spe is an input file to the sicofi program describing the particular customer specifications (ccitt etc ...) and measurement configuration parameters (e.g. termination im- pedance). ref.byt ref.byt is another input file to the sicofi program defining a frame into which the sicofi program can write the newly calculated coefficients together with some predefined commands (required for sending the sicofi coefficients from the peripheral board controller pbc (peb 2050) to the sicofi and to store them in a user.byt file). sicofi.ctl sicofi.ctl is the control file of the sicofi program. it contains the data controlling the opti- mization and simulation processes. the sicofi program sicofi.bat generates the sicofi coefficients and simulates the theo- retical transfer functions of the set slic + sicofi. result.res result.res is the output file of the sicofi program. it contains the coefficients for program- ming the sicofi and a list of the calculated transfer characteristics of the set slic + sicofi such as return loss, frequency response, echo return loss, etc ...
semiconductor group 552 application notes iii 2.2 slic software according to its functionality the slic operates as a three-port. to describe its electrical prop- erties five parameters are used in the sicofi program: the four mixed-matrix-parameters (m- parameters) and the attenuation of the loop z-filter/slic (zsli-value). 2.2.1 m - parameter the slic and its external circuitry may be represented as a three-port ( c.f. figure 4 ). figure 4 slic and its external circuitry as a three port i 1 , i 2 and i 3 are port currents and v 1 , v 2 and v 3 are port voltages. this circuit can be described by the following equation system: (1) i 1 = m11 v 1 + m12 v 3 + m13 i 2 (2) v 2 = m21 v 1 + m22 v 3 + m23 i 2 (3) i 3 = m31 v 1 + m32 v 3 + m33 i 2 simplifications: when the slic is connected to the sicofi, we can assume that: i 2 = 0 because of the high sicofi input impedance. (in special cases the sicofi input impedance can be included in the three-port model). i 3 is not relevant in the following calculations because the sicofi works as an ideal voltage generator. (the sicofi output impedance of about 10 w may be included in the slic model).
semiconductor group 553 application notes iii according to the above agreements the equation system can be reduced to a pair of equations containing just four m-parameters: (4) i 1 = m11 v 1 + m12 v 3 (5) v 2 = m21 v 1 + m22 v 3 these parameters m 11 , m 12 , m 21 , m 22 fully describe the slic and its external circuitry. they are defined as shown in figures 5 through 8 . ? please verify that circuits of figures 5 and 7 and of figures 6 and 8 respectively are identi- cal! figure 5 definition of slic m11-parameter
semiconductor group 554 application notes iii figure 6 definition of slic m 12 -parameter figure 7 definition of slic m 21 -parameter
semiconductor group 555 application notes iii figure 8 definition of slic m 22 -parameter 2.2.2 zsli-value zsli is the minimal attenuation (resp. maximal gain) at the slic 4-wire side (z-filter/slic loop). figure 9 definition of zsli zsli is used by the sicofi program during automatic calculation of z-filter coefficients as a reference to check for possible oscillations in the sicofi z-filter + slic loop. the value will be given in db and is expressed as attenuation: zsli = C 20 log( v 2 / v 3 ) ? please verify that as v 2 is larger than v 3 , zsli is a negative quantity. note: according to the nyquist criteria, the attenuation of the closed loop "z filter - slic" must be greater than 1 (gain < 0 db) in the frequency band 0 C 16 khz in order to avoid any oscillation.
semiconductor group 556 application notes iii 3 sgs-thomson slic l3030 the sgs-thomson slic connects the sicofi via the a,b lines to the subscriber. it has the following functions: C battery feeding C hybrid C ringing C ground-key detection C off/on-hook-detection C teletex signal injection the slic divides into two parts, a low voltage part (l3030) and a high voltage part (l3000). 3.1 high voltage part l3000 the high voltage part is connected to the line. it realizes the battery feeding and switches the ringing and the speech signals in both directions through the slic. the line current is programmable to 4 threshold values (25 ma, 30 ma, 45 ma, and 70 ma). an internal temperature sensing part shuts the line current off, when the temperature threshold is exceeded. the ringing signal is supplied by the battery on a small ac control-voltage (0.285 vrms) at pin 26. the ringing signal starts and stops when the control signal crosses ze- ro. the control signal is amplified and fed in balanced mode to the line with a superimposed dc voltage of 22 v. 3.1.1 dc characteristics in conversation mode the slic can work in normal battery or boost battery mode; with bit 3 of the signaling byte it is also possible to select the polarity of the dc line voltage. these pos- sibilities have no influence on the transfer functions. in all these states the slic may operate as current generator, standard feeding system or as low impedance system. a) current generator in this case the impedance of the slic is very high (> 20 k w ) and the slic can supply currents of 25 ma, 30 ma, 45 ma, or 70 ma. b) standard feeding system in this case the characteristic is equal to a C 48 v battery in series with two resistors, the values of which are set by external components. c) low impedance system in this case the battery voltage is reduced to 33 v and the series resistors are reduced, too. with 'boost battery' this region cannot be reached. these three working ranges are shown in figure 10 below; the dc characteristic is selected by the resistor r dc .
semiconductor group 557 application notes iii r dc = 2 ( r fs C r p1 ) with r p1 = r p2 figure 10 dc characteristics i lim = 25/30/45/70 ma the resistor r dc is to be used only in sections 1 and 2, and is infinite in section 3. the value of r dc influences also the internal block called k ('kernel'). in sections 2 and 3 the value of k equals k = 4/5 and in section 1 k = 5/12. the slic program already provides these two values. you only have to put the value of r dc into the input file ( see section 4.1 ). 3.1.2 ac characteristics of the st-slic the st-slic needs a large capacitance to block the dc from the 4-wire side of the slic. to save space and cost, the st has a built-in capacitance multiplier. thus the user requires just two small capacitors and a single resistor. 3.1.2.1model without capacitor multiplier when not using the capacitor multiplier the customer needs only c ac1 and a connection be- tween pins 7 and 14. the value of the (external) capacitor c ac1 is 47 m f.
semiconductor group 558 application notes iii figure 11 circuit diagram of the st-slic note: k is dependent on the value r dc ( see section 3.1.1 ) 3.1.2.2model with capacitor multiplier when using the capacitor multiplier you need c ac1 , c ac2 and r r . the connection between pins 7 and 14 is shut off. the values used on the slic babyboard stus 3030 are: c ac1 = 1 m f c ac2 = 1 m f r r = 50 k w with the above values the effective capacitance (to be used by the slic program) is 22 m f (see application note of st-slic. C in the slic model of figure 11 no multiplier is used).
semiconductor group 559 application notes iii 3.2 low voltage part l3030 the low voltage part controls the high voltage part l3000 in giving the proper information for setting line feed characteristics and injecting ringing and ttx signals. an on-chip digital inter- face (see below) allows to control all these operations. the l3030 defines working states of the line interface and also informs the controller via the sld-bus about the line status. 3.3 digital interface the digital interface has 5 pins: e/aread/write command ncschip select diodata input/output dclkclock signal cichanging ncs signal from input to output: in serial mode ncs is an input in parallel mode ncs is an output the digital interface is connected via a discrete logic to the sld-interface. the digital interface may work in serial or parallel mode. the interface works in serial mode by connecting pin 21 to ground. only in this mode all fea- tures of the slic (power-down, ringing, teletex signal, current setting) are available. because the timing of the st-slic is different from that of the sicofi, these two devices have to be connected via a discrete logic. a 3.3 k w resistor is inserted between the sip-pin of the sicofi and the sip-wire, because the slic sends its last data when the sicofi sends data too. ci of the slic must be fixed to ground because ncs is only an input. dio is connected to the sip-wire. all other interface pins are connected to the discrete logic. figure 12 shows a block diagram of an analog line card supplying 16 subscribers using the st-slic together with sicofi, pbc and discrete logic. you can find the circuit diagram of the discrete logic in figure 13 . the parallel mode is chosen when a voltage higher than 4 v is put to pin 21. the slic of the slic babyboard stus 3030 can work both with the serial interface or with the parallel interface. the serial interface, however, works only in connection with the sicofi testboard stut 2060, because the discrete logic needs a signal 'sigs' from the pbc. on the other hand, if the sicofi-2 board sipb 5135 is used, the board works only with the parallel interface. it is selected by two jumpers ( not shown in figures 12 and 13 ).
semiconductor group 560 application notes iii figure 12 block diagram of an analog line card supplying 16 subscribers
semiconductor group 561 application notes iii figure 13 discrete logic for 16 subscribers
semiconductor group 562 application notes iii 3.4 programming the st-slic the serial input port of the slic is connected to the sip-lines of the peripheral board control- ler (pbc) peb 2050 and sicofi. the discrete logic generates a chip select signal for the slic when the signaling byte is sent on the line. in this case the customer can use the signaling byte to program the slic. attention: be aware of rotating the bit sequence of the signaling byte, because the pbc starts sending bit 7 ahead while the slic needs at first bit 0. for example: sig0 = 80 power-up and line current i = 25 ma sig0 = 81 power-up and line current i = 30 ma sig0 = 82 power-up and line current i = 70 ma sig0 = 83 power-up and line current i = 45 ma you have to program the scr register of the pbc to generate a signal at the sigs-pin of the pbc. with this signal the discrete logic creates a chip select signal for the particular slic: slic-a scr = 90 slic-b scr = 50 note : with a single pbc just two slics are to be controlled. 4 calculations and results 4.1 calculations on the slic the slic program requires an input file containing the values of the external circuitry for cal- culating the m-parameters which are written to a slic-file. this serves as an input file to the sicofi program and thus you are able to calculate the sicofi coefficients. in receive direction the slic amplifiers the incoming signal and therefore it must be attenuated by the sicofi. because the required attenuation (> 12 db) exceedes the possibilities of the sicofi at its digital side, you need a voltage divider in receive direction or the analog attenu- ation of the sicofi must be preset to 6 db (agr = 01). the st-slic has several external components: z a slic impedance balancing network z b line impedance balancing network z ac , c ac1 , ) dc feeding system, ac blocking and r dc , r pc ) impedance matching r ref bias resistance c int time constant
semiconductor group 563 application notes iii you do not need the z a -network!! set z b to 10 k w and let the b-filter of the sicofi make the balancing. the components r ref and c int do not influence the transfer functions and hence may be ne- glected. all other components are to be gathered into the input file. the capacitor c ac1 is taken with its actual value when the multiplier is not used; when the multiplier is used, a value of 22 m f has to be used in the input file. the calculated m-parameters are: m11 = 1/ z ml m12 = 2 ar/ z ml m21 = ax m22 = 2 ax + ar z b / ( z a + z b ) z ml = ( r dc + r pc ) (1+ jw c r dc ) (( z ac r pc )/( r dc + r pc ))/ (1+ jw c r dc )
semiconductor group 564 application notes iii 4.2 format of the sicofi ? input file the slic program writes a table to the output file st l3030.sli. this output is the sicofi in- put file. an example of this file is listed below: * st slic l3030 * vor = .50000 rir = .10000e+06 ckr = .00000 * vox = 1.0000 rix = 10000. ckx = .10000e-05 * rp1za .00000 rp1a = .00000 rp1p = .00000 * rp2za .00000 rp2a = .00000 rp2b = .00000 * cp1za .00000 cp1a = .00000 cp1b = .00000 * cp2za .00000 cp2a = .00000 cp2b = .00000 * rszac 500.00 rsa = .50000e+08 rsb = 100000 * cszac .00000 csa = .00000 csb = .00000 * rpc = 100.00 rdc = 300.00 cac = .22000e-04 * ccomp .68000e-07 zsli 1.0000 m11-table 10.000000000000000 2.265894e-03 -3.723228e-04 20.000000000000000 1.991187e-03 -4.019077e-04 30.000000000000000 1.849926e-03 -3.384906e-04 . . . 3980.000000000000000 1.827491e-03 1.151429e-03 3990.000000000000000 1.828295e-03 1.154225e-03 m12-table 10.000000000000000 2.265894e-03 -3.723228e-04 20.000000000000000 1.991187e-03 -4.019077e-04 30.000000000000000 1.849926e-03 -3.384906e-04 . . . 3980.000000000000000 1.827491e-03 1.151429e-03 3990.000000000000000 1.828295e-03 1.154225e-03 m21-table 10.000000000000000 2.830432e-01 4.504772e-01 20.000000000000000 1.122734e-01 4.872317e-01 30.000000000000000 1.803674e-01 4.139977e-01 . . . 3980.000000000000000 9.999840e-01 3.998804e-03 3990.000000000000000 9.999841e-01 3.988782e-03 m22-table 10.000000000000000 5.659732e-05 9.007743e-05 20.000000000000000 1.224302e-04 9.742685e-05 30.000000000000000 1.560423e-04 8.278299e-05 . . . 3980.000000000000000 1.999568e-04 7.996009e-07 3990.000000000000000 1.999568e-04 7.975970e-07
semiconductor group 565 application notes iii the leading comment lines (beginning with "*") document which slic is used. the first column of the m-parameter tables indicates the frequency value, from 10 to 3990 hz in steps of 10 hz. the second and the third columns give the real and imaginary part values respectively. when modifying the .slic-file please note that these three values are separated by at least a single space character; every real number must contain a decimal point (fortran "real" format). 4.3 results the slic was calculated using the parameters 'st l3030.sli' of the slic program (st l3030.exe) in st l3030.inp, and coefficients were calculated. the result file of the sicofi program was stored in 'st l3030.res' and the calculated programming bytes in 'st l3030.byt'. with these bytes the sicofi has been programmed and measurements have been taken with a "pcm4" of wandel & goltermann, using the slic board pluged into the stut 2060 test board as shown in appendix d. the measurements comprise the levels in transmit direction (ad) and in receive direction (da), the attenuation distortion (ad and da), the transhybrid loss (dd), and the 2-wire impedance return loss. the plots of measurements can be found in appendix e. the plot masks correspond to ccitt recommendations g.712 and g.714. 4.4 comparison of measurements and simulations measurements have been taken on a slic l3030 including the capacitance multiplier. in gen- eral the measurements conform with the calculations within small differences. only the high attenuation of calculated echo return loss could not be reached experimentally.
semiconductor group 566 application notes iii appendix a: input file 'st l3030.inp' vor= 0.5 rir= 100.e03 ckr= 0. vox= 1.0 rix= 10000. ckx= 1.0e-06 rp1zac= 0. rp2zac= 0. cp1zac= 0.0 cp2zac= 0. rszac= 500. cszac= 0. rp1a= 0. rp2a= 0. cp1a= 0. cp2a= 0. rsa= 50.e06 csa= 0. rp1b= 0. rp2b= 0. cp1b= 0. cp2b= 0. rsb= 10000. csb= 0. rpc= 100.
semiconductor group 567 application notes iii rdc= 300. cac= 22.e-06 ccomp 68.0e-09 zsli= 1 appendix b: program 'st l3030.for' c################################################################### # c program sgs c 08.06.90 udo stueting c################################################################### # implicit logical (a-k,m-z),character (l) * integer in,out,i character*14 buff1,buff2*7,buff3*7,buf4*7,buf5*7 character*7 buf6,buf7*7,buf8*7,buf9*7,buf2*12,buf3*12 character*7 buf10*7,buf11*7,buf12*7,buf13*7,buf14*7,buf15*7 character*7 buf16*7,buf17*7,buf18*7,buf19*7,buf20*7,buf21*7 character*7 buf22*7,buf23*7,buf24*7,buf25*7,buf26*7,buf 27*7 character*7 buf28*7,buf29*7,buf30*7,buf31*7 character buf1*12,fileout*12,answ*1,infile*12 real*8 freq real*8 vor,rir,ckr,vox,rix,ckx,pi2,zsli real*8 p1a,rp2a,cp1a,cp2a,rsa,csa,rp1b,rp2b,cp1b,cp2b,rsb,csb real*8 rp1zac,rp2zac,cp1zac,cp2zac,rszac,cszac real*8 rpc,rdc,cac,ccomp,rgttx complex*8 m11,m12,m21,m22,z,za,zb,zac,zml,ax,ar,zm,ttx * common /arc/ rir,ckr,vor common /axc/ rix,ckx,vox common /pi2c/ pi2 common /sgsc/ rpc,rdc,cac,ccomp common /zacc/rp1zac,rp2zac,cp1zac,cp2zac,rszac,cszac common /zac/ rp1a,rp2a,cp1a,cp2a,rsa,csa common /zbc/ rp1b,rp2b,cp1b,cp2b,rsb,csb c only for ttx-filter (pin 34 of l3030) common /ttxc/ rgttx c c******************************************************************* c initialization part c*******************************************************************
semiconductor group 568 application notes iii c data buff1/'* st slic l3030 '/ data buf2/'* vor ='/,buf3/' rir ='/,buf4/' ckr ='/ data buf5/'* vox ='/,buf6/' rix ='/,buf7/' ckx ='/ data buf8/'* rp1zac ='/,buf9/' rp1a ='/buf10/' rp1b ='/ data buf11/'* rp2zac ='/,buf12/' rp2a ='/buf13/' rp2b ='/ data buf14/'* cp1zac ='/,buf15/' cp1a ='/buf16/' cp1b ='/ data buf17/'* cp2zac ='/,buf18/' cp2a ='/buf19/' cp2b ='/ data buf20/'* rszac ='/,buf21/' rsa ='/buf22/' rsb ='/ data buf28/'* cszac ='/,buf29/' csa ='/buf30/' csb ='/ data buf23/'* rpc ='/,buf24/' rdc ='/buf25/' cac ='/ data buf27/'* ccomp ='/ c only for ttx-filter (pin 34 of l3030) c data buf27/'* ccomp =',buf31/'rgttx ='/ data buf26/' zsli ='/ * out = 6 in = 5 pi2 = 4.*dasin(1.d0) fileout = ' ' write(out,'(a)') & ' enter input file name(xxxxxxxx.inp): ' 10 read (in,'(a)') infile if (index(infile,' ').eq.1 & .or.(index(infile,'.inp').eq.0 & .and.index(infile,'.inp').eq.0)) then write (out,'(a)') ' enter correct input file name: ' infile=' ' goto 10 endif write (out,'(a)') ' enter output file name (xxxxxxxx.sli): ' 20 read (in,'(a)') fileout if (index(fileout,' ').eq.1) then write (out,'(a)') & 'enter correct output file name (with extention .sli): ' fileout=' ' goto 20 endif open (30, file=fileout, err=1000, status= 'unknown') open (10, file=infile, err=1100, status= 'old') read(10,'(a)') write(6,*) 'reading input file' read(10,*) vor read(10,'(a)') read(10,*) rir read(10,'(a)') read(10,*) ckr read(10,'(a)') read(10,*) vox read(10,'(a)') read(10,*) rix read(10,'(a)') read(10,*) ckx read(10,'(a)') read(10,*) rp1zac
semiconductor group 569 application notes iii read(10,'(a)') read(10,*) rp2zac read(10,'(a)') read(10,*) cp1zac read(10,'(a)') read(10,*) cp2zac read(10,'(a)') read(10,*) rszac read(10,'(a)') read(10,*) cszac read(10,'(a)') read(10,*) rp1a read(10,'(a)') read(10,*) rp2a read(10,'(a)') read(10,*) cp1a read(10,'(a)') read(10,*) cp2a read(10,'(a)') read(10,*) rsa read(10,'(a)') read(10,*) csa read(10,'(a)') read(10,*) rp1b read(10,'(a)') read(10,*) rp2b read(10,'(a)') read(10,*) cp1b read(10,'(a)') read(10,*) cp2b read(10,'(a)') read(10,*) rsb read(10,'(a)') read(10,*) csb read(10,'(a)') read(10,*) rpc read(10,'(a)') read(10,*) rdc read(10,'(a)') read(10,*) cac read(10,'(a)') read(10,*) ccomp read(10,'(a)') c only for ttx-filter (pin 34 of l3030) c read(10,*) rgttx c read(10,'(a)') read(10,*) zsli close (10)
semiconductor group 570 application notes iii c c******************************************************************* c documentation part c******************************************************************* c write (30,'(a)') buff1 write (buff1,'(g12.5)') vor write (buff2,'(g12.5)') rir write (buff3,'(g12.5)') ckr write (30,'(a)') buf2//buff1//buf3//buff2//buf4//buff3 write (buff1,'(g12.5)') vox write (buff2,'(g12.5)') rix write (buff3,'(g12.5)') ckx write (30,'(a)') buf5//buff1//buf6//buff2//buf7//buff3 write (buff1,'(g12.5)') rp1zac write (buff2,'(g12.5)') rp1a write (buff3,'(g12.5)') rp1b write (30,'(a)') buf8//buff1//buf9//buff2//buf10//buff3 write (buff1,'(g12.5)') rp2zac write (buff2,'(g12.5)') rp2a write (buff3,'(g12.5)') rp2b write (30,'(a)') buf11//buff1//buf12//buff2//buf13//buff3 write (buff1,'(g12.5)') cp1zac write (buff2,'(g12.5)') cp1a write (buff3,'(g12.5)') cp1b write (30,'(a)') buf14//buff1//buf15//buff2//buf16//buff3 write (buff1,'(g12.5)') cp2zac write (buff2,'(g12.5)') cp2a write (buff3,'(g12.5)') cp2b write (30,'(a)') buf17//buff1//buf18//buff2//buf19//buff3 write (buff1,'(g12.5)') rszac write (buff2,'(g12.5)') rsa write (buff3,'(g12.5)') rsb write (30,'(a)') buf20//buff1//buf21//buff2//buf22//buff3 write (buff1,'(g12.5)') cszac write (buff2,'(g12.5)') csa write (buff3,'(g12.5)') csb write (30,'(a)') buf28//buff1//buf29//buff2//buf30//buff3 write (buff1,'(g12.5)') rpc write (buff2,'(g12.5)') rdc write (buff3,'(g12.5)') cac write (30,'(a)') buf23//buff1//buf24//buff2//buf25//buff3 write (buff1,'(g12.5)') ccomp write (30,'(a)') buf27//buff1 c only for ttx-filter (pin 34 of l3030) c write (buff2,'(g12.5)') rgttx c write (30,'(a)') buf27//buff1//buf31//buff2 write (30,'(a)') 'zsli' write (30,'(g12.5)') zsli c
semiconductor group 571 application notes iii c c******************************************************************* c calculation part c******************************************************************* c c m11 = 1. / zml c zm = cmplx(1.,0.) write (out,*) ' running m11 calculation...' write (30,'(a)') 'm11-table' do 100 i=1,399 freq = dble(i*10) call yzml(freq,zml) m11 = zm / zml write (30,*) freq,real(m11),aimag(m11) 100 continue c c m12 = 2.0*ar/zml c write (out,*) ' running m12 calculation...' write (30,'(a)') 'm12-table' do 110 i=1,399 freq = dble(i*10) call arw(freq,ar) call yzml(freq,zml) m12 = 2. * ar / zml write (30,*) freq,real(m12),aimag(m12) 110 continue c c m21 = ax * ttx c write (out,*) ' running m21 calculation...' write (30,'(a)') 'm21-table' do 120 i=1,399 freq = dble(i*10) call axw(freq,ax) call ttxw(freq,ttx) m21 = ax * ttx write (30,*) freq,real(m21),aimag(m21) 120 continue c c m22 = 2*ax*ttx*ar*(zb/(za+zb)) c write (out,*) ' running m22 calculation...' write (30,'(a)') 'm22-table' do 130 i=1,399 freq = dble(i*10) call axw(freq,ax) call arw(freq,ar) call yza(freq,za) call yzb(freq,zb) call ttxw(freq,ttx) m22 = 2. * ax * ar * ttx z = zb / (za+zb) m22 = m22 * z write (30,*) freq,real(m22),aimag(m22)
semiconductor group 572 application notes iii 130 continue write(30,'(a1)') ';' close (30) write(out,'(a)') ' data written in file: '//fileout stop 1000 write(out,'(a)') ' open error at output-file: '//fileout stop 1 1100 write(out,'(a)') ' open error at input-file: '//infile stop 2 end
semiconductor group 573 application notes iii c c################################################################## c subroutine arw(freq,ar) c c################################################################## c c name of subroutine: arw c c formal parameter list: freq,ar c c input parameters: c freq (double) c c output parameters: c arw (double) array 2 c c task of this routine: vor*jwrir*ckr/(1.+jwrir*ckr)c c c################################################################## c implicit logical (a-k,m-z),character (l) * real*8 freq,rir,ckr,vor,omp,pi2 complex ar,v1,v2 * common /arc/ rir,ckr,vor common /pi2c/ pi2 * ar = cmplx(1.,0.) if (ckr.eq.0) then goto 10 else omp = pi2*freq*rir*ckr v1 = cmplx(0.,omp) v2 = cmplx(1.d0,omp) ar = v1 / v2 endif 10 ar = ar*vor return end
semiconductor group 574 application notes iii c c################################################################# c subroutine axw(freq,ax) c c################################################################# c c name of subroutine: axw c c formal parameter list: freq,ax c c input parameters: c freq (double) c c output parameters: c ax (double) array 2 c c task of this routine: c c################################################################# c implicit logical (a-k,m-z),character (l) * real*8 freq,rix,ckx,vox,omp,pi2 complex ax,v1,v2 * common /axc/ rix,ckx,vox common /pi2c/ pi2 * ax = cmplx(1.,0.) if (ckx.eq.0) then goto 10 else omp = pi2*freq*rix*ckx v1 = cmplx(0.,omp) v2 = cmplx(1.d0,omp) ax = v1 / v2 endif 10 ax = ax*vox return end
semiconductor group 575 application notes iii c c################################################################# c subroutine yzml(freq,zml) c c################################################################# c c name of subroutine: yzml c c formal parameter list: freq c c input parameters: c c output parameters: c c common blocks: c c task of this routine: c c required subroutines: c c required functions: c c routine called in the following subroutines or functions: c c################################################################# c implicit logical (a-k,m-z),character (l) real*8 freq,rpc,ccomp real*8 rp1zac,rp2zac,cp1zac,cp2zac,rszac,cszac real*8 rdc,cac,pi2 complex zac,zml,zmlz,zmln,zml1,xc * common /pi2c/ pi2 common /sgsc/ rpc,rdc,cac,ccomp common /zacc/rp1zac,rp2zac,cp1zac,cp2zac,rszac,cszac * call imped6(rp1zac,rp2zac,cp1zac,cp2zac,rszac,cszac,freq,zac) if (ccomp.eq.0) then goto 10 else xc = cmplx(0.,( -1./(pi2*freq*ccomp))) zml = zac * xc zmlz= zac + xc zac = zml / zmlz end if 10 zmlz = zac + rpc zmln = rpc + rdc zml1 = zmlz / zmln zml = cmplx(0.,(pi2 *freq*cac*rdc))
semiconductor group 576 application notes iii zml = zml1 * zml zml = 1 + zml zmlz = zmln * zml zmln = cmplx(1.,(pi2*freq*cac*rdc)) zml = zmlz / zmln return end c c############################################################## c subroutine yza(freq,za) c c############################################################## c c name of subroutine: yza c c formal parameter list: freq c c input parameters: c c output parameters: c c common blocks: c c task of this routine: c c required subroutines: c c required functions: c c routine called in the following subroutines or functions: c c############################################################## c implicit logical (a-k,m-z),character (l) real*8 freq real*8 rp1a,rp2a,cp1a,cp2a,rsa,csa complex za * common /zac/ rp1a,rp2a,cp1a,cp2a,rsa,csa * call imped6(rp1a,rp2a,cp1a,cp2a,rsa,csa,freq,za) return end
semiconductor group 577 application notes iii c c############################################################## c subroutine yzb(freq,zb) c c############################################################## c c name of subroutine: yzb c c formal parameter list: freq c c input parameters: c c output parameters: c c common blocks: c c task of this routine: c c required subroutines: c c required functions: c c routine called in the following subroutines or functions: c c############################################################## c implicit logical (a-k,m-z),character (l) real*8 freq real*8 rp1b,rp2b,cp1b,cp2b,rsb,csb complex zb * common /zbc/rp1b,rp2b,cp1b,cp2b,rsb,csb * call imped6(rp1b,rp2b,cp1b,cp2b,rsb,csb,freq,zb) return end c c############################################################## c subroutine ttxw(freq,ttx) c c############################################################## c c name of subroutine: ttxw c c this subroutine calculates the transfer function of the c ttx-filter at pin 34 and pin 35. c c formal parameter list: freq,ttx
semiconductor group 578 application notes iii c c input parameters: c freq (double) c c output parameters: c ttx (complex) c c task of this routine: c c############################################################## c implicit logical (a-k,m-z),character (l) * real*8 freq,rgttx,omp,pi2 complex ttx * common /ttxc/ rgttx common /pi2c/ pi2 * omp = freq * pi2 ttx = cmplx(1.,0.) return end c c#############################################################c c### ###c subroutine imped6(rp1,rp2,cp1,cp2,rs,cs,freq,zeq) c### ###c c### modification klaus kliese 27.08.89 ###c c### ###c c### note: when a parameter is set to 0 then the ###c c### corresponding resistor or capacitance does not ###c c### exist ###c c### ###c c### formal parameter list:rp1,rp2,cp1,cp2,rs,cs,freq,zeq ###c c### ###c c### input parameters: ###c c### rs [ real ] ; series resistance ###c c### cs [ real ] ; series capacitance ###c c### rp1 [ real ] ; parallel resistance ###c c### rp2 [ real ] ; parallel resistance ###c c### cp1 [ real ] ; parallel capacitance ###c c### cp2 [ real ] ; parallel capacitance ###c c### freq [ real ] ; frequency ###c
semiconductor group 579 application notes iii c### output parameters: ###c c### zeq [ complex ] ###c c### ###c c### common blocks: qpi2 ###c c### ###c c### task of this routine: equivalent impedance of: ###c c### special cases: ###c c### a. system parallel ###c c### 1. cp1 not 0 ###c c### 2. cp1 =0 ###c c### ## # c### ## # c### ## # c### ## # c### ## # c### ###c c### 1.1 rp1 not 0 ## # c### ## # c### ## # c### ## # c### ## # c### ## # c### ## # c### 1.2 rp1 not 0 ## # c### ## # c### ## # c### ## # c### ## # c### ###c c### 2.1 rp1 not 0 ## # c### ## # c### ## # c### ## # c### ## # c### ## # c### 2.2 rp1 =0 ## # c### ## # c### ## # c### ## # c### 3. idem if cp2 = 0 ## # c### ## # c### 4. rp2 =0 and rp1 =0 ## # c### ## # c### ## # c### ## # c### ## # c### ## # c### 5. cp2 =0 and cp1 =0 ## # c### ## # c### ## # c### ## # c### ## # c### ###c
semiconductor group 580 application notes iii real*8 cp1,cp2,rp1,rp2 real*8 cs,rs,n,ul real*8 freq,pi2,omega complex d,c,zeq,za,zb * common /pi2c/ pi2 * omega = pi2*freq if (cp1.eq.0) then c=cmplx(rp1,0.) else ckl 26.7.89 c = rp1 + 1 / j*omega*cp1 c = rp1 + (1. / cmplx(0.,omega*cp1)) endif if (cp2.eq.0) then d=cmplx(rp2,0.) else ckl 26.7.89 d = rp2 + 1 / j*omega*cp2 d = rp2 + (1. / cmplx(0.,omega*cp2)) endif n = cabs(c) ul = cabs(d) * if one of them is 0 then no parallel calculation if ((n.eq.0).or.(ul.eq.0)) then za=c+d else * za = c & d in parallel za=c*d/(c+d) endif c system series if (cs .eq.0) then zb=cmplx(rs,0.) else zb = rs +( 1. / cmplx(0.,omega*cs)) endif c both zeq=za+zb return end c c#############################################################c c### b.system series ###c c### 1. cs = 0 ###c c### ###c c### 1. rs = 0 ###c c### ###c c### idem system a ###c c### ###c c### c.conclusion: zeq = sum of the two ###c c### systems in any case ###c c### ###c c############################################################ #c
semiconductor group 581 application notes iii appendix c: spec file 'st l3030.spe' this specification file contains the specifications of the 'deutsche bundespost'. fref = 1014.0 law = a vref= 0.9480 rlx = 0. rlr = -7.0 abimp = zi zlrp1= 820. zlcp1= 0. zlrp2= 0. zlcp2= 0.115e-06 zlrs = 220. zlcs = 0. zirp1= 820. zicp1= 0. zirp2= 0. zicp2= 0.115e-06 zirs = 220. zics = 0. z3rp1= 820. z3cp1= 0. z3rp2= 0. z3cp2= 0.115e-06 z3rs = 220. z3cs = 0. zrrp1= 820. zrcp1= 0. zrrp2= 0. zrcp2= 0.115e-06 zrrs = 220. zrcs = 0. zre fr 300 500 3k 3.4k at- 0 20 20 16 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0
semiconductor group 582 application notes iii ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 583 application notes iii appendix d: result file 'st l3030.res' input file name: st l3030.ctl date: 08.06.90 14:18 spec = l3030.spe slic = st l3030.sli byte =ref.byt chnr = 0,a plq = n on = all version = 4.4 short = n opt = z+x+r+b zxrb = nnnn rel = y zauto = y zrep = n zsign = 1 fz = 300.00 3400.0 zlim = 2.00 fr = 300.00 3200.0 rdisp = y rrefq = n rref = 3.1501 fx = 300.00 3400.0 xdisp = y xrefq = n xref = -.50486 bauto = y brep = n bsign = 1 fb = 300.00 3400.0 blim = 2.00 bdf = 1 apre = .00 dpre = .00 apof = .00 dpof = .00 agx = 00 agr = 00 tm3 = 000 xzq = -.39062500e+00 -.17639160e-01 .93505860e-01 .38574220e-01 -.11328130e+00 xrq = .81250000e+00 -.19140630e-00 -.41503910e-02 -.85449220e-02 .48828130e-02 xxq = .10317380e+01 .33691410e-01 -.48828130e-02 -.61035160e-02 .12207030e-03 xbq = -.13671880e+00 -.32812500e+00 -.32031250e+00 .69580080e-02 .44921880e-01 -.11132810e+00 -.17333980e-01 .92773440e-01 -.95703130e-01 .44921880e-01 xgq = .52001950e+00 .16406250e+01 ; bytes for z-filter (13): b0,1c,25,4c,f1,3e,95,ba bytes for r-filter (2b): 70,1a,4f,f1,c9,aa,0c,1b bytes for x-filter (23): 70,e8,af,fb,1a,45,02,65 bytes for gain-factors (30): 51,32,10,32 2nd part of bytes b-filter (0b): 00,15,bb,ca,14,ed,b3,bb 1st part of bytes b-filter (03): 5b,b1,b7,ab,32,2a,b2,14 bytes for b-filter delay (18): 19,19,11,19 * st slic l3030 * vor = .50000 rir = .10000e+06 ckr = .00000 * vox = 1.0000 rix = 10000. ckx = .10000e-05 * rp1za .00000 rp1a = .00000 rp1b = .00000 * rp2za .00000 rp2a = .00000 rp2b = .00000 * cp1za .00000 cp1a = .00000 cp1b = .00000 * cp2za .00000 cp2a = .00000 cp2b = .00000 * rszac 500.00 rsa = .50000e+08 rsb = 10000. * cszac .00000 csa = .00000 csb = .00000 * rpc = 100.00 rdc = 300.00 cac = .22000e-04 * ccomp .68000e-07
semiconductor group 584 application notes iii run # 2 z-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: xz = -.39571 -.01763 .09355 .03834 -.11305 xzq = -.39063 -.01764 .09351 .03857 -.11328 bytes for z-filter (13): b0,1c,25,4c,f1,3e,95,ba return loss freq loss freq loss (hz) (db) (hz) (db) 100. 20.369 2000. 32.299 200. 25.997 2100. 33.062 300. 28.913 2200. 33.919 400. 30.415 2300. 34.819 500. 31.014 2400. 35.642 600. 31.082 2500. 36.164 700. 30.892 2600. 36.116 800. 30.612 2700. 35.400 900. 30.333 2800. 34.186 1000. 30.099 2900. 32.743 1100. 29.932 3000. 31.265 1200. 29.841 3100. 29.845 1300. 29.832 3200. 28.519 1400. 29.906 3300. 27.295 1500. 30.067 3400. 26.168 1600. 30.316 3500. 25.131 1700. 30.659 3600. 24.175 1800. 31.100 3700. 23.292 1900. 31.645 3800. 22.476 min. z-loop reserve: 6.834 db at frequency: 7500.0 hz min. z-loop mirror reserve: 10.725 db at frequency: 7000.0 hz run # 2 x-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: xx = 1.03178 .03370 -.00468 -.00613 .00014 xxq = 1.03174 .03369 -.00488 -.00610 .00012
semiconductor group 585 application notes iii bytes for x-filter (23): 70,e8,af,fb,1a,45,02,65 x-filter attenuation function (in db),(always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. -.462 .001 2000. -.320 .001 200. -.465 .001 2100. -.285 .001 300. -.470 .001 2200. -.250 -.000 400. -.476 .002 2300. -.215 -.001 500. -.482 .002 2400. -.181 -.002 600. -.489 .003 2500. -.149 -.003 700. -.495 .003 2600. -.119 -.003 800. -.501 .003 2700. -.093 -.004 900. -.504 .004 2800. -.069 -.004 1000. -.505 .004 2900. -.049 -.004 1100. -.503 .005 3000. -.033 -.005 1200. -.498 .005 3100. -.020 -.005 1300. -.488 .005 3200. -.010 -.005 1400. -.475 .005 3300. -.003 -.004 1500. -.458 .004 3400. .001 -.004 1600. -.437 .004 3500. .004 -.004 1700. -.412 .004 3600. .005 -.004 1800. -.384 .003 3700. .006 -.003 1900. -.353 .002 3800. .006 -.003 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z agx vref/vsic xref tm3 gx .00 - .24 - .00 - 4.41 - -.50 - .00 = -4.33 ideal .03 = .24 + .00 + 4.41 + -.50 + .00 + -4.30 quant second byte for gain: ,10,32 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz tgrefca = .252 ms tgrefcb = .265 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 14.050 2.857 2000. .030 .010 200. .387 1.873 2100. .037 .015 300. .025 .625 2200. .044 .020 400. .040 .306 2300. .050 .027 500. .035 .175 2400. .056 .035 600. .026 .108 2500. .060 .044 700. .017 .069 2600. .063 .055 800. .009 .044 2700. .066 .067 900. .004 .028 2800. .069 .083 1000. -.001 .017 2900. .074 .101 1100. -.004 .010 3000. .084 .123
semiconductor group 586 application notes iii 1200. -.005 .005 3100. .101 .150 1300. -.005 .002 3200. .131 .184 1400. -.003 .001 3300. .184 .227 1500. -.001 .000 3400. .275 .285 1600. .004 .000 3500. .434 .366 1700. .009 .002 3600. .726 .486 1800. .015 .004 3700. 1.327 .682 1900. .023 .007 3800. 2.793 1.018 run # 1 r-filter calculation results reference impedance for optimization: zirp1= 820. zicp1= .000 zirp2= 0. zicp2= .115e-06 zirs = 220. zics = .000 calculated and quantized coefficients: xr = .82771 -.19100 -.00410 -.00853 .00477 xrq = .81250 -.19141 -.00415 -.00854 .00488 bytes for r-filter (2b): 70,1a,4f,f1,c9,aa,0c,1b r-filter attenuation function (in db),(always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 4.235 -.042 2000. 1.497 .009 200. 4.199 -.041 2100. 1.376 .010 300. 4.139 -.040 2200. 1.261 .010 400. 4.057 -.038 2300. 1.154 .011 500. 3.952 -.035 2400. 1.051 .011 600. 3.828 -.033 2500. .951 .011 700. 3.685 -.029 2600. .854 .012 800. 3.527 -.026 2700. .758 .012 900. 3.356 -.022 2800. .663 .013 1000. 3.176 -.018 2900. .568 .014 1100. 2.990 -.014 3000. .474 .016 1200. 2.801 -.010 3100. .382 .017 1300. 2.613 -.006 3200. .292 .019 1400. 2.429 -.002 3300. .208 .021 1500. 2.251 .001 3400. .130 .022 1600. 2.081 .003 3500. .060 .024 1700. 1.920 .005 3600. -.000 .025 1800. 1.769 .007 3700. -.049 .027 1900. 1.628 .008 3800. -.085 .027 gr results: all attenuation values (in db) refer to fref= 1014. hz -rlr slic+z agr vsic/vref rref gr 7.00 - 2.58 - .00 - -4.41 - 3.15 = 5.68 ideal 7.00 = 2.58 + .00 + -4.41 + 3.15 + 5.68 quant
semiconductor group 587 application notes iii first byte for gain (30): 51,32 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz tgref ca = .198 ms tgref cb = .181 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. .001 .021 2000. -.047 .044 200. .007 .004 2100. -.038 .050 300. .012 .001 2200. -.028 .056 400. .018 .000 2300. -.018 .063 500. .023 .000 2400. -.009 .072 600. .026 .000 2500. -.002 .082 700. .026 .001 2600. .002 .093 800. .023 .002 2700. .003 .107 900. .017 .004 2800. .003 .123 1000. .007 .006 2900. .004 .142 1100. -.004 .009 3000. .006 .166 1200. -.017 .012 3100. .017 .194 1300. -.029 .015 3200. .041 .230 1400. -.041 .019 3300. .090 .274 1500. -.050 .022 3400. .181 .334 1600. -.056 .026 3500. .344 .416 1700. -.059 .030 3600. .648 .537 1800. -.058 .034 3700. 1.269 .734 1900. -.054 .039 3800. 2.763 1.071 run # 1 b-filter calculation results reference impedance for optimization: zlrp1= 820. zlcp1= .000 zlrp2= 0. zlcp2=.115e-06 zlrs = 220. zlcs = .000 calculated and quantized coefficients: xb = -.13494 -.33311 -.31893 .00704 .04508 -.11252 -.01736 .09255 -.09495 .04363 xbq = -.13672 -.32813 -.32031 .00696 .04492 -.11133 -.01733 .09277 -.09570 .04492 2nd part of bytes b-filter (0b): 00,15,bb,ca,14,ed,b3,bb 1st part of bytes b-filter (03): 5b,b1,b7,ab,32,2a,b2,14
semiconductor group 588 application notes iii trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 36.403 2000. 40.457 200. 30.116 2100. 39.753 300. 35.631 2200. 39.660 400. 42.346 2300. 40.188 500. 51.099 2400. 41.450 600. 47.859 2500. 43.748 700. 43.555 2600. 47.934 800. 41.444 2700. 57.305 900. 40.490 2800. 52.729 1000. 40.317 2900. 45.637 1100. 40.812 3000. 42.064 1200. 42.009 3100. 40.071 1300. 44.100 3200. 39.144 1400. 47.594 3300. 39.136 1500. 53.580 3400. 39.925 1600. 54.406 3500. 40.684 1700. 48.018 3600. 39.299 1800. 44.185 3700. 36.517 1900. 41.856 3800. 35.495 additional b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 589 application notes iii appendix e: figure 14 st-slic circuitry with and without the multiplier
semiconductor group 590 application notes iii figure 15 sicofi ? and st-slic connection without multiplier used
semiconductor group 591 application notes iii appendix f: figure 16 diagram of the measurement system
semiconductor group 592 application notes iii appendix g: figure 17 figure 18
semiconductor group 593 application notes iii figure 19 figure 20
semiconductor group 594 application notes iv sicofi ? application together with stm-slic l3000/l3090 contents page 1introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 595 2 hardware sicofi ? and st-slic l3090/l3000 . . . . . . . . . . . . . . . . . . . . . . . . . . 595 2.1 st-slic l3090/l3000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 595 2.2 programming the pbc, sicofi ? and st-slic . . . . . . . . . . . . . . . . . . . . . . . . . . . 598 2.3 model of the st-slic l3090/l3000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 598 3 software for st-slic l3090/l3000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 599 3.1 general slic-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 599 3.2 st-slic-parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 601 3.3 calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 2 4 comparison between calculation and measurement . . . . . . . . . . . . . . . . . . . . 603 5 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 603
semiconductor group 595 application notes iv 1 introduction this application note describes the combination of a codec filter device (sicofi) with an elec- tronic slic(st l3090/l3000) as it can be used on a line card for the connection of analog sub- scribers. this note consists of: C a general description of the st-slic l3090/l3000 C a proposal for the interconnection of sicofi and slic C a description of the model for the slic's function C a listing of fortran program to calculate slic transfer function C result of calculation and measurements generated for the requirements of the 'deutsche bundespost'. 2 hardware sicofi a and st-slic l3090/l3000 2.1 st-slic l3090/l3000 the sgs-thomson-slic (st l3090/l3000) connects the sicofi with the a,b lines to the subscriber. it has the following functions: C battery feeding C hybrid C ringing C ground key detection C off/on-hook the slic is divided into two parts, a low voltage part (l3090) and a high voltage part (l3000). the high voltage part the high voltage part is connected with the line. it realizes the battery feeding through the slic and switches the ringing signal and the speech signal in both directions. an internal temperature detection part switches the line current off, when the temperature gets to high. the high voltage part is connected to the low voltage part using 6 wires. the low voltage part the low voltage part synthesizes the dc characteristic, the ac output impedance performs the echo cancellation. some of these functions may be realized by the sicofi and therefore it is possible to reduce the number of external components.
semiconductor group 596 application notes iv the l3090 has a digital parallel interface with 5 pins. there are two output pins (ngdk and onhk). these two pins detect ground-key and off-hook. the other three pins are chip select (ncs) and two input pins (pwon and rng). the input pins can be configured to operate in four modes: power-down the slic presents a high impedance to the line and does not supply current. standby the slic is able to supply current to the line (limited to 12 ma) and to recognize the off-hook condition. conversation the slic supplies the line and is able to detect both the off-hook and ground key conditions. the dc characteristic shown to the line is divided into two regions: C current limiting region; the limiting level can be choosen between 4 and 62 ma applying a logical level at pin 24 of l3090 (note that this pin is not latched by ncs-signal) C standard feeding region; the characteristic region is equivalent to a voltage generator with a series resistance, the value of which is defind by an external component. ringing the slic injects a balanced ringing signal to the line with an amplitude of 60 vrms with a superimposed dc voltage of 22 v. the ringing signal is produced by the battery and a small ac-voltage (1.5 vrms) at pin 14 of l3090 (connected via a capacitor 1 m f to sicofi vout). the ringing signal starts and stops when the signal crosses zero.
semiconductor group 597 application notes iv figure 1 sicofi a and st slic l3090/l3000
semiconductor group 598 application notes iv 2.2 programming the pbc, sicofi ? and st-slic l3090/l3000 the st-slic l3090/l3000 can be controlled through the sicofi ( see figure 1 ), setting prop- erly its parallel interface. for example: sig0 = a0 conversation with i lim = 42 ma sig0 = 40 power down the line status (off-hook/ground-key) can be read through the sicofi ( see figure 1 ). for example: sig0: 40 off-hook sig0: 80 ground-key 2.3 model of the st-slic l3090/l3000 the st-slic has some external components: z a slic impedance balancing network z b line impedance balancing network z iac c lac dc feeding system and ac r d impedance adjustment r pc the value of r d depends on the dc characteristic region. figure 2 r d is only used in part 1 infinite in part 2 the value of the impedance r d has to be written into the input file.
semiconductor group 599 application notes iv 3 software for st-slic l3090/l3000 3.1 general slic-parameters to calculate the coefficients we need the mixed matrix parameters: objectives: C calculation of the mixed matrix parameters using a simplified three port model. method: C a slic is a circuit with a number of elements accessible through three ports: figure 3 i 1 , i 2 and i 3 are port currents v 1 , v 2 and v 3 are port voltages i 1 = m11 v 1 + m12 v 3 + m13 i 2 (1) v 2 = m21 v 1 + m22 v 3 + m23 i 2 (2) i 3 = m31 v 1 + m32 v 3 + m33 i 2 (3) note : description of a port: simplification of the three port model when the slic is connected to the sicofi, we can assume that: C i 2 = 0 because the input impedance of sicofi can be included in the three part model C i 3 is not relevant in the following calculations because the equation (3) is not used in the sicofi program. i 1 = m11 v 1 + m12 v 3 (4) v 2 = m21 v 1 + m22 v 3 (5)
semiconductor group 600 application notes iv the parameters m11, m12, m21 and m22 are determined as follows: figure 4 m11 = v 1 i 1 for v 3 = 0 (6) m12 = v 3 i 1 for v 1 = 0 (7) m21 = v 1 v 2 for v 3 = 0 (8) m22 = v 3 v 2 for v 1 = 0 (9)
semiconductor group 601 application notes iv 3.2 st-slic parameter the mixed matrix parameters are: re [m11] (10 C 400 hz) = (a + 4 p p f f c b b)/ (a a + 4 p p f f c c b b) re [m11] (400 C 4 khz) = (e + 4 p p f f d d r pp )/ (e e + $ p p f f d d r pp r pp ) im [m11] (10 C 400 hz) = (2 p f b (a C c))/(a a + 4 p p f f c c b b) im [m11] (400 C 4 khz) = (2 p f d (e C r pp ))/(e e + 4 p p f f r pp r pp d d) re [m12] (10 C 4 khz) = 2 (a + 4 p p f f c b b)/(a a + $ p p f f c c b b) im [m12] (10 C 4 khz) = 2 (2 p f b (a C c))/(a a + 4 p p f f c c b b) re [m21] (10 C 3 khz) = C (4 p p f f b b l c)/(a a + 4 p p f f c c b b) re [m21] (3 C 4 khz) = C (l e)/(e e + 4 p p f f h h) im [m21] (10 C 3 khz) = C (2 p f b l a)/(a a + 4 p p f f c c b b) im [m21] (3 C 4 khz) = (2 p f l h)/(e e + 4 p p f f h h) re [m22] (10 C 4 khz) = 2 (a a + 4 p p f f b b c m)/(a a + 4 p p f b b c c) C n) im [m22] (10 C 4 khz) = 2 (2 p f b a (m C c))/(a a + 4 p p f f b b c c) where: a= r d + r pp b= r d c d c= r ac / 25 + r pp d=( r ac + r pc ) c c e= r ac / 25 + r pp g= c c r pc h= c c r pp ( r ac + r pc ) l=( r ac + r pc ) / 25 m= r pp C r pc / 25 n= r a / ( r a + r b )
semiconductor group 602 application notes iv 3.3 calculation the slic has a 0 db gain in the receive direction and therefore the sicofi must attenuate the incoming signal in order to match the german specs (gr = C 7 db). because of the attenuation being too high (> 12 db) for the sicofi, either a voltage divider in receive direction is needed or the agr of the sicofi has to be programmed to 6 db analog attenuation. the slic- program is written in fortran and the user may modify this for his own slic. the program needs an input file with the values of the external circuit, and then it calculates the mixed matrix parameters and writes them into a slic-file. together with the sicofi-program you are able to calculate the sicofi coefficients. it should be noted that the two impedances z a and z b , used by the slic in order to perform the echo cancellation, can be avoided because the sicofi is able to perform such a function (in this case z b is open and z a is shorted to ground. in special cases (very high signal levels) it could be necessary to introduce two resistors as z a and z b to avoid that the tx-slic-amplifier saturates (max. tx peak voltage = 3 v). if you have no z a and z b than you are not allowed to switch a capacitor between slic and sicofi in the receive direction because the slic input need a connection to ground. figure 5 l3090/l3000 model
semiconductor group 603 application notes iv note: for an easier representation some components names were changed in respect to the names on the data sheet; in particular: r pp correspond to 2 r p r d correspond to r dc r ac correspond to z iac r pc correspond to r pc r a correspond to z l r b correspond to z b c d correspond to c lac c c correspond to c comp 4 comparison between calculation and measurement the values of the measurement conformed with the calculation. the difference between both are very small (see results of calculation and measurement in the appendix). only the high at- tenuation of calculated echo return loss (> 35 db) cannot be reached by measurement. 5 appendix on the next pages you will find the following details: C sgs-thomson-slic l3090/l3000 fortran program listing C calculated sicofi-st-slic transfer functions for the st-slic model. the values of the ex- ternal st-slic components are listed on bottom at page... note : r = 300 w input impedance of slic: 34750 w parallel with ring input. in this case: v or = 0.47 C measured sicofi-st-slic transfer functions.
semiconductor group 604 application notes iv listing of fortran program 'stl 3090.for' c**************************** top ********************************** c################################################################### c program sgs c 17.05.88 udo stueting / klaus kliese /walter rossi l 3090 c################################################################### implicit logical (a-k,m-z),character (l) * integer in,out,i character*14 buf1,buf2*7,buf3*7,buf4*7,buf5*7 character*7 buf6,buf7*7,buf8*7,buf9*7,buff2*12,buff3*12 character*7 buf10*7,buf11*7,buf12*7,buf13*7,buf14*7,buf15*7 character*7 buf16*7 character buff1*12,fileout*12,answ*1,infile*12 real*8 m11(2),m12(2),m21(2),m22(2),freq,ar(2),ax(2) real*8 vor,rir,ckr,vox,rix,ckx,pi2,zsli real*8 rpp,rd,rac,rpc,ra,rb,cd,cc real*8 na,nb,nc,nd,ne,ng,nh,nl,nm,nn * common /arc/ rir,ckr,vor common /axc/ rix,ckx,vox common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn common /rsgsc/ rpp,rd,rac,rpc,ra,rb,cd,cc common /pi2c/ pi2 c****************************************************************** c initialisation part c****************************************************************** c data buf1/'* sgs slic '/ data buf2/'* vor ='/,buf3/' rir ='/,buf4/' ckr ='/ data buf5/'* vox ='/,buf6/' rix ='/,buf7/' ckx ='/ data buf8/'* rpp ='/,buf9/' rd ='/buf10/' rac ='/ data buf11/'* rpc ='/,buf12/' ra ='/buf13/' rb ='/ data buf14/'* cd ='/,buf15/' cc ='/ data buf16/' zsli ='/ * out = 6 in = 5 pi2 = 4.*dasin(1.d0) fileout = ' ' write(out,'(a)') & ' enter input file name(xxxxxxxx.inp): ' 10 read (in,'(a)') infile if (index(infile,' ').eq.1
semiconductor group 605 application notes iv & .or.(index(infile,'.inp').eq.0 & .and.index(infile,'.inp').eq.0)) then write (out,'(a)') ' enter correct input file name: ' infile=' ' goto 10 endif write (out,'(a)') ' enter output file name (xxxxxxxx.sli): ' 20 read (in,'(a)') fileout if (index(fileout,' ').eq.1) then write (out,' (a)') & ' enter correct output file name (with extention .sli): ' fileout=' ' goto 20 endif open (30, file=fileout, err=1000, status= 'unknown') open (10, file=infile, err=1100, status= 'old') read(10,'(a)') write(6,*) 'reading input file' read(10,*) vor read(10,'(a)') read(10,*) rir read(10,'(a)') read(10,*) ckr read(10,'(a)') read(10,*) vox read(10,'(a)') read(10,*) rix read(10,'(a)') read(10,*) ckx read(10,'(a)') read(10,*) rpp read(10,'(a)') read(10,*) rd read(10,'(a)') read(10,*) rac read(10,'(a)') read(10,*) rpc read(10,'(a)') read(10,*) ra read(10,'(a)') read(10,*) rb read(10,'(a)') read(10,*) cd read(10,'(a)') read(10,*) cc read(10,'(a)') read(10,*) zsli close (10)
semiconductor group 606 application notes iv c c***************************************************************** c documentation part c***************************************************************** c write (30,'(a)') buf1 write (buff1,'(g12.5)') vor write (buff2,'(g12.5)') rir write (buff3,'(g12.5)') ckr write (30,'(a)') buf2//buff1//buf3//buff2//buf4//buff3 write (buff1,'(g12.5)') vox write (buff2,'(g12.5)') rix write (buff3,'(g12.5)') ckx write (30,'(a)') buf5//buff1//buf6//buff2//buf7//buff3 write (buff1,'(g12.5)') rpp write (buff2,'(g12.5)') rd write (buff3,'(g12.5)') rac write (30,'(a)') buf8//buff1//buf9//buff2//buf10//buff3 write (buff1,'(g12.5)') rpc write (buff2,'(g12.5)') ra write (buff3,'(g12.5)') rb write (30,'(a)') buf11//buff1//buf12//buff2//buf13//buff3 write (buff1,'(g12.5)') cd write (buff2,'(g12.5)') cc write (30,'(a)') buf14//buff1//buf15//buff2 write (30,'(a)') 'zsli' write (30,'(g12.5)') zsli c c**************************************************************** c definition l3090 c**************************************************************** c na = rd +rpp nb = rd * cd nc = (rac / 25.) + rpp nd = (rac + rpc) * cc ne = (rac / 25) + rpp ng = cc * rpc nh = cc * rpp * (rac + rpc) nl = (rac + rpc) / 25. nm = rpp - (rpc/ 25.) nn = ra / (ra + rb)
semiconductor group 607 application notes iv c c************************************************************** c calculation part c************************************************************** c l3090 c write (out,*) ' running m11 calculation...' write (30,'(a)') 'm11-table' do 100 i=1,40 freq = dble(i*10) call pm11l(freq,m11) write (30,*) freq,m11(1),m11(2) 100 continue do 101 i=41,399 freq = dble(i*10) call pm11h(freq,m11) write (30,*) freq,m11(1),m11(2) 101 continue c c m12 = c write (out,*) ' running m12 calculation...' write (30,'(a)') 'm12-table' do 110 i=1,399 freq = dble(i*10) call arw(freq,ar) call pm12l(freq,m12) call cmul(ar,m12,m12) write (30,*) freq,m12(1),m12(2) 110 continue c c m21 = c write (out,*) ' running m21 calculation...' write (30,'(a)') 'm21-table' do 120 i=1,300 freq = dble(i*10) call axw(freq,ax) call pm21l(freq,m21) call cmul(ax,m21,m21) write (30,*) freq,m21(1),m21(2) 120 continue do 121 i=301,399 freq = dble(i*10) call axw(freq,ax) call pm21h(freq,m21) call cmul(ax,m21,m21) write (30,*) freq,m21(1),m21(2) 121 continue
semiconductor group 608 application notes iv c c m22 = c write (out,*) ' running m22 calculation...' write (30,'(a)') 'm22-table' do 130 i=1,399 freq = dble(i*10) call axw(freq,ax) call arw(freq,ar) call pm22l(freq,m22) call cmul(ar,m22,m22) call cmul(ax,m22,m22) write (30,*) freq,m22(1),m22(2) 130 continue write(30,'(a1)') ';' close (30) write(out,'(a)') ' data written in file: '//fileout stop 1000 write(out,'(a)') ' open error at output-file: '//fileout stop 1 1100 write(out,'(a)') ' open error at input-file: '//infile stop 2 end c c################################################################### c subroutine arw(freq,ar) c c################################################################### c c name of subroutine: arw c c formal parameter list: freq,ar c c input parameters: c freq (double) c c output parameters: c arw (double) array 2 c c task of this routine: vor*jwrir*ckr/(1.+jwrir*ckr)c c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 ar(2),freq,rir,ckr,vor,omp,pi2,v1(2),v2(2) * common /arc/ rir,ckr,vor common /pi2c/ pi2 * if(ckr.eq.0) then
semiconductor group 609 application notes iv ar(1) = 1. ar(2) = 0. else omp = pi2*freq*rir*ckr v1(1) = 0 v1(2) = omp v2(1) = 1.d0 v2(2) = omp call cdiv(v1,v2,ar) end if ar(1) = vor * ar(1) ar(2) = vor * ar(2) return end c c################################################################### c subroutine axw(freq,ax) c c################################################################### c c name of subroutine: axw c c formal parameter list: freq,ax c c input parameters: c freq (double) c c output parameters: c ax (double) array 2 c c task of this routine: c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 ax(2),freq,rix,ckx,vox,omp,pi2,v1(2),v2(2) * common /axc/ rix,ckx,vox common /pi2c/ pi2 * if(ckx.eq.0) then ax(1) = 1. ax(2) = 0. else omp = pi2*freq*rix*ckx v1(1) = 0. v1(2) = omp v2(1) = 1.d0
semiconductor group 610 application notes iv v2(2) = omp call cdiv(v1,v2,ax) end if ax(1) = ax(1)*vox ax(2) = ax(2)*vox return end c c################################################################### c subroutine cmul(c,d,e) c c################################################################### c c name of subroutine: cmul c c formal parameter list: c,d,p c c input parameters: c c (double) array [2] c d (double) array [2] c c output parameters: c e (double) array [2] c c task of this routine: c subroutine complex multiplication c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 c(2),d(2),p(2),e(2) * p(1)=c(1)*d(1)-c(2)*d(2) p(2)=c(2)*d(1)+c(1)*d(2) e(1)=p(1) e(2)=p(2) return end c c################################################################### c subroutine cdiv(c,d,e) c c################################################################### c c name of subroutine: cdiv c c formal parameter list: c,d,p
semiconductor group 611 application notes iv c c input parameters: c c (double) array [2] c d (double) array [2] c c output parameters: c e (double) array [2] c c task of this routine: c subroutine complex division c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 c(2),d(2),p(3),e(2) * p(2)= d(1)*d(1)+d(2)*d(2) p(1)= c(1)*d(1)+c(2)*d(2) p(3)= c(2)*d(1)-c(1)*d(2) * e(1)=p(1)/p(2) e(2)=p(3)/p(2) return end c c################################################################### c subroutine pm11l(freq,m11) c c################################################################### c c name of subroutine: pm11l c c formal parameter list: freq c c input parameters: freq c c output parameters: m11 c c task of this routine: re [m11] (10-400hz) c im [m11] (10-400hz) c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m11(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn * m11(1) =(na + pi2*pi2*freq*freq*nc*nb*nb) /
semiconductor group 612 application notes iv & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) m11(2) = (pi2*freq*nb*(na-nc)) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) return end c################################################################### c subroutine pm11h(freq,m11) c c################################################################### c c name of subroutine: pm11h c c formal parameter list: freq c c input parameters: freq c c output parameters: m11 c c task of this routine: re [m11] (410-3990hz) c im [m11] (410-3990hz) c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m11(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn real*8 rpp,rd,rac,rpc,ra,rb,cd,cc * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn common /rsgsc/ rpp,rd,rac,rpc,ra,rb,cd,cc * m11(1) =(ne + pi2*pi2*freq*freq*nd*nd+rpp) / & (ne*ne +pi2*pi2*freq*freq*rpp*rpp*nd*nd) m11(2) = (pi2*freq*nd*(ne-rpp)) / & (ne*ne +pi2*pi2*freq*freq*rpp*rpp*nd*nd) return end c################################################################### c subroutine pm12hl(freq,m12) c c################################################################### c c name of subroutine: pm12hl c c formal parameter list: freq c c input parameters: freq c
semiconductor group 613 application notes iv c output parameters: m12 c c task of this routine: re [m12] (10-3990hz) c im [m12] (10-3990hz) c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m12(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn * m12(1) = 2. * (na + pi2*pi2*freq*freq*nc*nb*nb) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) m12(2) = 2. * (pi2*freq*nb*(na-nc)) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) return end c################################################################### c subroutine pm12h(freq,m12) c c################################################################### c c name of subroutine: pm12h c c formal parameter list: freq c c input parameters: freq c c output parameters: m12 c c task of this routine: not used c c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m12(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn real*8 rpp,rd,rac,rpc,ra,rb,cd,cc * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn common /rsgsc/ rpp,rd,rac,rpc,ra,rb,cd,cc * m12(1) = 2. * (ne + pi2*pi2*freq*freq*nh*ng) / & (ne*ne +pi2*pi2*freq*freq*nh*nh) m12(2) = 2. * (pi2*freq*(nh-(ne*ng))) / & (ne*ne +pi2*pi2*freq*freq*nh*nh) return end
semiconductor group 614 application notes iv c################################################################### c subroutine pm21l(freq,m21) c c################################################################### c c name of subroutine: pm21l c c formal parameter list: freq c c input parameters: freq c c output parameters: m21 c c task of this routine: re [m21] (10-3000hz) c im [m21] (10-3000hz) c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m21(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn * m21(1) = - (pi2*pi2*freq*freq*nb*nb*nl*nc) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) m21(2) = - (pi2*freq*nb*nl*na) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) return end
semiconductor group 615 application notes iv c################################################################### c subroutine pm21h(freq,m21) c c################################################################### c c name of subroutine: pm21h c c formal parameter list: freq c c input parameters: freq c c output parameters: m21 c c task of this routine: re [m21] (3010-3990hz) c im [m21] (3010-3990hz) c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m21(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn real*8 rpp,rd,rac,rpc,ra,rb,cd,cc * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn common /rsgsc/ rpp,rd,rac,rpc,ra,rb,cd,cc * m21(1) = - (nl * ne) / & (ne*ne +pi2*pi2*freq*freq*nh*nh) m21(2) = (pi2*freq*nl*nh) / & (ne*ne +pi2*pi2*freq*freq*nh*nh) return end c################################################################### c subroutine pm22l(freq,m22) c c################################################################### c c name of subroutine: pm22l c c formal parameter list: freq c c input parameters: freq c c output parameters: m22 c c task of this routine: re [m22] (10-3990hz) c im [m22] (10-3990hz) c
semiconductor group 616 application notes iv c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m22(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn * m22(1) = (-2.*nn)+2.*((na*na*pi2*pi2*freq*freq*nb*nb*nc*nm)/ & (na*na+pi2*pi2*freq*freq*nc*nc*nb*nb)) m22(2) = 2. * (pi2*freq*nb*na*(nm-nc)) / & (na*na +pi2*pi2*freq*freq*nc*nc*nb*nb) return end c################################################################### c subroutine pm22h(freq,m22) c c################################################################### c c name of subroutine: pm22h c c formal parameter list: freq c c input parameters: freq c c output parameters: m22 c c task of this routine: not used c c c################################################################### c implicit logical (a-k,m-z),character (l) real*8 pi2,freq,m22(2),na,nb,nc,nd,ne,ng,nh,nl,nm,nn real*8 rpp,rd,rac,rpc,ra,rb,cd,cc * common /pi2c/ pi2 common /nsgsc/ na,nb,nc,nd,ne,ng,nh,nl,nm,nn common /rsgsc/ rpp,rd,rac,rpc,ra,rb,cd,cc * m22(1) = (-2.*nn) + 2. * (nm*nc) / & (nc*nc +pi2*pi2*freq*freq*nh*nh) m22(2) = 2. *(pi2*freq*nm*nh) / & (nc*nc +pi2*pi2*freq*freq*nh*nh) return end
semiconductor group 617 application notes iv c################################################################### c subroutine imped1(rser,rpar,cser,cpar,freq,zi) c c################################################################### c c name of subroutine: imped1 c c formal parameter list: rser,rpar,cser,cpar,freq,zi c c input parameters: c rser (double) ; series resistance c rpar (double) ; parallel resistance c cser (double) ; series capacitance c cpar (double) ; parallel capacitance c freq (double) ; frequency c c output parameters: c zi (double) array [2] c c task of this routine: calculation of complex impedance c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 v1(2),v2(2)zi(2)cser,cpar,freq,pi2,rpar,rser * common /qp2/ pi2 * v1(1) = 1.d0 v1(2) = pi2*freq*cpar*rpar v2(1) = rpar v2(2) = 0. call cdiv(v2,v1,zi) zi(1) = zi(1)+rser zi(2) = zi(2)+0. return end c################################################################### c subroutine imped2(rser,rpar,cser,cpar,freq,zi) c c################################################################### c c name of subroutine: imped2 c c formal parameter list: rser,rpar,cser,cpar,freq,zi c c input parameters: c rser (double) ; series resistance
semiconductor group 618 application notes iv c rpar (double) ; parallel resistance c cser (double) ; series capacitance c cpar (double) ; parallel capacitance c freq (double) ; frequency c c output parameters: c zi (double) array [2] c c task of this routine: calculation of complex impedance c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 v1(2),v2(2),zi(2),cser,cpar,freq,pi2,rpar,rser,c(2) real*8 omega * common /qp2/ pi2 * omega = pi2*freq v1(1) = 1.d0 v1(2) = omega*cpar*rpar v2(1) = rpar v2(2) = 0. call cdiv(v2,v1,zi) v2(1) = 0. v2(2) = omega*cser v1(1) = 1.d0 v1(2) = v2(2)*rser call cdiv(v1,v2,c) zi(1)=zi(1)+c(1) zi(2)=zi(2)+c(2) return end c################################################################### c subroutine imped3(rser,rpar,cser,cpar,freq,zl) c c################################################################### c c name of subroutine: imped3 c c formal parameter list: rser,rpar,cser,cpar,freq,zi c c input parameters: c rser (double) ; series resistance c rpar (double) ; parallel resistance c cser (double) ; series capacitance c cpar (double) ; parallel capacitance c freq (double) ; frequency
semiconductor group 619 application notes iv c c output parameters: c zi (double) array [2] c c task of this routine: calculation of complex impedance c c################################################################### c implicit logical (a-k,m-z),character (l) * real*8 zl(2),cser,cpar,freq,rpar,rser,pi2,omega,a(2),b(2) * common /qp2/ pi2 * omega = pi2*freq if (rpar.eq.0) then a(1) = 1.d0 a(2) = omega*cser*rser b(1) = 0 b(2) = omega*cser call cdiv(a,b,zl) else a(1) = rpar a(2) = omega*cser*rser*rpar b(1) = 1.d0 b(2) = omega*cser*(rser+rpar) call cdiv(a,b,zl) end if return end listing of sicofi ? result file 'stl 3090.res' input_file_name: l3090.ctl date: 20.05.88 11:25 spec = l3090.spe slic = l3090.sli byte = l3090.byt chnr = 0,a plq = n on = all rel = y short = n opt = z+x+r+b zxrb = nnnn fz = 300.00 3400.0 zlim = 2.00 zrep =y zsign = 1 fr = 400.00 3300.0 rfil = y rrefq = n rref = 5.6550 fx = 400.00 3300.0 xfil = y xrefq = n xref =-0.76499e-01 fb = 300.00 3400.0 blim = 2.00 tbm = 1 brep = n bsign = 1
semiconductor group 620 application notes iv apof = 0.10 dpof = 0.00e+00 apre = 0.00e+00 dpre = 0.00e+00 xzq = 0.27734375000000000e+00 0.50000000000000000e+00 0.44921875000000000e-01 -0.45312500000000000e+00 0.16406250000000000e+00 xrq = 0.6875000000 -0.2832031250 0.0654296875 -0.0205078125 0.0039062500 xxq = 1.0468750000 -0.0527343750 0.0302734375 -0.0019531250 0.0019531250 xbq = 0.45898437500000000e-01 0.39062500000000000e+00 0.25976562500000000e+00 0.11523437500000000e+00 0.72265625000000000e-01 0.12207031250000000e-01 0.53710937500000000e-02 0.41015625000000000e-01 -0.30754089355468750e-01 0.19042968750000000e-01 xgq = 0.6718750000 1.6562500000 ; bytes for z-filter (13): 30,22,b9,5a,b1,f1,28,b3 bytes for r-filter (2b): 40,c8,2e,42,a4,3a,14,12 bytes for x-filter (23): 50,c8,8d,5c,9c,bc,02,a4 bytes for gain-factors (30): 21,a1,10,22 2nd part of bytes b-filter (0b): 00,26,db,6e,25,72,2a,a6 1st part of bytes b-filter (03): 4b,23,c3,22,25,a1,5b,c1 bytes for b-filter delay (18): 19,19,11,19 * sgs slic * vor = 0.47000 rir = 34750. ckr = 0.00000e+00 * vox = 1.0000 rix = 0.10000e+06 ckx = 0.22000e-04 * rpp = 60.000 rd = 750.00 rac = 13500. * rpc = 0.00000e+00 ra = 0.00000e+00 rb = 0.10000e+11 * cd = 0.23500e-04 cc = 0.33000e-09
semiconductor group 621 application notes iv run # 1 z-filter calculation results generator impedance zi at a,b line! calculated and quantized coefficients: xz = 0.27720 0.49984 0.04498 -0.45004 0.16550 xzq = 0.27734 0.50000 0.04492 -0.45312 0.16406 bytes for z-filter (13): 30,22,b9,5a,b1,f1,28,b3 return loss freq loss freq loss (hz) (db) (hz) (db) 100. 26.962 1800. 25.069 200. 26.741 1900. 25.314 300. 26.271 2000. 25.599 400. 25.716 2100. 25.919 500. 25.724 2200. 26.267 600. 25.483 2300. 26.631 700. 25.247 2400. 26.993 800. 25.031 2500. 27.330 900. 24.845 2600. 27.607 1000. 24.696 2700. 27.786 1100. 24.588 2800. 27.829 1200. 24.523 2900. 27.705 1300. 24.501 3000. 27.405 1400. 24.525 3100. 26.821 1500. 24.594 3200. 26.159 1600. 24.708 3300. 25.427 1700. 24.866 3400. 24.657 min. z-loop reserve: 1.443 db at frequency: 7000.0 hz min. z-loop mirror signal reserve: 5.092 db at frequency: 6500.0 hz warning! sicofi specs (noise, gain tracking ...) not guaranteed increase slic attenuation in receive path at least by 1.13 db run # 1 x-filter calculation results calculated and quantized coefficients: xx = 1.03976 -0.05284 0.03052 -0.00288 0.00233 xxq = 1.04687 -0.05273 0.03027 -0.00195 0.00195 bytes for x-filter (23): 50,c8,8d,5c,9c,bc,02,a4 x-filter attenuation function (in db), (always absolute values)
semiconductor group 622 application notes iv freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. -0.191 0.000 1900. -0.140 -0.007 400. -0.178 0.000 2000. -0.170 -0.006 500. -0.162 -0.001 2100. -0.206 -0.006 600. -0.144 -0.002 2200. -0.246 -0.005 700. -0.126 -0.003 2300. -0.290 -0.004 800. -0.109 -0.004 2400. -0.338 -0.004 900. -0.092 -0.004 2500. -0.391 -0.003 1000. -0.078 -0.005 2600. -0.447 -0.002 1100. -0.067 -0.006 2700. -0.506 0.000 1200. -0.060 -0.006 2800. -0.567 0.001 1300. -0.057 -0.007 2900. -0.630 0.002 1400. -0.058 -0.007 3000. -0.693 0.004 1500. -0.065 -0.007 3100. -0.755 0.005 1600. -0.076 -0.007 3200. -0.816 0.007 1700. -0.093 -0.007 3300. -0.874 0.008 1800. -0.114 -0.007 3400. -0.927 0.010 1900. -0.140 -0.007 3500. 0.000 0.000 2000. -0.170 -0.006 3600. 0.000 1.113 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z vref/vsicofi Cxref gx 0.00 - 0.03 - 4.42 - -0.08 = -4.37 ideal -0.02 = 0.03 + 4.42 + -0.08 + -4.38 quant second byte for gain: ,10,22 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz generator impedance zi at a,b line! tgref ca = 0.273 ms tgref cb = 0.287 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 13.827 2.618 2000. 0.005 0.013 200. 0.316 1.808 2100. 0.002 0.018 300. -0.022 0.595 2200. 0.000 0.024 400. -0.002 0.325 2300. -0.003 0.031 500. -0.005 0.170 2400. -0.005 0.039 600. 0.002 0.105 2500. -0.006 0.049 700. 0.000 0.067 2600. -0.005 0.060 800. 0.000 0.043 2700. -0.002 0.073 900. 0.002 0.027 2800. 0.004 0.089 1000. 0.004 0.017 2900. 0.016 0.107 1100. 0.007 0.009 3000. 0.037 0.307 1200. 0.009 0.005 3100. 0.093 0.157 1300. 0.011 0.002 3200. 0.142 0.191 1400. 0.013 0.000 3300. 0.218 0.234 1500. 0.013 0.000 3400. 0.336 0.291 1600. 0.012 0.001 3500. 0.525 0.371 1700. 0.011 0.003 3600. 0.853 0.491 1800. 0.010 0.005 3700. 1.493 1.022 1900. 0.007 0.009 3800. 3.002 1.022
semiconductor group 623 application notes iv run # 1 r-filter calculation results calculated and quantized coefficients: xr = 0.68422 -0.28458 0.06639 -0.01965 0.00512 xrq = 0.68750 -0.28320 0.06543 -0.02051 0.00391 bytes for r-filter (2b): 40,c8,2e,42,a4,3a,14,12 r-filter attenuation function (in db), (always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. 6.755 -0.052 1900. 3.612 -0.006 400. 6.662 -0.050 2000. 3.364 -0.004 500. 6.546 -0.048 2100. 3.112 -0.001 600. 6.408 -0.045 2200. 2.855 0.002 700. 6.251 -0.042 2300. 2.594 0.005 800. 6.075 -0.039 2400. 2.331 0.009 900. 5.886 -0.035 2500. 2.065 0.013 1000. 5.684 -0.032 2600. 1.799 0.017 1100. 5.473 -0.028 2700. 1.536 0.021 1200. 5.254 -0.025 2800. 1.278 0.026 1300. 5.030 -0.022 2900. 1.027 0.030 1400. 4.801 -0.019 3000. 0.787 0.034 1500. 4.569 -0.016 3100. 0.560 0.038 1600. 4.335 -0.014 3200. 0.349 0.042 1700. 4.097 -0.011 3300. 0.157 0.046 1800. 3.857 -0.009 3400. -0.014 0.049 1900. 3.612 -0.006 3500. -0.052 0.000 2000. 3.364 -0.004 3600. -0.050 1.002 gr results: all attenuation values (in db) refer to fref= 1014. hz -rlr slic+z vsicofi/vref rref gr 7.00 - 2.28 - -4.42 - 5.65 = 3.48 ideal 6.98 = 2.28 + -4.42 + 5.65 + 3.45 quant first byte for gain (30): 21,a1 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz terminating impedance zi at a,b line! tgref ca = 0.223 ms tgref cb = 0.205 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 0.049 0.000 2000. 0.083 0.069 200. 0.050 0.014 2100. 0.088 0.075 300. 0.042 0.017 2200. 0.089 0.083 400. 0.031 0.055 2300. 0.086 0.092
semiconductor group 624 application notes iv 500. 0.029 0.026 2400. 0.081 0.102 600. 0.023 0.027 2500. 0.075 0.114 700. 0.017 0.028 2600. 0.069 0.127 800. 0.012 0.030 2700. 0.066 0.143 900. 0.008 0.032 2800. 0.070 0.160 1000. 0.005 0.034 2900. 0.084 0.181 1100. 0.005 0.036 3000. 0.112 0.184 1200. 0.007 0.039 3100. 0.185 0.234 1300. 0.012 0.041 3200. 0.260 0.270 1400. 0.019 0.044 3300. 0.374 0.315 1500. 0.029 0.047 3400. 0.541 0.373 1600. 0.041 0.050 3500. 0.794 0.454 1700. 0.053 0.054 3600. 1.199 0.575 1800. 0.065 0.058 3700. 1.931 0.770 1900. 0.075 0.063 3800. 3.545 1.106 run # 1 b-filter calculation results terminating impedance zl at a,b line! calculated and quantized coefficients: xb = 0.04525 0.39813 0.25930 0.11590 0.07329 0.01268 0.00503 0.04196 -0.03075 0.01917 xbq = 0.04590 0.39062 0.25977 0.11523 0.07227 0.01221 0.00537 0.04102 -0.03075 0.01904 2nd part of bytes b-filter (0b): 00,26,db,6e,25,72,2a,a6 1st part of bytes b-filter (03): 4b,23,c3,22,25,a1,5b,c1 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 43.346 1800. 46.773 200. 37.367 1900. 47.239 300. 43.283 2000. 46.862 400. 47.865 2100. 45.857 500. 47.354 2200. 44.669 600. 46.009 2300. 43.587 700. 44.625 2400. 42.735 800. 43.525 2500. 42.148 900. 42.736 2600. 41.833 1000. 42.233 2700. 41.784 1100. 41.998 2800. 41.989 1200. 42.018 2900. 42.404 1300. 42.292 3000. 42.903 1400. 42.821 3100. 49.840 1500. 43.604 3200. 50.346 1600. 44.613 3300. 47.987 1700. 45.754 3400. 44.041 additional b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 625 application notes iv figure 6 equivalent circuit diagram 1 the configurations 1b) and 1c) can be derived from the equivalent circuit diagram 1a) by zeroing the elements that are not used. figure 7 equivalent circuit diagram 2 with r par = 0 the entry of a series impedance 2b) becomes possible with equivalent circuit diagram 2a). figure 8 equivalent circuit diagram 3
semiconductor group 626 application notes iv figure 9 figure 10
semiconductor group 627 application notes iv figure 11 figure 12
semiconductor group 628 application notes iv figure 13 figure 14
semiconductor group 629 application notes v sicofi ? application together with transformer slic with series feeding contents page 1introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 630 2 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 630 2.1 slic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 630 2.2 principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 31 2.3 transformer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 632 2.4 equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 633 2.5 transformer measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 634 3 hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 635 4software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 705 4.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 6 4.2 conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 637 4.3 subroutines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 637 4.4 elementary a-matrixes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 637 4.4.1 sera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 637 4.4.2 para . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 638 4.4.3 transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 8 4.5 model calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 639 4.5.1 y-matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 640 4.5.2 slic m-matrix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 640 5 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 646 5.1 input data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6 5.2 runs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 646 6 measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 651 7 strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 651 appendixes a1 specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 652 a2 measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 654
semiconductor group 630 application notes v 1 introduction although the trend in subscriber line interface circuit design is to integrate as many functions as possible, transformers are still often used in the design of public or private exchange line cards mainly because of their low cost, high reliability and better symetry and galvanic separation. this note describes an application of the siemens signal processing codec filter (sicofi) in a line card equipped with a transformer for the connection of analog subscriber lines. this is intended to be an example from which the user can build his own circuit and program. terminology: in the following, we will call "slic" the hardware and software corresponding to the analog components in a subscriber line interface circuit excluding the sicofi chip. overview: this note begins with generalities about transformers and slic functions. then comes an example of line card circuitry. the third part is the calculation of the model for the slic. the corresponding software is then described and used in combination with the sicofi coef- ficient program. measurements show the fulfilement of the german post specifications. next comes a word about possible strategies. a listing of the trafos slic fortran program can be printed by the user from the source file. 2 general 2.1 slic functions the main functions of the slic are to provide the borsht functions (battery feeding, over- voltage protection, ringing, signaling, hybrid function, testing). in the case of a slic circuit in combination with the sicofi, the hybrid function is splitted into the two-wire to four-wire conversion realized by the slic and the hybrid balancing provided by the internal b-filter of the sicofi. the other functions (such as off-hook detection, metering, standby mode, ringing) do not affect the speech signal. therefore we will not consider these in the scope of this paper. the signal on a telephone line can be considered as comprising of two parts:
semiconductor group 631 application notes v l a dc voltage to feed the subscriber terminal. l an ac voltage (the speech signal) which has to be transferred in both directions: pabx-line (transmit) and line-pabx (receive) with the right attenuation and without distortion. to separate ac and dc correctly, the circuit has to present a high pass at low frequencies and a specified input impedance (matching impedance) in regard to the ac signal. a flat frequency response is also required. 2.2 principles schematic: a simple slic circuit can be schematized as follows: figure 1 the feeding can be of different kind: l series feeding transformer: generally iron core advantages: the high frequency current is stopped by the coils of the transformer itself. drawbacks: it is difficult to dimension a transformer with a low leakage inductance. high current in the pri- mary half coils. a large core is required in order to prevent saturation.
semiconductor group 632 application notes v l parallel feeding transformer: generally ferrite core (allows lower leakage inductance but comes easier in sat- uration) advantages: blocks the dc current before the transformer coils. drawbacks: necessity of a blocking circuit before the transformer which includes often a large coil or an electronic circuit with problems of non linearities. therefore the feeding circuit often presents a frequency dependant equivalent impedance which is not easy to model. 2.3 transformer characteristics philosophy of the simplifications: let us take an ideal transformer with 1 to 1 ratio, let us consider the ac signal only and only one direction at a time. the equivalent circuit in transmit direction will be: figure 2 and in receive direction: figure 3
semiconductor group 633 application notes v we can see that if z l = z 0 the attenuation in both directions is 6 db. the real circuit is more complicated because of the loop added by the sicofi z-filter and because of the non-ideal transformer. optional amplifier are also used for several purposes: l the sicofi can drive loads only above typically 300 w , so that an opamp is not necessary. l add gain in receive direction. l add possibly group delay if the sicofi b-filter can not compensate fully the transformer dis- tortion. (improves the trans hybrid loss at low frequencies). 2.4 equivalent circuit of the transformer a low frequency transformer can be modelled with simple parts: l 1 main inductance l s1 , l s2 stray inductances r cu1 , r cu2 primary and secondary copper resistance c w winding capacitance w 1 , w 2 number of windings at primary and secondary zsp with c sp , r sp feeding (parallel or serial) figure 4
semiconductor group 634 application notes v 2.5 transformer measurements method: l measurement of the primary and secondary copper resistances with a simple ohmmeter. ( r cu1 and r cu2 ) l short circuit at the secondary: measurement of leakage inductance ( l s1 and l s2 ) and winding capacitance ( c w ) with an im- pedance analyser at 1 khz. l open circuit at the secondary: measurement of the main inductance ( l 1 ) with the impedance analyser. l the other data (number of turns primary and secondary: w 1 , w 2 ) have to be obtained from the supplier. results: in order to prove the capabilities of the sicofi for germany, we have choosen a transformer with series feeding which is simple to use. it has been dimensioned for the specifications of the german post: z in must be close to 220 w + (820 w //115 nf) (see specifications in appendix a1) r cu1 = 123 w | r cu2 = 121 w | the sum is approximately the series resistance of z in l s2 = l s1 = 4.2 mh | c w = 0.1 nf | > the smaller, the better! l 1 = 0.835 h | a value larger than 700 mh is recommended - the larger the better! w 1 = 1400 w 2 = 1400 note : the main inductance has a large influence on the frequency response at low frequencies: it forms a high pass filter with the copper resistances and the line impedance; the cut-off frequency should be kept as low as possible by increasing l 1 . the leakage inductances influence more the high frequency response (they form a low pass with the winding capacitance and therefore limit the frequency band of the transformer). the winding capacitance can be decreased by using a shielding screen between the primary and secondary windings.
semiconductor group 635 application notes v 3 hardware our circuit is a didactic circuit with a series feeding and values for z 0 that have been optimized by trying different resistors and capacitors in order to obtain an optimum with the slic alone (z-filter switched off). figure 5 transformer siemens ek 25 nr. ek c39030-z4-c15 z 0ra1 953 w z 0ca2 200 nf d1 3v9 d2 3v9 c sp 2.2 m f, 63 v r sp 4 100 w , 1 w
semiconductor group 636 application notes v operational-amplifier siemens lf356n 4software 4.1 introduction the following two ports models ("black boxes" which the user can change as he wishes) are used to model the transformer. admittance matrix: chain matrix: in the model, chain matrix (a-matrix) are first used in order to make easy chain multiplications and improve the modularity of the program. then the transformer is considered by its admittance matrix (subroutine trslic).
semiconductor group 637 application notes v 4.2 conventions as we are working with two ports model, we need 2 2 matrixes and because we work with complex numbers we need a third dimension: the matrixes are declared as arrays of dimension 3: a(2,2,2) where the first number is 1 for real and 2 for imaginary part and the two other ones are for lines and columns of the matrix. after the multiplications, these matrixes are reduced to their elements (complex): a11(2),a12(2),a21(2),a22(2) in other words: a(1,1,1) + j a(2,1,1) = a11(1) + j a11(2) 4.3 subroutines the transformer is modelled in the subroutine trslic. input is freq (frequency); output of this routine are the y parameter of the transformer, including the y-matrix determinant. trslic uses subroutines which are the elementary a-matrix calculations: 4.4 elementary a-matrixes 4.4.1 sera series a-matrix y: admittance in series
semiconductor group 638 application notes v 4.4.2 para parallel a-matrix y: admittance in parallel 4.4.3 transformer w 1 : w 2 w 1 / w 2 if the transformer has inverted coils then change the sign of u (it is equivalent to make w 2 = C w 2 ).
semiconductor group 639 application notes v 4.5 model calculations figure 6 note : " " is a complex matrix multiplication: see subroutine cmatmul admittance elements of the different matrixes: w = 2 p f req * y1 = 1 / ( r cu1 + j w l s1 ) * y2 = 1 / j w l1 * y3 = 1 / ( r cu1 + j w l s2 ) * y4 = j w c w parallel feeding series feeding * y5 = 1 / z sp * y5 = 0 * y7 = j w c sp * y7 = c sp // r sp = 1/ r sp + j w c sp the resulting a-matrix is: a = a5 a7 a1 a2 a6 a3 a4
semiconductor group 640 application notes v 4.5.1 y-matrix from the a parameters, we can compute the y parameters (*): y11 = a22/a12 y12 = C deta/a12 y21 = C 1/a12 y22 = a11/a12 and ydet = y11 y22 C y12 y21 4.5.2 slic m-matrix an additional amplifier (ax) has been added in transmit direction so that the circuit is as gen- eral as possible. schematic circuit diagram of transformer slic software: figure 7 and figure 8 .
semiconductor group 641 application notes v figure 7
semiconductor group 642 application notes v figure 8 impedance models
semiconductor group 643 application notes v notes: l each block is modifyable by the user. l the gains are controllable by 9 parameters: example for ar (similar for ax) l denominator impedance: arzd using the model erzd=1, erzd=2 or erzd=3 l nominator impedance: arzn using the model erzn=1, erzn=2 or erzn=3. erzn=0 means that there is no gain in this direction (ar=1) normally erzn > 0 : ar = 1 + arzn / arzd erzn < 0 means that we have an inverting amplifier: ar = C arzn / arzd the matching impedance z 0 is modelled with 6 parameters: z 0ra1 , z 0ca1 , z 0ra2 , z 0ca2 : parallel part z 0rs , z 0cs : serial part calculations: transformer equations: (1) i 1 = y11 v 1 + y12 v 20 (2) i 20 = y21 v 1 + y22 v 20 determinant: ydet = y11 y22 C y12 y21
semiconductor group 644 application notes v a. calculation of m11 matrix parameter: m11 = i 1 / v 1 when v 3 = 0 this is exactly the admittance yp seen at the primary side of the transformer when the impedance z 0 is at the secondary.(*) yp = (y11 1/ z 0 + ydet) / y22 + 1/ z 0 = (y11 + ydet z 0 ) / (y22 z 0 + 1) then: m11 = (y11 + ydet z 0 ) / (1 + y22 z 0 ) b. calculation of m12 matrix parameter: m12 = i 1 / v 3 when v 1 = 0 the equations (1) and (2) are now: (1) i 1 = y12 v 20 (2) i 2 = y22 v 20 the impedance seen at the secondary side of the transformer when a short circuit is at the primary side (*): (3) z out = 1 / y22 (4) v 20 / z out = ar v 3 / ( z 0 + z out ) (voltage divider) then from (3) and (4): v 20 / v 3 = ar / (1 + y22 z 0 ) and with (1): m12 = i 1 / v 3 = y12 ar / (1 + y22 z 0 ) c. calculation of m21 matrix parameter: m21 = v 2 / v 1 when v 3 = 0 the relation between v 2 and i 2 is: v 20 = C z 0 i 2 then by replacing this in (2), we obtain: C v 20 / z 0 = y21 v 1 + y22 v 20 which is equivalent to: v 20 / v 1 = C y21/y22 + 1/ z 0 v 2 = ax v20 therefore: m21 = C ax z 0 y21 / (1 + z 0 y22)
semiconductor group 645 application notes v d. calculation of m22 matrix parameter: m22 = v 2 / v 3 when v 1 = 0 the calculations are then straightforeward: v 2 / v 3 = ax ar ( z in / z in + z 0 ) z in is the impedance seen at the secondary side of the transformer when there is a short circuit at the primary.(*) z in = 1 / y22 then: m22 = v 2 / v 3 = ax ar / (1 + z 0 y22) (*) see "linear integrated networks" g.s.moschytz bell telephone laboratories series van nostrand reinhold company summary: m11 = a = (y11 + ydet z 0 )/(1 + y22 z 0 ) m12 = b = y12 ar / (1 + z 0 y22) m21 = c = C ax z 0 y21/(1 + z 0 y22) m22 = d = ax ar/(1 + z 0 y22)
semiconductor group 646 application notes v 5 optimization 5.1 input data the trafos slic program needs a file as input which contains the data of the slic: *erzn :receive gain = 1+arzn/arzd or -arzn/arzd if erzn < 0 0 *arrsn, arrpn, arcsn, arcpn 0. 0. 0. 0. *erzd 0 *arrsd, arrpd, arcsd, arcpd 0. 0. 0. 0. *exzn :transmit gain = 1+axzn/axzd or -axzn/axzd if exzn < 0 0 *axrsn, axrpn, axcsn, axcpn 0. 0. 0. 0. *exzd 0 *axrsd, axrpd, axcsd, axcpd 0. 0. 0. 0. *rcu1 rcu2 :cupper resistance of primary (resp. secondary) 123. 121. *l1 0.835 *ls1 ls2 :leakage inductances primary and secondary 0.42e-02 0.42e-02 *cw 0.1e-09 *rsp csp :feeding resistance and capacitance 400.0 0.22e-05 *w1 w2 :number of turn for windings 0.14e+04 0.14e+04 *zsli 0.5 *zo :matching impedance (with 6 elements) *z0ra1, z0ca1, z0ca2, z0ra2 953. 0. 0.2e-06 0. *z0rs, z0cs 0. 0. 5.2 runs specifications: the specifications for west-germany (see brd.spe in appendix a1) a first run with automatical z-filter optimization (pzin = 0) does not give satisfiing results for the return loss. a second run with modified specifications (see brd4.spe in appendix a1) is necessary with repetition of the z-filter optimization (zrep = y). result file: nice.res is a result file which has been obtained with a version v3.x of sicofi program.
semiconductor group 647 application notes v nice.res: input_file_name: nice.ctl date: 18.04.88 10:03 spec = brd4.spe slic = trafos.sli byte = ref.byt chnr = 0,a plo = n on = all rel = y short = n opt = z+x+r+b zxrb = nnnn fz = 300.00 3400.0 zlim = 2.00 zrep =n zsign = 1 fr = 360.00 3390.0 rfil = n rrefq = n rref = 1.5367 fx = 500.00 3300.0 xfil = n xrefq = n xref = -2.5370 pb = 10 gwfb= 0.500e-01 tbm = 1 fb = 300.00 500.00 700.00 1000.0 1500.0 2100.0 2300.0 2900.0 3200.0 3300.0 wfb = 4.0000 2.0000 1.0000 5.0000 1.0000 2.0000 1.0000 5.0000 1.0000 1.0000 apof = 0.00e+00 dpof = 0.00e+00 apre = 0.00e+00 dpre = 0.00e+00 xzq = 0.49121093750000000e+00 -0.14257812500000000e+00 -0.40625000000000000e+00 -0.12988281250000000e+00 0.18359375000000000e+00 xrq = 0.6562500000 0.2695312500 0.0332031250 0.0234375000 0.0244140625 xxq = 1.2187500000 0.1542968750 -0.1640625000 -0.0078125000 -0.0019531250 xbq = 0.35937500000000000e+00 0.13867187500000000e+00 0.74218750000000000e+00 -0.57031250000000000e+00 - -0.60937500000000000e+00 -0.65625000000000000e+00 0.35937500000000000e+00 -0.11328125000000000e+01 0.90625000000000000e+00 -0.34375000000000000e+00 xgq = 0.5742187500 1.6406250000 ; bytes for z-filter (13): 30,c1,5b,92,1b,3b,13,3e bytes for r-filter (2b): 50,ba,94,42,c9,42,12,22 bytes for x-filter (23): d0,c8,8c,bb,22,23,0c,b2 bytes for gain-factors (30): 31,a2,10,32 2nd part of bytes b-filter (0b): 00,1a,0a,ab,38,24,b1,21 1st part of bytes b-filter (03): 92,b2,39,13,d1,33,2b,b1 bytes for b-filter delay (18): 19,19,11,19 * trafo slic *z0ra1= 953.00 *z0ca1= .00000 *z0ra2= .00000 *z0ca2= .20000e-06*z0rs = .00000 *z0cs = .00000 * erzn= 0 *arrsn= .00000 *arcsn= .00000 *arrpn= .00000 *arcpn= .00000 * erzd= 0 *arrsd= .00000 *arcsd= .00000 *arrpd= .00000 *arcpd= .00000 * exzn= 0 *axrsn= .00000 *axcsn= .00000 *axrpn= .00000 *axcpn= .00000 * exzd= 0
semiconductor group 648 application notes v *axrsd= .00000 *axcsd= .00000 *axrpd= .00000 *axcpd= .00000 *rcu1 = 123.00 *rcu2 = 121.00 * l1 = .83500 * ls1 = .42000e-02* ls2 = .42000e-02* cw = .10000e-09 * rsp 400.00 * csp .22000e-05 * w1 = 1400.0 * w2 = 1400.0 *zsli = .50000 run # 2 z-filter calculation results generator impedance zi at a,b line! calculated and quantized coefficients: xz = 0.49089 -0.14218 -0.41298 -0.13023 0.18335 xzq = 0.49121 -0.14258 -0.40625 -0.12988 0.18359 bytes for z-filter (13): 30,c1,5b,92,1b,3b,13,3e return loss freq loss freq loss (hz) (db) (hz) (db) 100. 10.464 1800. 24.463 200. 12.502 1900. 23.683 300. 14.850 2000. 23.095 400. 17.047 2100. 22.680 500. 19.118 2200. 22.432 600. 21.177 2300. 22.359 700. 23.354 2400. 22.477 800. 25.792 2500. 22.824 900. 28.673 2600. 23.458 1000. 32.201 2700. 24.485 1100. 35.992 2800. 26.083 1200. 36.559 2900. 28.532 1300. 33.524 3000. 31.690 1400. 30.624 3100. 31.133 1500. 28.425 3200. 26.214 1600. 26.758 3300. 21.848 1700. 25.469 3400. 18.387 min. z-loop reserve: 1.053 db at frequency: 7000.0 hz min. z-loop mirror signal reserve: 4.793 db at frequency: 6500.0 hz run # 1 x-filter calculation results calculated and quantized coefficients: xx = 1.21418 0.15483 -0.16741 -0.00821 -0.00233 xxq = 1.21875 0.15430 -0.16406 -0.00781 -0.00195 bytes for x-filter (23): d0,c8,8c,bb,22,23,0c,b2 gx results: all attenuation values (in db) refer to fref = 1014. hz
semiconductor group 649 application notes v rlx slic+z vref/vsicofi xref gx 0.00 - 2.42 - 4.42 - -2.54 = -4.30 ideal 0.00 = 2.42 + 4.42 + -2.54 + -4.30 quant second byte for gain: ,10,32 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz generator impedance zi at a,b line! tgref ca = 0.327 ms tgref cb = 0.340 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 18.755 3.232 2000. 0.000 0.013 200. 1.722 2.198 2100. -0.006 0.018 300. 0.411 0.815 2200. -0.010 0.024 400. 0.112 0.421 2300. -0.013 0.032 500. 0.000 0.249 2400. -0.015 0.040 600. -0.036 0.156 2500. -0.016 0.051 700. -0.037 0.101 2600. -0.015 0.062 800. -0.024 0.065 2700. -0.013 0.076 900. -0.008 0.042 2800. -0.007 0.093 1000. 0.008 0.026 2900. 0.002 0.113 1100. 0.020 0.015 3000. 0.018 0.136 1200. 0.028 0.008 3100. 0.043 0.166 1300. 0.032 0.003 3200. 0.086 0.202 1400. 0.032 0.001 3300. 0.156 0.249 1500. 0.029 0.000 3400. 0.274 0.310 1600. 0.025 0.001 3500. 0.473 0.395 1700. 0.019 0.002 3600. 0.828 0.519 1800. 0.012 0.005 3700. 1.520 0.717 1900. 0.006 0.008 3800. 3.115 1.055 run # 1 r-filter calculation results calculated and quantized coefficients: xr = 0.65560 0.27251 0.03267 0.02341 0.02505 xrq = 0.65625 0.26953 0.03320 0.02344 0.02441 bytes for r-filter (23): 50,ba,94,42,c9,42,12,22 gr results: all attenuation values (in db) refer to fref= 1014. hz -rlr slic+z vsicofi/vref rref gr 7.00 - 5.06 - -4.42 - 1.54 = 4.82 ideal 7.00 = 5.06 + -4.42 + 1.54 + 4.82 quant first byte for gain (30): 31,a2 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz terminating impedance zi at a,b line! tgref ca = 0.264 ms tgref cb = 0.247 ms
semiconductor group 650 application notes v freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 5.006 0.707 2000. -0.117 0.038 200. 1.426 0.405 2100. -0.156 0.046 300. 0.397 0.223 2200. -0.181 0.054 400. 0.022 0.134 2300. -0.187 0.062 500. -0.130 0.087 2400. -0.176 0.070 600. -0.182 0.060 2500. -0.146 0.078 700. -0.177 0.042 2600. -0.103 0.086 800. -0.139 0.029 2700. -0.051 0.095 900. -0.083 0.018 2800. 0.003 0.106 1000. -0.019 0.011 2900. 0.048 0.121 1100. 0.041 0.005 3000. 0.076 0.141 1200. 0.089 0.001 3100. 0.080 0.167 1300. 0.119 0.000 3200. 0.057 0.204 1400. 0.128 0.001 3300. 0.013 0.254 1500. 0.116 0.004 3400. -0.028 0.321 1600. 0.085 0.009 3500. -0.021 0.415 1700. 0.040 0.015 3600. 0.122 0.549 1800. -0.013 0.022 3700. 0.606 0.758 1900. -0.067 0.030 3800. 2.014 1.104 run # 1 b-filter calculation results terminating impedance zl at a,b line! calculated and quantized coefficients: xb = 0.35600 0.13862 0.74342 -0.56848 -0.60448 0.65780 0.36312 -1.13668 0.89881 -0.34413 xbq = 0.35937 0.13867 0.74219 -0.57031 -0.60937 0.65625 0.35937 -1.13281 0.90625 -0.34375 2nd part of bytes b-filter (0b): 00,1a,0a,ab,38,24,b1,21 1st part of bytes b-filter (03): 92,b2,39,13,d1,33,2b,b1 trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 22.902 1800. 25.059 200. 13.779 1900. 24.310 300. 18.401 2000. 24.081 400. 23.795 2100. 24.341 500. 29.665 2200. 25.093 600. 32.722 2300. 26.373 700. 31.077 2400. 28.244 800. 29.704 2500. 30.798 900. 29.509 2600. 34.094 1000. 30.459 2700. 37.788 1100. 32.798 2800. 40.341 1200. 37.665 2900. 41.168 1300. 51.231 3000. 42.854 1400. 38.240 3100. 49.973 1500. 32.000 3200. 47.925 1600. 28.571 3300. 36.752 1700. 26.415 3400. 30.941 additional b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 651 application notes v 6 measurements see appendix a2 the measurements are made with a "pcm4" from wandel & goltermann. return loss: correct. transmit direction (ad): level at 1 khz: C 0.18 db (wanted: 0 db). a small manual correction will be necessary. receive direction (da): level at 1 khz: C 7.07 db (wanted: C 7 db). attenuation distortion (ad and da): correct. trans hybrid loss (thl): should be improved! to have a better thl, it is necessary to design an other transformer. 7 strategies the sicofi makes it possible to use the same hardware for different countries specifications by changing the coefficients programming of the sicofi. in general, it is necessary to already have a good return loss with the transformer alone without sicofi. then sicofi improves the figures. this requires us however to optimize the slic circuitry using the program as a simulation tool (especially z-filter optimization): 1. set z 0 to a given value 2. run automatical z-filter optimization for the given z 0 impedance and for all the specifications. 3. change the impedance z 0 4. redo step 1 until having obtained an optimum.
semiconductor group 652 application notes v appendix a1 specifications brd.spe fref = 1014.0 law = a uref= 0.9488 rlx = 0. rlr = -7.0 abimp = zi erzi= 1 rser= 220. rpar= 820. cpar= 0.115e-06 erzl= 1 rsl = 220. rpl = 820. cpl = 0.115e-06 zin fr 300 500 3k 3.4k at- 0 20 20 16 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 653 application notes v brd4.spe fref = 1014.0 law = a uref= 0.9480 rlx = 0. rlr = -7.0 abimp = zi erzi= 1 rser= 220. rpar= 820. cpar= 0.115e-06 erzl= 1 rsl = 220. rpl = 820. cpl = 0.115e-06 zin fr 300 500 3.2k 3.4k at- 0 20 20 18 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 654 application notes v appendix a2 measurements figure 9
semiconductor group 655 application notes v figure 10 freq/hz res/db 2208 22.10 2309 22.11 2409 22.31 2509 22.72 2610 23.41 2710 24.52 2811 26.17 2911 28.66 3011 31.70 3112 30.69 3212 25.90 3312 21.73 3413 18.35 3513 15.64 freq/hz res/db 201 11.51* 301 14.07* 402 16.63 502 19.08 602 21.57 703 24.29 803 27.44 903 31.60 1004 37.56 1104 40.98 1205 35.72 1305 31.58 1405 28.89 1506 26.99 1606 25.59 1706 24.52 1807 23.67 1907 23.04 2008 22.58 2108 22.27 1
semiconductor group 656 application notes v figure 11 freq/hz res/db 2208 0.09 2309 0.09 2409 0.07 2509 0.03 2610 -0.03 2710 -0.09 2811 -0.16 2911 -0.21 3011 -0.25 3112 -0.28 3212 -0.27 3312 -0.25 3413 -0.25 3513 -0.30 freq/hz res/db 201 -1.32 301 -0.30* 402 0.00 502 0.15 602 0.20 703 0.19 803 0.15 903 0.08 1004 0.01 1104 -0.06 1205 -0.11 1305 -0.15 1405 -0.17 1506 -0.16 1606 -0.14 1706 -0.09 1807 -0.05 1907 0.00 2008 0.05 2108 0.08 1
semiconductor group 657 application notes v figure 12 freq/hz res/dbm0 2208 -22.65 2309 -23.55 2409 -25.00 2509 -26.98 2610 -29.40 2710 -32.46 2811 -35.77 2911 -37.64 3011 -36.55 3112 -34.04 3212 -31.04 3312 -28.26 3413 -25.53 3513 -23.16 freq/hz res/dbm0 201 -14.32 301 -19.56 402 -26.21 502 -36.18 602 -33.50 703 -28.91 803 -27.03 903 -26.54 1004 -27.04 1104 -28.52 1205 -31.13 1305 -34.86 1405 -35.41 1506 -31.36 1606 -27.81 1706 -25.38 1807 -23.76 1907 -22.76 2008 -22.26 2108 -22.23 1
semiconductor group 658 application notes vi sicofi ? application together with transformer slic with transverse feeding contents page 1introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 659 2 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 659 2.1 slic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 659 2.2 principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 60 2.3 transformer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661 3 hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 662 3.1 equivalent circuit with mutual inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 662 3.2 measurement method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 663 3.3 trafo slic layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 664 4software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 4.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 6 4.2 conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 4.3 subroutines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 4.4 model of the transformer with transverse feeding . . . . . . . . . . . . . . . . . . . . . . . . 668 4.5 m or k matrix calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 668 4.5.1 m-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 669 4.5.2 k-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 670 5 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 675 5.1 input data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 5 5.2 runs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 675 6 measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676 7 strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676 appendixes a1 specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 677 a2 measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 679 a3 results file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 687 a4 listing of the fortran slic program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 693 a5 bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 709
semiconductor group 659 application notes vi 1 introduction allthough the trend in subcriber line interface circuit is to integrate as many functions as pos- sible, transformers are still often used in the design of public or private exchange line cards mainly because of their low cost, high reliability and better symmetry and galvanic separation. this note describes an application of the siemens signal codec filter (sicofi) in a line card equipped with a transformer for the connection of analog subcriber lines. terminology: in the following, we will call "slic" the hardware and software corresponding to the analog components in a subscriber line interface circuit excluding the sicofi chip. overview: this note begins with generalities about slic functions. then comes an example of solution for the line card circuitry. the next part is the calculation of the model for the slic. the corresponding software is then described and used in combination with the sicofi coef- ficient program. measurements show the fulfilment of the german post specifications. next comes a word about possible strategies to optimize sicofi coefficients. in the appendix, the listing of the trafo slic fortran program (written with microsoft fortran compiler) is given. 2 generalities 2.1 slic functions the main functions of the slic are to provide the borsht functions ( b attery feeding, o vervoltage protection, r inging, s ignaling, h ybrid function, t esting). in the case of a slic circuit in combination with the sicofi, the hybrid function is splitted into the two-wire to four- wire conversion realized by the slic and the hybrid balancing provided by the internal b-filter of the sicofi. the other functions (such as off-hook detection, metering, standby mode, ringing) do not affect the speech signal. therefore we will not consider these in the scope of this note. the signal on a telephone line can be considered as comprising of two parts: l a dc voltage to feed the subcriber terminal. l an ac voltage (the speech signal) which has to be tranferred in both directions: pabx-line (transmit) and line-pabx (receive) with the right attenuation and without distortion. to separate ac and dc correctly, the circuit has to present a high pass with a very low cut-off frequency and a specified input impedance (matching impedance) in regard to the ac signal. a flat frequency response is also required.
semiconductor group 660 application notes vi 2.2 principles schematic: a simple slic circuit can be schematized as follow: figure 1 the feeding can be of different kind: l series feeding transformer: generally iron core advantages: C the high frequency current is stopped by the coils of the transformer itself. drawbacks: C it is difficult to dimension a transformer with a low leakage inductance. C high current in the primary half coils. C a large core is required in order to prevent saturation. l parallel feeding transformer: generally ferrite core (allows lower leakage inductance but comes faster in saturation) advantages: C blocks the dc current before the transformer coils. drawbacks: C necessity of blocking circuit before the transformer which includes often a large coil or an electronic circuit with problems of non linearities. therefore the feeding circuit often presents a frequency dependant equivalent impedance which is not easy to model.
semiconductor group 661 application notes vi 2.3 transformer characteristics philosophy of the simplifications: let us take an ideal transformer with 1 to 1 ratio, let us consider the ac signal only and only one direction at a time. the equivalent circuit in transmit direction will be: figure 2 and in receive direction: figure 3 we can see that if z l = z 0 the attenuation in both directions is 6 db. the real circuit is more complicated because of the loop added by the sicofi z-filter and because of the non-ideal transformer. the sicofi can drive loads only above typically 300 w , so that an opamp is not necessary.
semiconductor group 662 application notes vi 3 hardware a transformer slic with transverse feeding was choosen with the corresponding t-circuit model with mutual inductance. 3.1 equivalent circuit figure 4 components of the equivalent circuit: m mutual inductance l 1s , l 2s theoretical stray inductances ( l 1s = l 1 C m , l 2s = l 2 C m ) r cu1 , r cu2 primary and secondary resistances c w1 , c w2 primary and secondary winding capacitances zfeed complex feeding impedance
semiconductor group 663 application notes vi 3.2 measurement method the whole measurement occurs in 7 steps: step 1: measurement of the primary and secondary copper resistance with a simple ohmmeter ( r cu1 and r cu2 ). step 2: open circuit at the secondary measurement of the transformer resonance frequencies by using an impedance analyzer, with parallel equivalent circuit [p] or series equivalent circuit [s] . C primary side ? f 01 with [p] and f 02 with [s] C secondary side ? f 01 ' with [p] and f 02 ' with [s] step 3: open circuit at the secondary measurement of winding inductance l 1m and l 2m at low frequency ( f m = 300 hz) and with [s] . step 4: determination of the correction factors n 1 and n 2 with n 1 = f m / f 01 and n 2 = f m / f 01 ' step 5: calculation of the actual primary and secondary inductance l 1 = l 1m (1 C n 1 2 ) and l 2 = l 2m (1 C n 2 2 ) step 6: short circuit at the secondary measurement of the stray inductance l 1k at frequency f 01 with [s] step 7: determination of the theoretical mutual inductance m , stray factor s and response ratio l 1s = l 1 C m s = l 1s / l 1 m = ? l 2 ( l 1 C l 1k ) = ? l 1 / l 2 c w1 = (2 p f 02 ') 2 l 1 s 1 c w2 = (2 p f 02 ) 2 l 2 s
semiconductor group 664 application notes vi results: in order to prove the capabilities of the sicofi for germany with this model, we have choosen a transformer with following data. r cu1 = 84 w r cu2 = 105 w l 1 = 1.15 h l 2 = 1.15 h m = 1.148 h c 1 = c w1 = 113 pf c 2 = c w2 = 135 pf 3.3 trafo slic layout figure 5
semiconductor group 665 application notes vi figure 6 equivalent circuit d1, d2 : overvoltage protection zener-diodes c2v7 c sp = 1 m f z 0ra1 = 700 w z 0ca2 = 0.1 m f r f = r cu + r 1 + r 2 = 792 w l f = 2 h c f = 2 nf r cu is the copper resistor of the coil l f ; c f is the stray capacitor of the coil. it is therefore not actually in the layout of the circuit but was measured with the impedance analyser. our circuit is a didactic circuit with a value for z 0 that has been optimized by trying different resistors and capacitors with a decade in order to obtain an optimal return loss with the slic while the z-filter is switched off.
semiconductor group 666 application notes vi 4software 4.1 introduction the following two ports model ("black box" which the user can change as he wishes) is used to model the transformer. chain matrix: the model matrix (a-matrix) are used in order to make easy matrix multiplications and improve the modularity of the program. 4.2 conventions as we are working with two ports model, we need 2 2 matrixes and because we work with complex numbers, we need a third dimension: the matrixes are declared as arrays of dimension 3: a(2,2,2) where the first number is 1 for real and 2 for imaginary part and the two other ones are for lines and columns of the matrix. after the multiplications, these matrixes are reduced to their elements (complex): a11,a12,a21,a22 example: a12 = a(1,1,2) + j a(2,1,2) 4.3 subroutines the transformer is modeled in the subroutine trslic. the input variable is freq (frequency); outputs of this routine are the a-parameter of the transformer, including the determinant. the feeding circuit is modelled in the subroutine zfeed.
semiconductor group 667 application notes vi note : the subroutines trslic and zfeed have to be modified by the user in order to model his own circuit. trslic uses subroutines which are the elementary a-matrix calculations: subroutine sera (series a-matrix) y: admittance in series subroutine para (parallel a-matrix) y: admittance in parallel
semiconductor group 668 application notes vi 4.4 model of the transformer with transverse feeding figure 7 a = a5 a7 a2 a1 a6 a3 a4 note: " " is a complex multiplication: see subroutine cmatmul admittance elements of the different matrixes w = 2 p f y1 = 1 / ( r cu1 + j w ( l 1m )) y2 = j 2 c w1 y3 = 1 / ( r cu2 + j w ( l 2m )) y4 = j w c w2 y6 = 1 / j w m here transverse feeding: y5 = 1 / z feed = ( r f + (j w l f )) // c f y7 = j w c sp 4.5 k or m matrix calculations (see the sicofi program description for the definition of these parameters) transformer equations: (1) v 1 = a11 v 20 + a12 (C i20) (2) i 1 = a 2 1 v 20 + a22 (C i20) and adet = a11 a22 C a12 a21 ( see figure 1 )
semiconductor group 669 application notes vi 4.5.1 m-parameters the slic is described by the following two equations: i 1 = m 1 1 v 1 + m12 v 3 v 2 = m21 v 1 + m22 v 3 a. calculation of m11 matrix parameter m11 = i 1 / v 1 when v 3 = 0 this is exactly the admittance yp seen at the primary side of the transformer when the impedance z 0 is at the secondary.(*) yp = (a21 z 0 + a22)/(a11 z 0 + a12) then: m11 = (a21 z 0 + a22)/(a11 z 0 + a12) b. calculation of m12 matrix parameter m12 = i 1 / v 3 when v 1 = 0 the equations (1) and (2) are now: (1) C i 20 = C (a11/a12) v 20 (2) i 1 = a21 v 20 + a22 (C i 20 ) (2) <=> i 1 = a21 v 20 + a22 (C a11/a12) v 20 <=> i 1 = C (adet/a12) v 20 the impedance seen at the secondary side of the transformer when a short circuit is at the primary side is (*): (3) z outt = a12 / a11 (4) v 20 / z out = v 3 / ( z 0 + z outt ) (voltage divider) then from (3) and (4): v 20 = v 3 a12 / (a12 + a11 z 0 ) and with (2): m12 = i 1 / v 3 = C adet/(a12 + a11 z 0 )
semiconductor group 670 application notes vi c. calculation of m21 matrix parameter m21 = v 2 / v 1 when v 3 = 0 the relation between v 2 and i 2 is: v 20 = C z 0 i 2 then by replacing this in (2), we obtain: C v 20 / z 0 = (C 1/a12) v 1 + (a11/ a12) v 20 which is equivalent to: v 20 / v 1 = z 0 / (a11 z 0 + a12) v 2 = v 20 therefore: m21 = z 0 / (a12 + a11 z 0 ) d. calculation of m22 matrix parameter: m22 = v 2 / v 3 when v 1 = 0 the calculations are then straightforeward: v 2 / v 3 = ( z eq / z eq + z 0 ) z eq is the impedance seen at the secondary side of the transformer when there is a short circuit at the primary.(*) z eq = a12 / a11 then: m22 = v 2 / v 3 = 1 / (1 + z 0 (a11/a12)) 4.5.2 k-parameters these parameters are easier to measure than the m-parameters but the calculations necessitate the knowledge of the generator impedance z g and of the generator voltage v g . the slic is described by the following two equations: b1 = k11 a1 + k12 v 3 v 2 = k21 a1 + k22 v 3 with a1 = v 1 C z g i 1 b1 = v 1 + z g i 1 and (4) v 1 = v g C z g i 1
semiconductor group 671 application notes vi a. calculation of k11 matrix parameter k11 = b1/a1 when v 3 = 0 k11 = ( z in C z g ) / ( z in + z g ) with z in : admittance seen at the primary side of the transformer when the impedance z 0 is at the secondary.(*) z in = (a11 z 0 + a12) / (a12 z 0 + a22) note : the return loss (rl) is defined by: rl = C 20 log10( | ( z in + z g ) / ( z in C z g ) | ) that is: rl = 20 log10( | k11 | ) b. calculation of k12 matrix parameter k12 = 2 v 1 / v 3 when a1 = 0 the equations (1) and (2) are now: (1) v 1 = a11 v 20 + a12 (C i 20 ) (2) i 1 = a 2 1 v 20 + a22 (C i 20 ) (3) v 3 = v 20 + z 0 i 20 (4) v 1 = C z g i 1 (3) <=> v 20 = v 3 C z 0 i 20 by reporting in (1) and (2): (5) v 1 = a11 ( v 3 C z 0 i 20 ) C a12 i 20 (6) i 1 = a 2 1 ( v 3 C z 0 i 20 ) C a22 i 20 by combination of (4), (5) and (6): then (a22 + a11 z 0 ) + (1/ z g ) (a12 + a11 z 0 ) v 1 / v 3 = a11(a22 + a21 z 0 ) C a21 (a12 + a11 z 0 ) 2 adet z g v 1 / v 3 = z g (a22 + a21 z 0 ) + (a12 + a11 z g )
semiconductor group 672 application notes vi c. calculation of k21 matrix parameter k21 = v 2 / v g when v 3 = 0 the equations are now: v 2 = v 20 i 2 = i 20 v 20 = C z 0 i 20 (1) v 1 = a11 v 20 C a12 i 20 (2) i 1 = a21 v 20 C a22 i 20 (4) v g C v 1 = z g i 1 the relation between v 2 and i 2 is: v 20 = C z 0 i 20 replacing (4) in (1) and (2): (1) v g C z g i 1 = a11 v 20 C a12 i 20 (2) i 1 = a21 v 20 C a22 i 20 by combination: v g = (a11 + z g a21) v 20 + (a12 + a22 z g ) (C i 20 ) and by replacing i 20 : d. calculation of k22 matrix parameter k22 = v 2 / v 3 when a1 = 0 the equations are now: v 2 = v 20 i 2 = i 20 v 20 = C z 0 i 20 (1) v 1 = a11 v 20 C a12 i 20 (2) i 1 = a21 v 20 C a22 i 20 (4) v g C v 1 = z g i 1 the calculations are then straightforeward: v 2 / v 3 = ( z eq / ( z eq + z 0 )) z 0 v 2 / v g = (a11 + a21 z g ) z 0 + a12 + z g a22
semiconductor group 673 application notes vi z eq is the impedance seen at the secondary side of the transformer when there is a short circuit at the primary.(*) z eq = (a22 z g + a12) / (a11 + a21 z g ) then: summary: (a22 z g + a12) k22 = v 2 / v 3 = (a22 z g + a12) + z 0 (a11 + z g a21) m11 = (a21 z 0 + a22) / (a11 z 0 + a12) m12 = C adet / (a12 + a11 z 0 ) m21 = z 0 / (a12 + a11 z 0 ) m22 = a12 / (a12 + z 0 a11) k11 = ( z in C z g ) / ( z in + z g ) with z in = (a21 z 0 + a22) / (a11 z 0 + a12) 2 adet z 0 k12 = z g (a22 + a21 z 0 ) + (a12 + a11 z 0 ) z 0 k21 = (a11 + a21 z g ) z 0 + a12 + z g a22 (a22 z g + a12) k22 = (a22 z g + a12) + z 0 (a11 + z g a21)
semiconductor group 674 application notes vi schematic circuit diagram of transformer slic software: figure 8 note :* each block is modifyable by the user. impedances the matching impedance z 0 and the generator impedance are modeled with 6 parameters: example: z 0r1 , z 0c1 , z 0r2 , z 0c2 : parallel part z 0rs , z 0cs : serial part figure 9
semiconductor group 675 application notes vi 5 optimization 5.1 input data the trafot slic program (written with microsoft fortran compiler) needs an input file which contains the data for the slic: trafot.inp: * parameter (k[default] or m) k *rcu1 *rcu2 :copper resistor of primary (resp. secondary) 84. 105. *cw1, *cw2 :winding capacitors primary and secondary 1.135e-10 135.4e-12 *ls1 *ls2 *m :leaking inductances primary and secondary 1.15 1.15 1.148 *csp :blocking capacitor 1.e-6 *rf *lf *cf :feeding ( cannot be all 0 at the same time) 792. 2.23 2.67e-9 *zsli :worst case half loop 0.5 *z0 : matching impedance (with 6 elemnts ) *z0ra1, z0ca1, z0ca2, z0ra2, z0rs , z0cs 700. 0. .1e-6 0. 0. 0. *zg : source/line impedance (with 6 elements ) *zgra1, zgca1, zgca2, zgra2, zgrs, zgcs 820. 0. 115.e-09 0. 220. 0. 5.2 runs specifications: the .spe file needed by the sicofi coefficient program makes use of values based on the specifications for west-germany (see brd.spe in appendix a1). a first run with automatical z-filter optimization (pzin=0) does not give satisfying results for the return loss. a second run with modified specifications (see brd2.spe in appendix a1) is necessary with repetition of the z-filter optimization (zrep=y). result file: the corresponding result file trafot.res can be found in appendix a3.
semiconductor group 676 application notes vi 6 measurements measurements are made with a "pcm4" from wandel & goltermann. the specifications for west-germany are fulfilled. we have measured the return loss, the (attenuation in) transmit direction (ad), the attenuation in the receive direction (da), the attenuation distortion (ad and da) and the transhybrid loss (dd). correlation the correlation between the calculated values and the measured values for return loss (all filters off and calculated values with the "sim"-function of the sicofi program) can be seen in the last diagram of appendix a2. the lower line in the picture stands for the calculated values. 7strategies the sicofi makes it possible to use the same hardware for different country specifications by changing the programming of the sicofi. in general, it is necessary to allready have a good return loss with the transformer alone without sicofi. then sicofi improves the figures. this requires us however to optimize the slic circuitry in four steps using the sicofi program as an simulation tool (especially z-filter optimization): 1. set z 0 to a given value 2. run automatical z-filter optimization for the given z 0 impedance and for all the specifications. 3. change the impedance z 0 4. redo step 1 until having obtained an optimal return loss.
semiconductor group 677 application notes vi appendix a1 specifications brd.spe fref = 1014.0 law = a uref = 0.9480 rlx = 0. rlr = -7.0 abimp = zi erzi= 1 rser= 220. rpar= 820. cpar= 0.115e-06 erzl= 1 rsl = 220. rpl = 820. cpl = 0.115e-06 zin fr 300 500 3k 3.4k at- 0 20 20 16 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 27 27 23 at+ 23 27 27 0
semiconductor group 678 application notes vi brd.spe fref = 1014.0 law = a uref = 0.9480 rlx = 0. rlr = -7.0 abimp = zi erzi= 1 rser= 220. rpar= 820. cpar= 0.115e-06 erzl= 1 rsl = 220. rpl = 820. cpl = 0.115e-06 zin fr 300 500 3k 3.4k at- 0 20 20 20 at+ 16 20 20 0 zmir fr 4k 12k at- 30 3 at+ 30 3 da,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 da,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 da,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k ad,upper fr 300 500 2.7k 3k 3.4k at- 100 .75 .25 .35 .75 at+ .75 .25 .35 .75 100 ad,lower fr 300 3.4k at- 0 -.25 at+ -.25 0 ad,delay fr 500 600 1k 2.6k 2.8k gd- 10k .420 .150 .085 .150 gd+ .420 .150 .085 .150 10k dd fr 300 500 2.5k 3.4k at- 0 29 29 23 at+ 23 29 29 0
semiconductor group 679 application notes vi appendix a2 measurements note : the masks on the plots corresponds to ccitt recommendations g.712 and g.714
semiconductor group 680 application notes vi figure 10 freq/hz res/dbm0 2208 32.77 2309 32.69 2409 32.65 2509 32.67 2610 32.76 2710 32.91 2811 33.14 2911 33.43 3011 33.74 3112 34.03 3212 34.18 3312 34.05 3413 33.55 3513 32.66 freq/hz res/dbm0 201 22.10 301 28.28 402 31.08 502 32.02 602 32.34 703 32.50 803 32.65 903 32.80 1004 32.96 1104 33.11 1205 33.26 1305 33.37 1405 33.45 1506 33.48 1606 33.46 1706 33.39 1807 33.29 1907 33.16 2008 33.02 2108 32.89 1
semiconductor group 681 application notes vi figure 11 freq/hz res/dbm0 2208 -0.01 2309 -0.02 2409 -0.04 2509 -0.08 2610 -0.13 2710 -0.16 2811 -0.18 2911 -0.19 3011 -0.20 3112 -0.21 3212 -0.24 3312 -0.28 3413 -0.36 3513 -0.58 freq/hz res/dbm0 201 -0.72 301 -0.05 402 -0.01 502 -0.03 602 -0.04 703 -0.01 803 -0.02 903 -0.06 1004 -0.11 1104 -0.14 1205 -0.15 1305 -0.15 1405 -0.15 1506 -0.12 1606 -0.09 1706 -0.06 1807 -0.04 1907 -0.01 2008 -0.01 2108 -0.00 1
semiconductor group 682 application notes vi figure 12 freq/hz res/dbm 2208 -0.09 2309 -0.07 2409 -0.05 2509 -0.02 2610 -0.00 2710 -0.04 2811 -0.06 2911 -0.09 3011 -0.11 3112 -0.13 3212 -0.14 3312 -0.19 3413 -0.26 3513 -0.43 freq/hz res/dbm 201 -0.65 301 0.04 402 0.09 502 0.12 602 0.12 703 0.10 803 0.07 903 0.03 1004 0.00 1104 -0.03 1205 -0.04 1305 -0.04 1405 -0.02 1506 0.00 1606 0.02 1706 0.04 1807 0.06 1907 0.09 2008 0.10 2108 0.09 1
semiconductor group 683 application notes vi figure 13 freq/hz res/dbm0 2208 -6.94 2309 -6.95 2409 -6.98 2509 -7.00 2610 -7.03 2710 -7.05 2811 -7.07 2911 -7.09 3011 -7.11 3112 -7.12 3212 -7.14 3312 -7.18 3413 -7.26 3513 -7.42 freq/hz res/dbm0 201 -7.36 301 -7.00 402 -6.93 502 -6.91 602 -6.91 703 -6.94 803 -6.97 903 -7.00 1004 -7.02 1104 -7.03 1205 -7.03 1305 -7.02 1405 -7.01 1506 -6.99 1606 -6.97 1706 -6.95 1807 -6.93 1907 -6.92 2008 -6.92 2108 -6.93 1
semiconductor group 684 application notes vi figure 14 freq/hz res/dbm 2208 0.08 2309 0.06 2409 0.03 2509 0.01 2610 -0.02 2710 -0.05 2811 -0.07 2911 -0.08 3011 -0.10 3112 -0.11 3212 -0.13 3312 -0.17 3413 -0.26 3513 -0.41 freq/hz res/dbm 201 -0.36 301 0.01 402 0.09 502 0.11 602 0.11 703 0.08 803 0.05 903 0.02 1004 0.00 1104 -0.01 1205 -0.01 1305 -0.01 1405 0.01 1506 0.03 1606 0.05 1706 0.07 1807 0.08 1907 0.09 2008 0.09 2108 0.09 1
semiconductor group 685 application notes vi figure 15 freq/hz res/dbm0 2208 -29.72 2309 -29.91 2409 -30.72 2509 -32.26 2610 -34.98 2710 -39.64 2811 -50.70 2911 -43.61 3011 -37.18 3112 -33.95 3212 -32.40 3312 -32.05 3413 -32.50 3513 -33.51 freq/hz res/dbm0 201 -22.83 301 -28.06 402 -34.42 502 -41.08 602 -36.73 703 -33.12 803 -31.24 903 -30.36 1004 -30.17 1104 -30.58 1205 -31.56 1305 -33.20 1405 -35.67 1506 -39.10 1606 -41.22 1706 -38.35 1807 -35.00 1907 -32.63 2008 -31.05 2108 -30.09 1
semiconductor group 686 application notes vi figure 16 correlation (all filters off) freq/hz res/dbm 2108 28.28 2208 28.38 2309 28.49 2409 28.62 2509 28.75 2610 28.87 2710 28.98 2811 29.07 2911 29.13 3011 29.17 3112 29.14 3212 29.08 3312 28.95 3413 28.77 freq/hz res/dbm 100 12.10 201 20.35 301 25.27 402 27.73 502 28.85 602 29.25 703 29.31 803 29.19 903 29.01 1004 28.82 1104 28.63 1205 28.47 1305 28.31 1405 28.21 1506 28.13 1606 28.09 1706 28.07 1807 28.09 1907 28.13 2008 28.19 1
semiconductor group 687 application notes vi appendixes a3 result file trafot.res input_file_name: trafot.ctl date: 11.08.88 13:35 spec = brd2.spe slic = trafot.sli byte = ref.byt chnr = 0,a plq = n on = all rel = y short = n opt = z+x+r+b zxrb = nnnn pzin= 0 psp = 0 fz = 300.00 3400.0 zlim = 2.00 zrep =y zsign = 1 fr = 300.00 3400.0 rfil = y rrefq = n rref = .66179 fx = 300.00 3400.0 xfil = y xrefo = n xref = -.13731 fb = 300.00 3400.0 blim = 2.00 tbm = 1 brep = n bsign = 1 apof = .00 dpof = .00 apre = .00 dpre = .00 xzq = -.10888671875000000e+00 .28906250000000000e+00 .63476562500000000e-02 -.30468750000000000e+00 .19531250000000000e+00 xrq = .96777343750000000e+00 -.48828125000000000e-01 -.14526367187500000e-01 -.48828125000000000e-03 .90332031250000000e-02 xxq = .10175781250000000e+01 .15075683593750000e-01 .11474609375000000e-01 .34179687500000000e-02 .97351074218750000e-02 xbq = .21093750000000000e+00 .34375000000000000e+00 .25415039062500000e+00 -.12158203125000000e+00 -.95703125000000000e-01 .15234375000000000e+00 .17822265625000000e-01 -.18798828125000000e+00 .18359375000000000e+00 -.85937500000000000e-01 xgq = .53491210937500000e+00 .21171875000000000e+01 ; bytes for z-filter (13): 20,ba,2a,7b,1b,32,b2,5b bytes for r-filter (2b): 70,23,8f,ec,3c,ac,0b,5d bytes for x-filter (23): 70,e2,97,73,c1,d6,03,36 bytes for gain-factors (30): 41,c3,00,c3 2nd part of bytes b-filter (0b): 00,2c,31,c1,aa,6f,33,23 1st part of bytes b-filter (03): bb,ca,db,2b,46,22,21,2b bytes for b-filter delay (18): 19,19,11,19
semiconductor group 688 application notes vi * trafo slic * parameter : m *z0r1= 700.0 *z0c1= .0000 *z0r2= .0000 *z0c2= .1000e-06 *z0rs= .0000 *z0cs= .0000 *rcu1= 84.00 *rcu2= 105.0 *cw1 = .1135e-09 *cw2 = .1354e-09 * l1 = 1.150 * l2 = 1.150 * m = 1.148 *csp = .1000e-05 * rf = 792.0 * lf = 2.230 * cf = .2670e-08 *zsli = 0.500 run # 1 z-filter calculation results reference impedance for optimization (zi): erzi = 1 rser = 220. cser = .000 rpar = 820. cpar = .115e-0 calculated and quantized coefficients: xz = -.10895 .28881 .00646 -.30563 .19882 xzq = -.10889 .28906 .00635 -.30469 .19531 bytes for z-filter (13): 20,ba,2a,7b,1b,32,b2,5b return loss freq loss freq loss (hz) (db) (hz) (db) 100. 11.948 1800. 32.679 200. 21.095 1900. 32.716 300. 28.062 2000. 32.727 400. 31.054 2100. 32.721 500. 31.555 2200. 32.712 600. 31.454 2300. 32.713 700. 31.340 2400. 32.738 800. 31.309 2500. 32.798 900. 31.359 2600. 32.901 1000. 31.471 2700. 33.051 1100. 31.626 2800. 33.244 1200. 31.807 2900. 33.459 1300. 31.999 3000. 33.660 1400. 32.186 3100. 33.776 1500. 32.357 3200. 33.714 1600. 32.499 3300. 33.375 1700. 32.608 3400. 32.702
semiconductor group 689 application notes vi min. z-loop reserve: 5.721 db at frequency: 8500.0 hz min. z-loop mirror signal reserve: 10.365 db at frequency: 9000.0 hz run # 1 x-filter calculation results calculated and quantized coefficients: xx = 1.01799 .01508 .01135 .00340 .00974 xxq = 1.01758 .01508 .01147 .00342 .00974 bytes for x-filter (23): 70,e2,97,73,c1,d6,03,36 x-filter attenuation function (in db),(always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. -.432 .008 1900. -.137 .002 400. -.395 .006 2000. -.137 .002 500. -.351 .004 2100. -.131 .002 600. -.305 .002 2200. -.119 .001 700. -.257 .000 2300. -.103 .001 800. -.213 -.002 2400. -.082 -.000 900. -.173 -.003 2500. -.060 -.002 1000. -.141 -.004 2600. -.038 -.003 1100. -.118 -.005 2700. -.019 -.004 1200. -.103 -.005 2800. -.005 -.005 1300. -.097 -.004 2900. .003 -.005 1400. -.098 -.004 3000. .003 -.005 1500. -.105 -.002 3100. -.004 -.005 1600. -.114 -.001 3200. -.018 -.004 1700. -.124 .000 3300. -.039 -.003 1800. -.133 .001 3400. -.064 -.002 1900. -.137 .002 3500. .008 .000 2000. -.137 .002 3600. .006 .000 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z vref/vsicofi xref gx .00 - 2.22 - 4.42 - -.14 = -6.50 ideal -.01 = 2.22 + 4.42 + -.14 + -6.52 quant second byte for gain: ,00,c3 calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz reference impedance for optimization (zi): erzi = 1 rser = 220. cser = .000 rpar = 820. cpar = .115e-0
semiconductor group 690 application notes vi tgref ca = .305 ms tgref cb = .318 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 17.538 5.266 2000. -.076 .012 200. .700 2.515 2100. -.079 .016 300. .018 .901 2200. -.077 .022 400. -.056 .459 2300. -.070 .028 500. -.079 .271 2400. -.059 .035 600. -.078 .171 2500. -.046 .043 700. -.062 .112 2600. -.031 .053 800. -.040 .073 2700. -.017 .065 900. -.018 .047 2800. -.004 .079 1000. .001 .029 2900. .008 .097 1100. .014 .017 3000. .021 .119 1200. .020 .009 3100. .037 .147 1300. .018 .004 3200. .062 .181 1400. .010 .001 3300. .107 .226 1500. -.004 .000 3400. .189 .285 1600. -.020 .001 3500. .339 .367 1700. -.038 .002 3600. .627 .488 1800. -.054 .005 3700. 1.228 .685 1900. -.067 .008 3800. 2.702 1.023 run # 1 r-filter calculation results calculated and quantized coeffizients: xr = .96755 -.04884 -.01447 -.00040 .00910 xrq = .96777 -.04883 -.01453 -.00049 .00903 bytes for r-filter (2b): 70,23,8f,ec,3c,ac,0b,5d r-filter attenuation function (in db), (always absolute values) freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 300. .797 -.007 1900. .101 .008 400. .798 -.008 2000. .065 .009 500. .796 -.009 2100. .040 .009 600. .788 -.010 2200. .026 .008 700. .773 -.010 2300. .020 .007 800. .749 -.010 2400. .022 .006 900. .714 -.010 2500. .030 .005 1000. .669 -.009 2600. .039 .003 1100. .614 -.007 2700. .050 .002 1200. .551 -.005 2800. .057 .001 1300. .482 -.003 2900. .061 .000 1400. .409 -.001 3000. .060 -.000 1500. .337 .001 3100. .052 -.000 1600. .267 .004 3200. .039 .000 1700. .203 .005 3300. .020 .001 1800. .147 .007 3400. -.002 .002 1900. .101 .008 3500. -.007 .000 2000. .065 .009 3600. -.008 .000 gr results: all attenuation values (in db) refer to fref= 1014. hz
semiconductor group 691 application notes vi -rlr slic+z vsicofi/vref rref gr 7.00 - 5.32 - -4.42 - .66 = 5.44 ideal 7.00 = 5.32 + -4.42 + .66 + 5.43 quant first byte for gain (30): 41,c3 calculation of receive transfer function (da) all attenuation values (in db) refer to fref = 1014.0 hz reference impedance for optimization (zi): erzi = 1 rser = 220. cser = .000 rpar = 820. cpar = .115e-0 tgref ca = .262 ms tgref cb = .244 ms freq loss gd freq loss gd (hz) (db) (msec) (hz) (db) (msec) 100. 3.702 2.741 2000. -.105 .025 200. .355 .717 2100. -.105 .031 300. .008 .300 2200. -.099 .037 400. -.086 .159 2300. -.089 .043 500. -.105 .093 2400. -.075 .051 600. -.094 .056 2500. -.059 .059 700. -.070 .034 2600. -.043 .069 800. -.044 .019 2700. -.028 .082 900. -.021 .010 2800. -.014 .097 1000. -.004 .004 2900. -.003 .115 1100. .004 .001 3000. .008 .137 1200. .004 .000 3100. .021 .164 1300. -.004 .000 3200. .043 .199 1400. -.017 .002 3300. .083 .243 1500. -.035 .005 3400. .158 .302 1600. -.054 .008 3500. .300 .384 1700. -.072 .012 3600. .577 .506 1800. -.088 .016 3700. 1.166 .703 1900. -.099 .020 3800. 2.625 1.041 run # 1
semiconductor group 692 application notes vi b-filter calculation results reference impedance for optimization (zl): erzl = 1 rsl = 220. csl = .000 rpl = 820. cpl = .115e-0 calculated and quantized coefficients: xb = .20818 .34529 .25405 -.12179 -.09620 .15308 .01798 -.18711 .18355 -.08915 xbq = .21094 .34375 .25415 -.12158 -.09570 .15234 .01782 -.18799 .18359 -.08594 2nd part of bytes b-filter (0b): 00,2c,31,c1,aa,6f,33,23 1st part of bytes b-filter (03): bb,ca,db,2b,46,22,21,2b trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 22.979 1800. 38.757 200. 21.665 1900. 36.141 300. 26.651 2000. 34.677 400. 32.370 2100. 34.020 500. 42.075 2200. 34.049 600. 47.207 2300. 34.748 700. 37.954 2400. 36.166 800. 34.818 2500. 38.311 900. 33.479 2600. 40.525 1000. 33.128 2700. 40.406 1100. 33.521 2800. 37.955 1200. 34.636 2900. 35.622 1300. 36.631 3000. 34.139 1400. 40.013 3100. 33.619 1500. 46.646 3200. 34.277 1600. 57.076 3300. 36.848 1700. 43.595 3400. 44.261 additonal b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19
semiconductor group 693 application notes vi appendix a4 listing of fortran slic program c##############################################################c c### ###c program trafot c### ###c c### version v3.1 mr. glasser jan 1989 ###c c### revision v3.2 mr. kliese feb 1989 ###c c### revision v3.3 subroutine imped6 ###c c### mr. kliese aug 1989 ###c c### ###c c### copyright 1989 siemens ag munich, west germany ###c c### mr kliese tel (089) 4144-3662 ###c c### ###c c##############################################################c c### ###c c### the following program calculates the m- or k- ###c c### parameters of a transformer slic. ###c c### it uses complex calculations and a-parameters matrixes.###c c### the data to be hold during the execution are stored ###c c### in 'common fields', which names begin by 'q'. ###c c### the transformer is calculated in the subroutine ###c c### trslic and its feeding in the subroutine zfeed. ###c c### complex matrix multiplication is made by the ###c c### subroutine cmatmul. ###c c### c### note: fortran requires at least 7 spaces at the ###c c### beginning of a line ; a sign (e.g.'&')in the 6th ###c c### place means that the line continues underneath. ###c c### '*'or 'c' are comments. ###c c### ###c c##############################################################c * **************************************************************** * declaration of variables * **************************************************************** * implicit variables beginning with a,b,...k and * m...z are declared as logical; variables beginning * with l are declared as character : if a variable * has not been declared the compiler will give a warning. * implicit logical (a-k,m-z),character (l) * integer in,out,i,erz0 * character*1 para character*12 fileout,infile,b1,b2,b3,b4 * real csp,cw1,m,l1,l2,rcu1,rcu2,rf,lf,cf,cw2 real pi2,r5,r6,r7,c5,r4,r3,c3,zsli,freq
semiconductor group 694 application notes vi real z0r1,z0r2,z0c1,z0c2,z0rs,z0cs real zgr1,zgr2,zgc1,zgc2,zgrs,zgcs complex z0,a,b,a11,a12,a21,a22,adet,ar,ax,zin,zg,den complex m11tab(399),m12tab(399),m21tab(399),m22tab(399) complex m11,m12,21,m22 complex k11tab(399),k12tab(399),k21tab(399),k22tab(399) complex k11,k12,k21,k22 logical linfil * data storage for 2*pi common /qpi2/ pi2 * data storage for parameter common /qpara/ para * data storage for matching impedance z0 common /qz0/ z0r1,z0r2,z0c1,z0c2,z0rs,z0cs * data storage for line/source impedance zg common /qzg/ zgr1,zgr2,zgc1,zgc2,zgrs,zgcs * data storage for transformer common /qtr/ rcu1,rcu2,cw1,l1,cw2,rf,lf,cf,csp,l2,m * data storage for m-parameters tables (containing 399 values each) common /qm/ m11tab,m12tab,m21tab,m22tab * ***************************************************************** * program begins: * ***************************************************************** * screen out = 6 * keyboard in = 5 * 2*pi calculation pi2 = 4.* asin(1.) * reading file names fileout = '' infile = '' write(out,'(a)') 'trafot slic program version v3.3 siemens ag munich, aug. 1989' write(out,'(a\)') &' enter input file name(xxxxxxxx.inp):' 10 read (in,'(a)') infile inquire (file = infile,exist = linfil) if (index(infile,'').eq.1.or.(.not.linfil) & .or.(index(infile,'.inp').eq.0 & .and.index(infile,'.inp').eq.0))then write (out,'(a\)')'enter correct input file name:' infile='' goto 10 endif * reading input file * note: every second line is read open (10, file=infile, err=1100, status= 'old') c write(6,*) 'reading input file' read(10,'(a)')
semiconductor group 695 application notes vi read(10,'(a)')para read(10,'(a)') read(10,*) rcu1,rcu2 read(10,'(a)') read(10,*) cw1,cw2 read(10,'(a)') read(10,*) l1,l2,m read(10,'(a)') read(10,*) csp read(10,'(a)') read(10,*) rf,lf,cf read(10,'(a)') read(10,*) zsli read(10,'(a)') read(10,'(a)') read(10,*) z0r1,z0c1,z0c2,z0r2,z0rs,z0cs read(10,'(a)') read(10,'(a)') read(10,*) zgr1,zgc1,zgc2,zgr2,zgrs,zgcs read(10,'(a)') close (10) * c************************************************************* c screen picture of trafot slic c using ansi.sys driver c************************************************************* write (out,'(a)')' --------- & | +---------+' write (out,'(a)') | trans- | transmit-> & +---------|vin ' write (out,'(a)')' | verse | & | ' write (out,'(a)')' __ | feeding | __ __ &__ __ |__ ' write (out,'(a)') +- __+---o---- +----o--- __+--- __+---o--- &__+--- __+---o--- __+-- vout ' write (out,'(a)') zg/2| csp=| rcu1= l1-m l &2-m rcu2= |z0 ' write (out,20) csp, rcu1 rcu2 20 format (' o | ',g10.4,' ', g10.4,' & ',g10.4,' | s ') write (out,21) m 21 format (' |+-+ | --- +-+ m= &' ,g10.4,' --- | | ') write (out,'(a)')' |+-+zsp | --- cw1= +-+ & cw2= --- | c ' write (out,22) cw1, cw2 22 format (' o | | ',g10.4,' & ',g10.4,' | o ') write (out,'(a)')' __ | |
semiconductor group 696 application notes vi & | f ' write (out,'(a)')' +- __+---o----------o-----------------o---- &-------------o | | ' write (out,'(a)')' zg/2 | | & | ' write (out,'(a)')' |_________| <-receive & | +---------+' write (out,42) zsli 42 format('slic loop attenuation zsli=', g10.4) write (out,43) rf, lf, cf 43 format('feeding zsp: rf=',g10.4,' lf=',g10.4, &' cf=',g10.4) write (out,44) l1, l2 44 format('leaking inductance: l1=',g10.4,' l2=',g10.4) write(out,45) 45 format('matching impedance: z0r1 z0c1 z0c2 z0r2 & z0rs z0c') write(out,46) z0r1, z0c1, z0c2, z0r2, z0rs, z0cs 46 format(' ',g10.4, g10.4, g10.4, c46 format(' ',g10.4,'', g10.4,'', g10.4, c &'', g10.4,'', g10.4,'',g10.4) & g10.4, g10.4, g10.4) write(out,47) 47 format('source/line impedance: zgr1 zgc1 zgc2 zgr2 & zgrs zgcs') write(out,48) zgr1, zgc1, zgc2, zgr2, zgrs, zgcs 48 format(' ', g10.4, g10.4, g10.4, c 48 format(' ', g10.4,'', g10.4,'', g10.4,'', c & g10.4,'', g10.4,'',g10.4) & g10.4, g10.4, g10.4) c************************************************************ write(out,'(a\)')' enter output file name (xxxxxxxx.sli):' 50 read (in,'(a)') fileout if (index(fileout,'').eq.1 & .or.(index(fileout,'.sli').eq.0 & .and.index(fileout,'.sli').eq.0)) then write (out,'(a\)') & 'enter correct output file name (with extention .sli):' fileout='' goto 50 endif
semiconductor group 697 application notes vi ************************************************************** * documentaion part * ************************************************************** * opening and writing output file * * * * each variable (e.g.zgr1) is put in a buffer (e.g.b1) * * and this buffer is concatenate with the string containing * * the variable name (e.g.'*zgr1'). * * * note: the "*" at the beginning is necessary for the sicofi * * program to consider these lines as comments. * ************************************************************** * open (30, file=fileout, err=1000, status='unknown') * write (30,'(a)')'* trafo slic' write (30,'(a)')'* parameter:'//para if (para.ne.'m') then write (b1,'(g11.4)') zgr1 write (b2,'(g11.4)') zgc1 write (b3,'(g11.4)') zgr2 write (b4,'(g11.4)') zgc2 write (30,'(a)')'*zgr1='//b1//'*zgc1='//b2// & '*zgr2='//b3//'*zgc2='//b4 write (b2,'(g11.4)') zgrs write (b3,'(g11.4)') zgcs write (30,'(a)')'*zgrs='//b2//'*zgcs='//b3 endif write (b1,'(g11.4)') z0r1 write (b2,'(g11.4)') z0c1 write (b3,'(g11.4)') z0r2 write (b4,'(g11.4)') z0c2 write (30,'(a)')'* z0r1='//b1//'*z0c1='//b2// & '*z0r2='//b3//'*z0c2='//b4 write (b2,'(g11.4)') z0rs write (b3,'(g11.4)') z0cs write (30,'(a)')'*z0rs='//b2//'*z0cs='//b3 write (b1,'(g11.4)') rcu1 write (b2,'(g11.4)') rcu2 write (b3,'(g11.4)') cw1 write (b4,'(g11.4)') cw2 write (30,'(a)')'*rcu1='//b1//'*rcu2='//b2// & '*cw1='//b3//'*cw2='//b4 write (b1,'(g11.4)') l1 write (b2,'(g11.4)') l2 write (b3,'(g11.4)') m write (30,'(a)')'* l1='//b1//'*l2='//b2//'* m ='//b3 write (b2,'(g11.4)') csp write (30,'(a)')'* csp ='//b2 write (b1,'(g11.4)') rf write (b2,'(g11.4)') lf write (b3,'(g11.4)') cf write (30,'(a)')'* rf ='//b1//'*lf ='//b2//'* cf ='//b3 * zsli: worst case half loop
semiconductor group 698 application notes vi write (b2,'(g11.4)') zsli write (30,'(a)')'*zsli='//b2 write (30,'(a)')'zsli' write (30,'(g11.4)') zsli * ************************************************************** * calculation part * ************************************************************** * write (out,*)'running preliminary calculations...' do 177 i=1,399 freq = real(i*10) * calculates for m parameters if (para.eq.'m') then * m11 call z0w(freq,z0) call trslic(freq,a11,a12,a21,a22,adet) den = a11*z0 + a12 m11 =(a21*z0+a22)/den c (a11*z0+a12) * m12 m12 = -adet/den c (a12+a11*z0) * m21 m21 = z0/den c (a12+z0*a11) * m22 m22 = a12/den c (a12+z0*a11) * put the calculated values in the corresponding tables m11tab(i)=m11 m12tab(i)=m12 m21tab(i)=m21 m22tab(i)=m22 else * calculates for k parameters * k11 call z0w(freq,z0) call zgw(freq,zg) call trslic(freq,a11,a12,a21,a22,adet) zin = (a11*z0+a12)/(a21*z0+a22) k11 = (zin-zg)/(zin+zg) * k12 k12 = 2.*adet*zg/ & (zg*(a22+a21*z0) + (a12+a11*z0)) * k21 k21 = z0/ & (z0*(a11+a21*zg) + (a12+a22*zg)) * k22 k22 = (a22*zg+a12)/ & (z0*(a11+a21*zg) + (a12+a22*zg)) c put the calculated values in the corresponding tables k11tab(i)=k11 k12tab(i)=k12 k21tab(i)=k21 k22tab(i)=k22
semiconductor group 699 application notes vi endif 177 continue * if (para.eq.'m') then * writing the mij values in the output file write (30,'(a)')'m11-table' write (out,'(a)')'+running m11 calculation... do 100 i=1,399 freq = real(i*10) write (30,*) freq,real(m11tab(i)),aimag(m11tab(i)) 100 continue write (30,'(a)')'m12-table' write (out,'(a)')'+running m11, m12 calculation...' do 110 i=1,399 freq = real(i*10) write (30,*) freq,real(m12tab(i)),aimag(m12tab(i)) 110 continue write (30,'(a)')'m21-table' write (out,'(a)')'+running m11, m12, m21 calculation...' do 120 i=1,399 freq = real(i*10) write (30,*) freq,real(m21tab(i)),aimag(m21tab(i)) 120 continue write (30,'(a)')'m22-table' write (out,'(a)')'+running m11, m12, m21, m22 calculation...' do 130 i=1,399 freq = real(i*10) write (30,*) freq,real(m22tab(i)),aimag(m22tab(i)) 130 continue else * writing the kij value in the output file write (30,'(a)')'k11-table' write (out,'(a)')'+running k11 calculation... do 200 i=1,399 freq = real(i*10) write (30,*) freq,real(k11tab(i)),aimag(k11tab(i)) 200 continue write (30,'(a)')'k12-table' write (out,'(a)')'+running k12 calculation...' do 210 i=1,399 freq = real(i*10) write (30,*) freq,real(k12tab(i)),aimag(k12tab(i)) 210 continue write (30,'(a)')'k21-table' write (out,'(a)')'+running k21 calculation...' do 220 i=1,399 freq = real(i*10) write (30,*) freq,real(k21tab(i)),aimag(k21tab(i)) 220 continue write (30,'(a)')'k22-table' write (out,'(a)')'+running k22 calculation...' do 230 i=1,399 freq = real(i*10)
semiconductor group 700 application notes vi write (30,*) freq,real(k22tab(i)),aimag(k22tab(i)) 200 continue endif write(30,'(a1)')';' close (30) write(out,'(a)')'+data written in file: '//fileout stop * error melding 1000 write(out,'(a)')'open error at output-file:'//fileout stop 1 1100 write(out,'(a)')'open error at input-file:'//infile stop 2 end * end of main program * * auxiliary subroutines: c c###############################################################c c subroutine zfeed(freq,y5) c c###############################################################c c c input parameters: freq c c output parameters: y5 [complex] c (admittance of transverse feeding) c c common blocks: qtr,qpi2 c c task of this routine: calculates the equivalent admittance c of the transverse feeding: c y5 = (rf + lf) // cf c c routine called in the following subroutines or functions: c trslic c###############################################################c c implicit logical (a-k,m-z),character (l) real freq,pi2,omega,rf,lf,cf,qu real rcu1,rcu2,cw1,l1,cw2,csp,l2,m complex y5 * common/qtr/rcu1,rcu2,cw1,l1,cw2,rf,lf,cf,csp,l2,m common/qpi2,pi2 c omega = pi2*freq y5 = ( 1./cmplx(rf,omega*lf)) + cmplx(0,omega*cf) return end c
semiconductor group 701 application notes vi c################################################################### c subroutine trslic(freq,a11,a12,a21,a22,adet) c c################################################################### c c input parameters: freq [real] c c output parameters: a11, a12, a21, a22, adet c [complex] c c common blocks: qtr,qslic,qpi2 c c task of this routine: calculates the a-parameters describing c the transformer. c c required subroutines: zfeed,cmatmul c c note: aa(1,i,j): real part of aa(i,j) c aa(2,i,j):imaginary part of aa(i,j) c c################################################################### c implicit logical (a-k,m-z),character (l) real r(6,3),y(2,2,2),omcsp real x(4,2),omega,pi2 real csp,cw2,freq,cw1,l1,l2,rcu1,rcu2,rf,lf,cf,m real aa(2,2,2),bb(2,2,2),yinv(2,2,2) real a1(2,2,2),a2(2,2,2),a3(2,2,2),a4(2,2,2) real a5(2,2,2),a6(2,2,2),a7(2,2,2) complex y1,y2,y3,y4.y5,c,d,e,f,xd,u,v,a11,a12 complex a21,a22,adet,y6,y7 * common/qtr/rcu1,rcu2,cw1,l1,cw2,rf,lf,cf,csp,l2,m common/qpi2/pi2 c omega = pi2*freq omcsp = omega*csp * blocking capacitor y7 = cmplx(0.,omcsp) * parallel feeding call zfeed(freq,y5) * admitances in the equivalent circuit * y1 y1 = 1./cmplx(rcu1,(omega*(l1-m))) *y2 y2 = cmplx(0.,(omega*cw1)) *y3 y3 = 1./cmplx(rcu2,(omega*(l2-m))) *y4 y4=cmplx(0.,omega*cw2)) *y6
semiconductor group 702 application notes vi y6=cmplx(0.,(-1./(omega*m))) * corresponding matrixe call para(y6,a6) call sera(y1,a1) call sera(y3,a3) call para(y2,a2) call para(y4,a4) call para(y5,a5) call sera(y7,a7) * matrix multiplications call cmatmul(a5,a7,bb,2,2,2) call cmatmul(bb,a2,aa,2,2,2) call cmatmul(aa,a1,bb,2,2,2) call cmatmul(bb,a6,aa,2,2,2) call cmatmul(aa,a3,bb,2,2,2) call cmatmul(bb,a4,aa,2,2,2) c making complex out of two real a11 = cmplx(aa(1,1,1),aa(2,1,1)) a12 = cmplx(aa(1,1,2),aa(2,1,2)) a21 = cmplx(aa(1,2,1),aa(2,2,1)) a22 = cmplx(aa(1,2,2),aa(2,2,2)) c adet=(a11*a22)-(a12*a21) is the determinant of the a-matrix adet = (11*a22)-(a12*a21) return end
semiconductor group 703 application notes vi c c################################################################### c subroutine sera(y,a) c c################################################################### c c input parameters: y [complex] c c output parameters: a(2,2,2) [array of real] c c common blocks: / c c task of this routine: a matrix for serial admittance c c routine called in the following subroutines or functions: c trslic c################################################################### c implicit logical (a-k,m-z),character (l) real a(2,2,2) complex y,z * z = 1./y a(1,1,1)= 1. a(2,1,1)= 0. a(1,1,2)= real(z) a(2,1,2)= aimag(z) a(1,2,1)= 0. a(2,2,1)= 0. a(1,2,2)= 1. a(2,2,2)= 0. return end c c################################################################### c subroutine para(y,a) c c################################################################### c c input parameters: y [complex] c c output parameters: a(2,2,2) [array of real] c c common blocks:/ c c task of this routine: a matrix for serial admittance c c routine called in the following subroutines or functions: c trslic c################################################################### c implicit logical (a-k,m-z),character (l) real a(2,2,2) complex y
semiconductor group 704 application notes vi * a(1,1) a(1,1,1)= 1. a(2,1,1)= 0. * a(1,2) a(1,1,2)= 0. a(2,1,2)= 0. * a(2,1) a(1,2,1)= real(y) a(2,2,1)= aimag(y) * a(2,2) a(1,2,2)= 1. a(2,2,2)= 0. return end c c##################################################################c c subroutine z0w(freq,z0) c c##################################################################c implicit logical (a-k,m-z),character(l) complex z0 real z0r1,freq,z0r2,z0c1,z0c2,z0rs,z0cs common/qz0/z0r1,z0r2,z0c1,z0c2,z0rs,z0cs * call imped6(z0r1,z0r2,z0c1,z0c2,z0rs,z0cs,freq,z0) return end c##################################################################c c subroutine zgw(freq,zg) c c##################################################################c implicit logical (a-k,m-z),character(l) complex zg real zgr1,freq,zgr2,zgc1,zgc2,zgrs,zgcs common/qzg/zgr1,zgr2,zgc1,zgc2,zgrs,zgcs * call imped6(zgr1,zgr2,zgc1,zgc2,zgrs,zgcs,freq,zg) return end
semiconductor group 705 application notes vi c##################################################################c c### ###c subroutine imped6(rp1,rp2,cp1,cp2,rs,cs,freq,zeq) c### ###c c### note: when a parameter is set to 0 then the ###c c### corresponding resistor or capacitance does not exist ###c c### ###c c### formal parameter list:rp1,rp2,cp1,cp2,rs,cs,freq,zeq ###c c### ###c c### input parameters: ###c c### rs [real] ; series resistance ###c c### cs [real] ; series capacitance ###c c### rp1 [real] ; parallel resistance ###c c### rp2 [real] ; parallel resistance ###c c### cp1 [real] ; parallel capacitance ###c c### cp2 [real] ; parallel capacitance ###c c### freq [real] ; frequency ###c c### ###c c### output parameters: ###c c### zeq [complex] ###c c### ###c c### common blocks: qpi2 ###c c### ###c
semiconductor group 706 application notes vi c### task of this routine: equivalent impedance of: ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### special cases: ###c c### a. system parallel ###c c### 1. cp1 not 0 ###c c### 1.1 rp1 not 0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### 1.2 rp1 =0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### 2. cp1 =0 ###c c### ###c c### 2.1 rp1 not 0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### 2.2 rp1 =0 ###c c### ###c c### ###c c### ###c c### 3. idem if cp2 =0 ###c c### ###c c### 4. rp2=0 and rp1 =0 ###c c### ###c c### ###c c### ###c c### ###c c### ###c
semiconductor group 707 application notes vi c### 5.cp2 =0 and cp1 =0 ###c c### c. conclusion: zeq = sum of the two ###c c### systems in any case ###c c### ###c c###############################################################c c ###c implicit logical (a-k,m-z),character (l) real cp1,cp2,rp1,rp2 real cs,rs,n,ul real freq,pi2,omega complex d,c,zeq,za,zb * common/qpi2/pi2 * omega = pi2*freq if (cp1.eq.0) then c=cmplx(rp1,0.) else c = rp1 + (1./cmplx(0.,omega*cp1)) endif if (cp2.eq.0) then d=cmplx(rp2,0.) else d = rp2 + (1./cmplx(0.,omega*cp2)) endif n = cabs(c) ul = cabs(d) * if one of them is 0 then no parallel calculation if ((n.eq.0.).or.(ul.eq.0.)) then za=c+d else * za = c & d in parallel za=c*d/(c+d) endif c system series if (cs.eq.0) then zb=cmplx(rs,0.) else zb = rs +(1./cmplx(0.,omega*cs)) endif c### ###c c### ###c c### ###c c### ###c c### ###c c### ###c c### b. system series ###c c### 1. cs = 0 ###c c### ###c c### 1. rs = 0 ###c c### ###c c### idem system a ###c c### ###c c### ###c c### ###c c### ###c
semiconductor group 708 application notes vi c both zeq=za+zb return end c c################################################################### c subroutine cmatmul(a,b,c,l,mm,n) c c################################################################### c c input parameters: c a [real] array [2,l,mm] c b [real] array [2,mm,n] c l (integer) c mm (integer) c n (integer) c c example: a(i,j) = a(1,i,j) + j*a(2,i,j) c output parameters: c c = [real] array [2,l,n] c c task of this routine: c = a*b c subroutine for the complex matrix multiplication c c routine called in the following subroutines or functions: c trslic c important notice: it is not possible to do a*a=a c################################################################### c implicit logical (a-k,m-z),character (l) integer i,j,k,l,mm,n real a(2,l,mm),b(2,mm,n) real c(2,l,n) * do 10 i=1,l do 10 j=1,n c(1,i,j)=0.0 c(2,i,j)=0.0 c complex multiplication: a(2,i,k) * b(2,k,j) = d(2,i,j) do 20 k=1,mm c(1,i,j)=c(1,i,j)+a(1,i,k)*b(1,k,j)-a(2,i,k)*b(2,k,j) c(2,i,j)=c(2,i,j)+a(2,i,k)*b(1,k,j)+a(1,i,k)*b(2,k,j) 20 continue 10 continue return end
semiconductor group 709 application notes vi appendix a5 bibliography 1. "der bertrager der nachrichtentechnik" gnter h.domsch akademische verlagsgesellschaft geest & portig k.g. leipzig 2. "transformers for electronic circuits" nathan r.grossner mc.graw-hill book company 3. (*) "linear integrated networks" g.s.moschytz bell telephone laboratories series van nostrand reinhold company
semiconductor group 710 application notes vii sicofi ? application together with transformer slic for usa specification contents page 1introduction ......................................................................................................... 711 2 circuit description .............................................................................................. 711 3 calculation .......................................................................................................... 713 4 conclusion .......................................................................................................... 719 5 appendix ............................................................................................................. 719
semiconductor group 711 application notes vii 1 introduction the requirements for an analog line card on the usa market are oriented on the at&t speci- fication for the public network. the return loss has to be very high (> 32 db) and it is a 3 db gain in transmit direction and a 3 db loss in receive direction needed. if a transformer slic with series line feeding will be used, a great transformer (for dc-current) has to be taken. in this note a slic circuit for the usa-specification with series feeding, a high return loss and a good echo return loss is presented. 2 circuit description this slic needs some external components, which support the 3 db gain in transmit direction and a loss of 3 db in receive direction. this hardware supports the b-filter of the sicofi, too. in the following refer to figure 1 on the next page. the resistor r 8 is used for serial feeding. the feeding has to be symmetrically to ground and therefore it is possible to place the battery between the half of r 8 of both lines. this resistor and the impedance z 0 put in the return loss. the z 0 is transformed with the winding ratio of the transformer. by the resistor r 8 and by the ratio of the transformer (here: = 1) the op1 has to amplify the signal. the op1 amplifies the received signal and the transmit direction must have a gain of 3 db, therefore the b-filter of the sicofi can not set the echo return loss. the op2 is used as a subtraction amplifier. op2 amplifies the transmit signal and subtracts the receive signal. in this case a good echo return loss can be achieved. r 5 and r 6 set the gain of the transmit signal. c 3 , r 3 and r 4 set the subtracting factor. the ca- pacitances c 1 and c 3 are decoupling the dc of the op's. because the input impedance of the sicofi is very high (m w C g w ). r 7 forms together with c 2 a defined time constant.
semiconductor group 712 application notes vii figure 1 transformer slic with series feeding
semiconductor group 713 application notes vii 3calculation the sicofi coefficient program calculates the coefficients for this transformer slic applica- tion. the result file is shown now: result file: input_file_name: date: 19. april 1989 spec = usa.spe slic = test1.mes byte = com.byt chnr = 0,a plq = n on = all rel = y short = n opt = z+x+r+b zxrb = ooon fz = 300.00 3400.0 zlim = 2.00 zrep =n zsign = 1 fr = 200.00 3400.0 rfil = y rrefq = n rref = 0.13303 fx = 300.00 3300.0 xfil = y xrefq = n xref =-0.20747 fb = 300.00 3400.0 blim = 2.00 tbm = 1 brep = y bsign = 1 apof = 0.00e+00 dpof = 0.00e+00 apre = 0.00e+00 dpre = 0.00e+00 xzq = 0.42968750000000000e-01 -0.97656250000000000e-03 -0.21484375000000000e-01 -0.11962890625000000e-01 0.23681640625000000e-01 xrq = 0.9921875000 -0.0019531250 0.0087890625 0.0000000000 0.0058590000 xxq = 1.0234375000 0.0175781250 -0.0058593750 0.0175781250 - 0.000976000 xbq = 0.12451171875000000e+00 -0.20312500000000000e+00 0.24023437500000000e+00 -0.66894531250000000e-01 -0.19531250000000000e+00 0.18359375000000000e+00 0.46630859375000000e-01 -0.27929687500000000e+00 0.26953125000000000e+00 -0.13671875000000000e+00 xgq = 0.5390625000 1.9062500000 ; bytes for z-filter (13): 50,da,ae,ec,a1,8f,5b,a1 bytes for r-filter (2b): 60,29,90,60,b9,8d,0c,9e bytes for x-filter (23): d0,d8,95,eb,29,95,0b,a5 bytes for gain-factors (30): 31,1a,00,ab 2nd part of bytes b-filter (0b): 00,4b,21,24,3a,5c,e1,13 1st part of bytes b-filter (03): ac,ba,4c,23,2d,ba,31,9f bytes for b-filter delay (18): 19,19,11,19
semiconductor group 714 application notes vii run # 1 z-filter calculation results reference impedance for optimization (zi): erzi = 1 rser = 0.60e+03 cser = 0.00e+00 rpar = 0.00e+00 cpar = 0.00e+0 calculated and quantized coefficients: xz = 0.04365 -0.00107 -0.02153 -0.01207 0.02380 xzq = 0.04297 -0.00098 -0.02148 -0.01196 0.02368 bytes for z-filter (13): 50,da,ae,ec,a1,8f,5b,a1 return loss freq loss freq loss (hz) (db) (hz) (db) 100. 20.730 1800. 45.638 200. 26.652 1900. 45.382 300. 30.370 2000. 46.163 400. 34.691 2100. 47.060 500. 36.589 2200. 48.100 600. 40.543 2300. 48.591 700. 44.228 2400. 49.615 800. 47.593 2500. 50.019 900. 51.728 2600. 51.354 1000. 57.415 2700. 54.655 1100. 60.717 2800. 55.913 1200. 53.655 2900. 54.597 1300. 50.692 3000. 53.429 1400. 47.352 3100. 52.410 1500. 46.852 3200. 51.385 1600. 46.116 3300. 49.153 1700. 45.321 3400. 47.402 min. z-loop reserve: 42.834 db at frequency: 8500.0 hz min. z-loop mirror signal reserve: 44.918 db at frequency: 16000.0 hz
semiconductor group 715 application notes vii run # 1 x-filter calculation results calculated and quantized coefficients: xx = 1.02160 0.01799 -0.00562 0.01789 -0.00021 xxq = 1.02344 0.01758 -0.00586 0.01758 -0.00098 bytes for x-filter (23): d0,d8,95,eb,29,95,0b,a5 freq loss freq loss (hz) (db) (hz) (db) 300. -0.409 1900. -0.219 400. -0.387 2000. -0.243 500. -0.361 2100. -0.265 600. -0.331 2200. -0.286 700. -0.300 2300. -0.302 800. -0.269 2400. -0.313 900. -0.238 2500. -0.317 1000. -0.211 2600. -0.313 1100. -0.188 2700. -0.301 1200. -0.170 2800. -0.280 1300. -0.158 2900. -0.250 1400. -0.154 3000. -0.213 1500. -0.156 3100. -0.170 1600. -0.164 3200. -0.122 1700. -0.179 3300. -0.072 1800. -0.197 3400. -0.021 1900. -0.219 3500. 0.005 2000. -0.243 3600. 0.004 gx results: all attenuation values (in db) refer to fref = 1014. hz rlx slic+z vref/vsicofi xref gx -3.00 - -3.33 - 6.17 - -0.21 = -5.63 ideal -2.97 = -3.33 + 6.17 + -0.21 + -5.60 quant second byte for gain: ,00,ab calculation of transmit transfer function (ad) all attenuation values (in db) refer to fref = 1014.0 hz reference impedance for optimization (zi): erzi = 1 rser = 600. cser = 0.000e+00 rpar = 0. cpar = 0.000e+0 freq loss freq loss (hz) (db) (hz) (db) 100. 44.913 2000. -0.055 200. 0.339 2100. -0.082 300. -0.121 2200. -0.098 400. -0.089 2300. -0.115 500. -0.082 2400. -0.126 600. -0.073 2500. -0.130
semiconductor group 716 application notes vii 700. -0.063 2600. -0.121 800. -0.041 2700. -0.088 900. -0.021 2800. -0.057 1000. -0.004 2900. -0.008 1100. 0.010 3000. 0.058 1200. 0.028 3100. 0.145 1300. 0.031 3200. 0.269 1400. 0.044 3300. 0.380 1500. 0.032 3400. 0.514 1600. 0.023 3500. 0.730 1700. 0.009 3600. 1.073 1800. -0.016 3700. 1.695 1900. -0.032 3800. 3.223 run # 1 r-filter calculation results calculated and quantized coefficients: xr = 0.98877 -0.00364 0.00934 0.00048 0.00679 xrq = 0.99219 -0.00195 0.00879 0.00000 0.00586 bytes for r-filter (2b): 60,29,90,60,b9,8d,0c,9e freq loss freq loss (hz) (db) (hz) (db) 300. -0.014 1900. 0.097 400. 0.006 2000. 0.094 500. 0.029 2100. 0.094 600. 0.053 2200. 0.097 700. 0.077 2300. 0.103 800. 0.099 2400. 0.109 900. 0.118 2500. 0.116 1000. 0.131 2600. 0.122 1100. 0.140 2700. 0.124 1200. 0.144 2800. 0.123 1300. 0.142 2900. 0.118 1400. 0.137 3000. 0.107 1500. 0.129 3100. 0.091 1600. 0.120 3200. 0.071 1700. 0.111 3300. 0.048 1800. 0.103 3400. 0.023 1900. 0.097 3500. 1.003 2000. 0.094 3600. 0.002 gr results: all attenuation values (in db) refer to fref= 1014. hz -rlr slic+z vsicofi/vref rref gr 3.00 - 3.70 - -6.17 - 0.13 = 5.34 ideal 3.03 = 3.70 + -6.17 + 0.13 + 5.37 quant first byte for gain (30): 31,1a calculation of receive transfer function (da)
semiconductor group 717 application notes vii all attenuation values (in db) refer to fref = 1014.0 hz terminating impedance zi at a,b line! erzi = 1 rser = 600. cser = 0.000e+00 rpar = 0. cpar = 0.000e+0 freq loss freq loss (hz) (db) (hz) (db) 100. 35.758 2000. -0.079 200. 0.033 2100. -0.079 300. -0.086 2200. -0.076 400. -0.067 2300. -0.065 500. -0.064 2400. -0.054 600. -0.059 2500. -0.037 700. -0.036 2600. -0.021 800. -0.024 2700. -0.009 900. -0.005 2800. 0.010 1000. -0.002 2900. 0.025 1100. 0.007 3000. 0.039 1200. 0.011 3100. 0.062 1300. -0.001 3200. 0.092 1400. -0.006 3300. 0.143 1500. -0.024 3400. 0.227 1600. -0.033 3500. 0.381 1700. -0.052 3600. 0.671 1800. -0.061 3700. 1.264 1900. -0.076 3800. 2.649 run # 2 b-filter calculation results terminating impedance for optimization (zl): erzl = 1 rsl = 600. csl = 0.000e+00 rpl = 0.cpl = 0.000e+0 terminating impedance zl at a,b line! calculated and quantized coefficients: xb = 0.12434 -0.20703 0.24080 -0.06671 -0.19477 0.18490 0.04671 -0.27867 0.27106 -0.13596 xbq = 0.12451 -0.20312 0.24023 -0.06689 -0.19531 0.18359 0.04663 -0.27930 0.26953 -0.13672 2nd part of bytes b-filter (0b): 00,4b,21,24,3a,5c,e1,13 1st part of bytes b-filter (03): ac,ba,4c,23,2d,ba,31,9f
semiconductor group 718 application notes vii trans hybrid loss freq loss freq loss (hz) (db) (hz) (db) 100. 26.747 1800. 33.657 200. 20.474 1900. 30.738 300. 26.448 2000. 29.176 400. 34.852 2100. 28.525 500. 37.946 2200. 28.141 600. 31.736 2300. 28.321 700. 29.294 2400. 28.877 800. 27.968 2500. 30.016 900. 27.463 2600. 31.356 1000. 27.519 2700. 32.514 1100. 28.381 2800. 32.774 1200. 30.012 2900. 32.179 1300. 31.863 3000. 31.047 1400. 36.126 3100. 30.917 1500. 41.026 3200. 30.506 1600. 47.533 3300. 31.842 1700. 37.952 3400. 34.411 additonal b-filter delay (in seconds): .625e-04 bytes for b-filter delay (18): 19,19,11,19 the coefficients for the sicofi can now be extracted from the result file. in the appendix the transfer measurements of the analog line card for the usa-specification can be found.
semiconductor group 719 application notes vii 4 conclusion this transformer slic fulfills the at&t specifications in terms of return loss, echo return loss, the gain in transmit and the loss in receive direction. the frequency distortion in both directions fulfill the specification, too. other specifications, like long lines with a terminating impedance of 600 w + 2.16 m f or other levels have not been tested. 5 appendix in the appendix you will find C parts list C plots of transfer measurements: a) return loss b) echo return loss c) level in transmit and receive direction d) frequency distortion in transmit and receive direction. parts list r 1 150 k w r 2 200 k w r 3 15 k w r 4 24 k w r 5 20 k w r 6 75 k w r 7 10 k w r 8 220 w c 1 1 m f c 2 1 m f c 3 330 nf z 0 243 w op1 lm356 op2 lm356 transformer
semiconductor group 720 application notes vii figure 2 figure 3
semiconductor group 721 application notes vii figure 4 figure 5
semiconductor group 722 application notes vii figure 6 figure 7
semiconductor group 723 application notes viii sicofi ? layout recommendations for analog line-card applications contents page 1introduction ......................................................................................................... 724 2 power supply ...................................................................................................... 724 3 sicofi ? decoupling .......................................................................................... 724 4 sicofi ? analog and digital ground pins ........................................................ 724 5 separation of digital and analog lines ............................................................ 725 6 pairing voice leads ............................................................................................ 725 7 structured form .................................................................................................. 725 8 crosstalk ............................................................................................................. 725 9 connector pins ................................................................................................... 725 10 analog and digital ground separation ............................................................. 725 11 voltage difference between agnd and dgnd ................................................ 725 12 high voltage ........................................................................................................ 726 13 ground plane ...................................................................................................... 726 14 resistance of ground leads ............................................................................. 726 15 ground loop ....................................................................................................... 726 16 separation of pathsft .......................................................................................... 726 17 leads with transients ........................................................................................ 726 18 plug-in boards connector ................................................................................. 727
semiconductor group 724 application notes viii 1 introduction the most important steps in designing a low noise line card are to insure that the layout of the circuit components and of the electrical paths guarantees a minimum of cross-coupling between analog and digital signals, and to provide well bypassed and clean power supplies, solid ground plane and minimal lead lenghts between components. this paper is a general guide line for the layout of an analog line card. in most cases two printed circuit layers are sufficient but with more layers it is possible to separate the different channels, to have a better ground plane and to obtain a smaller printed circuit board. 2 power supply all leads of the power sources should be bypassed to ground on each printed circuit board. at least one electrolytic capacitor is recommended (at least 10 m f) at the point where all power traces from the components join prior to interfacing with the power connector. 3 sicofi ? decoupling it is recommended to connect a bypass filter close to each sicofi composed of an electrolytic capacitor (10 m f) in parallel to a ceramic capacitor (e.g. 100 nf) between the power supplies (+ 5 v and C 5 v) and ground. thus spikes due to digital switching and high frequency components would be filtered out. the optimum value for the ceramic capacitor is determined by trying and changing the value and observing the noise in each channel. 4 sicofi ? analog and digital ground pins the best configuration to minimize the noise is to connect the digital ground pin and the analog ground pin directly under the sicofi to the analog ground of the printed board. definitions: agnd = analog ground dgnd = digital ground
semiconductor group 725 application notes viii 5 separation of digital and analog lines the layout of the traces should be such that the analog signals are separated from the digital clock and data leads as far as possible. 6 pairing voice leads analog voice circuit leads should be paired on their layouts so that no interfering circuit paths should be permitted to run parallel to them and/or between them. 7 structured form arrange the layout for each line trunk or channel circuit on the board in identical form. 8crosstalk line circuits mounted extremely close to line circuits of adjacent channel increase the possibility of interchannel crosstalk. 9 connector pins avoid the assignment of adjacent connector pins to analog signals and digital signals or power. 10 analog and digital ground separation the optimal grounding configuration except for the sicofi parts is to maintain separate digital and analog grounds on the circuit boards, and to carry these grounds back to the power supply with a low impedance connection. this keeps the grounds separate over the entire system except at the power supply. the sicofi ground pins and the slic ground should be connected to agnd ( see figure 1 ). 11 voltage difference between agnd and dgnd the voltage difference between analog ground leads (agnd) and digital ground leads (dgnd) should be kept low. one method of preventing any substantial voltage difference between leads is to connect two diodes back to back in opposite directions across these two ground leads on each board.
semiconductor group 726 application notes viii 12 high voltage no digital or high voltage level (e.g. ringing supply) should run below or in parallel with analog voice frequency connections. if the analog lines are on the top of the printed circuit board, then agnd or power supply leads should be below them on the other side of the board to prevent analog coupling. 13 ground plane the sicofi should be separated from traces at the bottom of the printed circuit board by a ground plane directly under the device on the component side. 14 resistance of ground leads both ground and power supply leads should have as little resistance and inductance as possible. this can be accomplished by using a ground plane whenever possible. if traces have to be used for ground connections, a minimum width should be maintained for these leads (e.g. 2 mm) and extra large through holes be used when passing the ground connections through the printed circuit board. 15 ground loop make sure that no ground loops exist on the printed circuit board: this would be a perfect antenna for all kind of noises. 16 separation of paths ground separation traces between sensitive leads can be used to avoid cross coupling. 17 leads with transients relay operation, ringing voltage, surges can produce transients. leads carrying such signals should be routed well away from both analog and digital circuits on the line card and in backplanes.
semiconductor group 727 application notes viii 18 plug-in boards connector for plug-in boards, it is recommended to use a connector with different pin lengths. this should help to connect the interface in a distinct order if the board is plugged in under power condition. the correct order is: C super extra long ground pins (allow to discharge the electrostatic charges) C extra long pins for power supplies C long pins for the clock signals C normal pins for the rest of the signals. figure 1
semiconductor group 728 application notes ix using sicofi ? -2 (peb 2260) in iom ? -2 mode contents page 1introduction ......................................................................................................... 729 2 menu trackfile software .................................................................................... 729 3 general aspects ................................................................................................. 729
semiconductor group 729 application notes ix 1 introduction the sicofi ? -2 can work in two different serial interface modes ? sld ? iom-2 in this application note necessary programming steps for the sicofi-2 in an iom-2 environment are shown. they are documented and explained in a trackfile print out that is used on the sipb 5000 userboard system. so the mnemonics refer directly to the modular architecture of the userboard concept. in order to verify this application note the following hardware equipment is used with a pc: C mainboard sipb 5000 C line-card module sipb 5121 C sicofi-2 board sipb 5135 C pcm4 adaptor sipb 5311a 2 menu trackfile software in this application note, the sicofi-2 is connected to two harris-slics hc 5502. basically the sicofi-2 will be C identified C initialized C programmed. the used coefficients for filter programming have been derived from the "sicofi-application note harris-slic hc 5502". for any other hardware environment just use the register handling of the sicofi-2 and modify it for your own application. 3 general aspects using the iom-2 interface with a data clock of 4.096 mhz (dcl) and an 8-khz frame signal, eight iom channels per 125 m s frame on each iom-line will be offered. these iom channels can be individually addressed by the sicofi-2 by its time slots capability. a specific time slot (iom channel) is selected by pin-strapping at ts1/ts2 pins at the sicofi-2. this is carried out by external hardware and the switch s1 on the sicofi-2 board.
semiconductor group 730 application notes ix selected iom ? -2 and ts1/ts2 pins in relation switch s1 table 1 p = + 5 v, 0 = 0 v, n = C 5 v any iom-channel can be splitted into 4 bytes: C 2 data channels (8 bits each) C 1 monitor channel (8 bits) C c/i field (signaling, 6 bits) C handshake bits mr, mx (2 bits) for monitor handshaking. a basic demand in iom-2 realizations is, that any connected circuit has to have its own address. for the sicofi-2 the value 81 h has been specified. before any data can be transmitted to the sicofi-2 via iom-2 interface (e.g. sop/cop commands) the specific address has to be sent in order to activate the device. additionally any iom-2 device can identify itself on request. this is done by sending an identify request string, consisting of bytes 80 h , 00 h . the sicofi-2 responds with bytes 80 h , 80 h . note : sicofi-2 version 1.x has a minor error that can be temporarily solved by programming a work-around. problem: a write sequence to the sicofi-2 blocks the next three commands. they will be just ignored. work-around: any write command is followed by a read command. the read command enables correct acception of new commands. therefore all programming sequences to the sicofi-2 end with a sop-read command in this application note. as reaction, the sicofi-2 sends the contents of cr1 back. for versions higher 1.x, the additional sop-read command can be omitted. iom-2 channel ts1 ts2 position s1 0 1 2 3 4 5 6 7 0 0 p p 0 n p n 0 n 0 n p 0 p p 2 3 4 5 6 7 8 9
semiconductor group 731 application notes ix c ******************************************** c * sicofi2 * c * with * c * harris hc 5502 * c ******************************************** c c hardware: line card sipb 5121 c sicofi2 board sipb 5135 c pcm4 adaptor sipb 5311 c c configuration: c line card: via software c c icofi 2: s1 in position 5 c c pcm4 adaptor: j1 is open c ******************************************** c c sicofi2 set up in channel 3 of iom2 c c s1 in position 5 c c ******************************************** c please run the trackfile c lc_iom2.trk c first to configure the line card c ******************************************** c ******************************************** c c selecting epic to monitor handshake c in channel 3 w /lineca/epic/mchstr/mfsar 1c c ******************************************** c in case of channel 0 mfsar = 04 * c s1 position 2 * c in case of channel 1 mfsar = 0c * c s1 position 3 * c in case of channel 2 mfsar = 14 * c s1 position 4 * c in case of channel 4 mfsar = 24 * c s1 position 6 * c in case of channel 5 mfsar = 2c * c s1 position 7 * c in case of channel 6 mfsar = 34 * c s1 position 8 * c in case of channel 7 mfsar = 3c * c s1 position 9 * c ******************************************** c
semiconductor group 732 application notes ix c channel 3 b1 to pcm timeslot 1 w /lineca/epic/marscr/madr 81 w /lineca/epic/marscr/maar b0 w /lineca/epic/marscr/macr 71 w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 81 w /lineca/epic/marscr/macr 60 c c pcm timeslot 1 to channel 3 b1 w /lineca/epic/marscr/madr 01 w /lineca/epic/marscr/maar 31 w /lineca/epic/marscr/macr 71 c c channel 3 b2 to pcm timeslot 2 w /lineca/epic/marscr/madr 82 w /lineca/epic/marscr/maar b1 w /lineca/epic/marscr/macr 71 w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 82 w /lineca/epic/marscr/macr 60 c c pcm timeslot 2 to channel 3 b2 w /lineca/epic/marscr/madr 02 w /lineca/epic/marscr/maar 30 w /lineca/epic/marscr/macr 71 c c c sicofi identification: c write to sicofi2 80h, 00h w /lineca/epic/mchstr/mffifo 80 w /lineca/epic/mchstr/mffifo 00 c epic enable receive + transmit w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c epic received data r /lineca/epic/mchstr/star 26 c first byte from sicofi2 r /lineca/epic/mchstr/mffifo 80 r /lineca/epic/mchstr/star 26 c second byte from sicofi2 r /lineca/epic/mchstr/mffifo 80 r /lineca/epic/mchstr/star 27 c reset fifo w /lineca/epic/mchstr/cmdr 01 r /lineca/epic/mchstr/star 25 c c initialization of sicofi: c cr4, cr3, cr2, cr1
semiconductor group 733 application notes ix c 00h, 00h, 00h, 00h c for both channels of sicofi2 c c sicofi2 address = 81h w /lineca/epic/mchstr/mffifo 81 w /lineca/epic/mchstr/mffifo c2 w /lineca/epic/mchstr/mffifo 21 w /lineca/epic/mchstr/mffifo 04 w /lineca/epic/mchstr/mffifo 90 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo 47 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the x-filter c c gx - filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 30 c coefficients: w /lineca/epic/mchstr/mffifo 20 w /lineca/epic/mchstr/mffifo 92 w /lineca/epic/mchstr/mffifo 80 w /lineca/epic/mchstr/mffifo 80 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo 47 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address w /lineca/epic/mchstr/mffifo 81
semiconductor group 734 application notes ix c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the gx- c filter c c gr - filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 32 c coefficients: w /lineca/epic/mchstr/mffifo a0 w /lineca/epic/mchstr/mffifo 11 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo 47 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the gr- c filter c b - filter part 1 programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 03 c coefficients: w /lineca/epic/mchstr/mffifo c4 w /lineca/epic/mchstr/mffifo 12 w /lineca/epic/mchstr/mffifo 23 w /lineca/epic/mchstr/mffifo 32 w /lineca/epic/mchstr/mffifo 72
semiconductor group 735 application notes ix w /lineca/epic/mchstr/mffifo b9 w /lineca/epic/mchstr/mffifo b2 w /lineca/epic/mchstr/mffifo ba c read back cr1 and power down: w /lineca/epic/mchstr/mffifo 47 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c part 1 c c b - filter part 2 programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 0b c coefficients: w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 97 w /lineca/epic/mchstr/mffifo fd w /lineca/epic/mchstr/mffifo c8 w /lineca/epic/mchstr/mffifo dd w /lineca/epic/mchstr/mffifo 4c w /lineca/epic/mchstr/mffifo c2 w /lineca/epic/mchstr/mffifo bc c read back cr1 and power down: w /lineca/epic/mchstr/mffifo 47 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo
semiconductor group 736 application notes ix r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c part 2 c c b-filter delay programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 18 c coefficients: w /lineca/epic/mchstr/mffifo 19 w /lineca/epic/mchstr/mffifo 19 w /lineca/epic/mchstr/mffifo 11 w /lineca/epic/mchstr/mffifo 19 c read back cr1 and power up: w /lineca/epic/mchstr/mffifo 67 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c delay c c c sicofi2 channel b c programming the filter c c z-filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 93
semiconductor group 737 application notes ix c coefficients: w /lineca/epic/mchstr/mffifo 20 w /lineca/epic/mchstr/mffifo ba w /lineca/epic/mchstr/mffifo ea w /lineca/epic/mchstr/mffifo 25 w /lineca/epic/mchstr/mffifo 23 w /lineca/epic/mchstr/mffifo 41 w /lineca/epic/mchstr/mffifo c1 w /lineca/epic/mchstr/mffifo bb c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the z-filter c c r - filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo ab c coefficients: w /lineca/epic/mchstr/mffifo d0 w /lineca/epic/mchstr/mffifo c8 w /lineca/epic/mchstr/mffifo 84 w /lineca/epic/mchstr/mffifo dc w /lineca/epic/mchstr/mffifo b1 w /lineca/epic/mchstr/mffifo 93 w /lineca/epic/mchstr/mffifo 02 w /lineca/epic/mchstr/mffifo 1d c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20
semiconductor group 738 application notes ix c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the r-filter c c x - filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo a3 c coefficients: w /lineca/epic/mchstr/mffifo 50 w /lineca/epic/mchstr/mffifo c8 w /lineca/epic/mchstr/mffifo b5 w /lineca/epic/mchstr/mffifo 4a w /lineca/epic/mchstr/mffifo c2 w /lineca/epic/mchstr/mffifo 21 w /lineca/epic/mchstr/mffifo 04 w /lineca/epic/mchstr/mffifo 90 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is emply r /lineca/epic/mchstr/star 25 c end of programming the x-filter c c gx - filters programming
semiconductor group 739 application notes ix w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo b0 c coefficients: w /lineca/epic/mchstr/mffifo 20 w /lineca/epic/mchstr/mffifo 92 w /lineca/epic/mchstr/mffifo 80 w /lineca/epic/mchstr/mffifo 80 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the gx- c filters c c gr - filter programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 32 c coefficients: w /lineca/epic/mchstr/mffifo a0 w /lineca/epic/mchstr/mffifo 11 c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26
semiconductor group 740 application notes ix c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the gr- c filters c c b - filter part 1 programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 83 c coefficients: w /lineca/epic/mchstr/mffifo c4 w /lineca/epic/mchstr/mffifo 12 w /lineca/epic/mchstr/mffifo 23 w /lineca/epic/mchstr/mffifo 32 w /lineca/epic/mchstr/mffifo 72 w /lineca/epic/mchstr/mffifo b9 w /lineca/epic/mchstr/mffifo b2 w /lineca/epic/mchstr/mffifo ba c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c part 1 c c b - filter part 2 programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 8b c coefficients:
semiconductor group 741 application notes ix w /lineca/epic/mchstr/mffifo 00 w /lineca/epic/mchstr/mffifo 97 w /lineca/epic/mchstr/mffifo fd w /lineca/epic/mchstr/mffifo c8 w /lineca/epic/mchstr/mffifo dd w /lineca/epic/mchstr/mffifo 4c w /lineca/epic/mchstr/mffifo c2 w /lineca/epic/mchstr/mffifo bc c read back cr1 and power down: w /lineca/epic/mchstr/mffifo c7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81 c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c part 2 c c b - filter delay programming w /lineca/epic/mchstr/mffifo 81 c cop command: w /lineca/epic/mchstr/mffifo 98 c coefficients: w /lineca/epic/mchstr/mffifo 19 w /lineca/epic/mchstr/mffifo 19 w /lineca/epic/mchstr/mffifo 11 w /lineca/epic/mchstr/mffifo 19 c read back cr1 and power up: w /lineca/epic/mchstr/mffifo e7 r /lineca/epic/mchstr/star 24 c send the bytes to sicofi & read out w /lineca/epic/mchstr/cmdr 08 r /lineca/epic/mchstr/ista 20 c byte in fifo r /lineca/epic/mchstr/star 26 c sicofi address r /lineca/epic/mchstr/mffifo 81
semiconductor group 742 application notes ix c new byte in fifo r /lineca/epic/mchstr/star 26 c cr1: r /lineca/epic/mchstr/mffifo 00 r /lineca/epic/mchstr/star 27 w /lineca/epic/mchstr/cmdr 01 c fifo is empty r /lineca/epic/mchstr/star 25 c end of programming the b-filter c delay c c sicofi2 is programmed and power up c of both channels c c ************************************ c activation of harris-slic c /rc = 1 ,/pd = 1 c ************************************ c c adr, c3a, ci2, ci1, c2, c1, 1, 1 c 1/0, x, x, x,/rc,/pd, 1, 1 c c sicofi2 channel a w /lineca/epic/marscr/madr 0f w /lineca/epic/marscr/maar 38 w /lineca/epic/marscr/macr 48 c c sicofi2 channel b w /lineca/epic/marscr/madr 8f w /lineca/epic/marscr/maar 38 w /lineca/epic/marscr/macr 48 c c end of activation c c ************************************ c read the signaling information c /gkd, /shd c from the harris-slic c ************************************ c c switch on the last-look-logic c w /lineca/epic/marscr/cmdr 40 c c ci2b, ci1b, i1b, ci2a, ci1a, i1a, 1, 1 c /gkd,/gkd,/shd,/gkd,/gkd,/shd, 1, 1
semiconductor group 743 application notes ix c channel b , channel a , 1, 1 c c slic at sicofi2 channel b+a c c madr = ff a= on hook b= on hook c madr = fb a=off hook b= on hook c madr = df a= on hook b=off hook c madr = db a=off hook b=off hook c w /lineca/epic/marscr/maar b8 w /lineca/epic/marscr/macr c8 r /lineca/epic/marscr/madr d8 c both terminals are off-hook and no c ground key c end of trackfile
semiconductor group 744 application notes x daml simulation using the sipb 5000 userboard system contents page 1introduction ........................................................................................................ 745 2 required hardware ............................................................................................ 746 3 operational information .................................................................................... 749 4 glossary ............................................................................................................. 750 5track files .......................................................................................................... 751 5.1 track file damlcot.trk for cot side ............................................................. 751 5.2 track file damlrt.trk for rt side................................................................... 756
semiconductor group 745 application notes x 1 introduction this application note describes the simulation of a digital added main line (daml) using components of the siemens isdn pc user board system sipb 5000. in practice during the transition period from a pure analog telephone network to the future integrated services digital network (isdn) the daml provides a cost-effective provisional extension (doubling) of traffic capability of existing installations. daml is a concept of integrating digital transmission into an existing analog communication system with the aim of increasing its performance. it provides telephony facility for two independent analog subscribers on a single local wire pair. the transmission principle uses echo cancellation and message recovery according to american national standards institute (ansi) t1e1 specification for the u interface (2b1q line code). this application note is not only to show the simplicity of insertion of this feature but also the high quality of the extra gained transmission channel. in addition this example is a good introduction to digital communication and to the flexibility in application of the sipb system components. for simulation a subscriber loop is reproduced using a te and a nts station. the necessary hardware is listed in section 2. special information on setting up and running the test equipment are given in section 3. as from versatility reasons several features of the isdn components are left for software programming, the respective initializing procedure is performed by track files which are to be found in section 5. a pc at serves for the interface to the user. using the siemens menu software which enables access down to the register level of the employed components gives deep insight into the operational procedure of such a set-up.
semiconductor group 746 application notes x 2 required hardware figure 1 shows the set-up of a subscriber loop between a nts and a te, where a daml is to be simulated. the hardware required at the terminals differs slightly according to the peculiar configuration: nts-configuration: 1 itac ? module sipb 5140 1 audio interface module v2.0 sipb 5130 1 layer-2 module sipb 5120-2 1 iec-q reference module lt sipb 2091 1 sicofi ? -2 board sipb 5135 2 analog telephone sets 2 slics (harris hc 5502) 1 adapter cable te-configuration: 1 audio interface module v2.0 sipb 5130 1 layer-2 module sipb 5120-2 1 iec-q reference module nt sipb 2091 1 sicofi ? -2 board sipb 5135 2 analog telephone sets 2 slics (harris hc 5502) 1 adapter cable as the sicofi-2 board has been developed originally for connection to the line card module, and the audio interface module at its service access connector (sac) shows a differring pinning, a peculiar adapter cable has to be used. the particular design depends on wether the reset of the sicofi-2 will be used or not (including an inverter stage or not). a schematic of these adapter cables is shown in figure 2 .
semiconductor group 747 application notes x figure 1 set-up for simulating a daml itb02308 audio interface module layer-2 module firmware v2.0 mainboard pic iec-q reference module (lt mode) slic board slic telephone board slic slic (nt mode) module reference iec-q pic mainboard firmware v2.0 module interface audio- sld u sld cot side rt side v.2.0 r itac module sipb 5140 sipb 5130 sipb 5120-2 sipb 2091 sipb 2091 sipb 5135 sicofi -2 r telephone board telephone board telephone board board module layer-2 sipb 5130 sipb 5120-2 sipb 5135 sicofi -2 r
semiconductor group 748 application notes x top: reset not connected to the sicofi-2 board, bottom: reset connected to the sicofi- 2 board figure 2 wiring of the sicofi-2 adapter cable its02310 mainboard plug male sicofi plug female gnd 1 +5 v 2 3 -5 v ring 4 5 dtmf clk 6 7 fsc sld 8 9 res 9 8 7 6 5 4 3 2 1 gnd +5v dcl fsc sipo du res iden 12 ic 1a 74lso4 _ r -2 its02309 mainboard plug male plug female gnd 1 +5 v 2 3 -5 v ring 4 5 dtmf clk 6 7 fsc sld 8 9 res 9 8 7 6 5 4 3 2 1 gnd +5v dcl fsc sipo du res iden _ -2 r sicofi
semiconductor group 749 application notes x 3 operational information the modules of the nts and te configurations each are plugged to the add-on module connectors (amc) of a sipb 5000 mainboard, which in turn are inserted into an expansion slot of an ibm at or compatible (for safety reasons please refer to the respective instructions of the user manual of the computer manufacturer for internal installation procedures). before insertion into the pc, the modules are configured to the particular mode: nts: layer-2 module all dip switches to off position audio interface module switches s1 4 to off position no jumpers set te: layer-2 module all dip switches to off position audio interface module switches s1, s2, s4 to off position switch s3 to on position no jumpers set the iec-q reference boards are connected externally to that sac which corresponds to the amc the layer-2 modules are plugged to. similarly the sicofi-2 boards bearing two slics each are connected to the sac corresponding to the audio interface modules using the peculiar adapter cable ( refer to figure 1 ). telephone sets and slics, and iec-q reference boards are interconnected using single wire pairs (a/b lines and u interface respectively). the configuration of iec-q reference boards depends on the particular mode: lt: dip switches 1 3 to off position dip switches 4 7 to on position jumpers j1, j2 set, jumper j5 open jumpers j3, j4 set to position a-b te: dip switch s1 to off position dip switches 2 7 to on position jumpers j1, j2 set at the sicofi-2 board the rotary switch s1 is put to position 0 (dip switch s2 don't care).
semiconductor group 750 application notes x 4 glossary amc add-on module connector daml digital added main line iec-q isdn echo cancellation circuit conforming to 2b1q transmission mode isdn integrated services digital network itac isdn terminal adapter circuit lt line termination nt network termination nts network termination on s bus sac service access connector sicofi signal processing codec filter sicofi-2 dual channel codec filter sipb siemens isdn pc user board (system) slic subscriber line circuit te terminal equipment 2b1q transmission mode requiring 120-khz bandwidth
semiconductor group 751 application notes x 5 track files note: the filter coefficients of the sicofi are calculated to meet the specifications of the deutsche bundespost. 5.1 track file damlcot.trk for cot side c **************************************** c this track file supports daml applic- c ations with the sicofi2 board sipb 5135 c and fits to the track file d a m l c (rt = remote terminal) c c c note: c - please use audio module version 2.0 c - please use firmware version v2.0 c - please use a adaptor cable for sicofi2 c board sipb 5135 c c - start with this track file! c **************************************** c c reset and deactivation the iecq w /li_nts/iccb/serial/cixr 47 r /li_nts/iccb/serial/ista 04 r /li_nts/iccb/serial/cirr 06 r /li_nts/iccb/serial/ista 00 w /li_nts/iccb/serial/cixr 40 r /li_nts/iccb/serial/ista 04 r /li_nts/iccb/serial/cirr 3e r /li_nts/iccb/serial/ista 00 c c s t o p - s t o p - s t o p c now go to daml rt side c for reset and deactivation of rt c c c activation of u interface w /li_nts/iccb/serial/cixr 60 r /li_nts/iccb/serial/ista 04 r /li_nts/iccb/serial/cirr 22 c c w a i t - w a i t - w a i t c several seconds, max. 15sec, c for adaption of echo cancellor c and equalizer c r /li_nts/iccb/serial/ista 04 r /li_nts/iccb/serial/cirr 1e r /li_nts/iccb/serial/cirr 1c r /li_nts/iccb/serial/cirr 1c
semiconductor group 752 application notes x c c s t o p - s t o p - s t o p c go back to rt side c for activation indication (ai) c r /li_nts/iccb/serial/ista 04 r /li_nts/iccb/serial/cirr 32 r /li_nts/iccb/serial/ista 00 r /li_nts/iccb/serial/cirr 30 r /li_nts/iccb/serial/cirr 30 r /li_nts/iccb/serial/cirr 30 r /li_nts/iccb/serial/ista 00 c c switch the proper port of icc w /li_nts/iccb/serial/spcr 45 d c programming of sicofi2 c the configuration register cr3-cr1 d b 05 b 00 b 00 b 00 b 85 b 00 b 00 b 00 x /li_nts/iccb/bus/contr c c the z-filters d b 13 b 20 b ba b ea b 25 b 23 b 41 b c1 b bb b 93 b 20 b ba b ea b 25 b 23 b 41 b c1 b bb x /li_nts/iccb/bus/contr c c the r-filters
semiconductor group 753 application notes x d b 2b b d0 b c8 b 84 b dc b b1 b 93 b 02 b 1d b ab b d0 b c8 b 84 b dc b b1 b 93 b 02 b 1d x /li_nts/iccb/bus/contr d c c the x-filters d b 23 b 50 b c8 b b5 b 4a b c2 b 21 b 04 b 90 b a3 b 50 b c8 b b5 b 4a b c2 b 21 b 04 b 90 x /li_nts/iccb/bus/contr c c the b-filters part 1 d b 0b b 00 b 97 b fd b c8 b dd
semiconductor group 754 application notes x b 4c b c2 b bc b 8b b 00 b 97 b fd b c8 b dd b 4c b c2 b bc x /li_nts/iccb/bus/contr c c the b-filters part 2 d b 03 b c4 b 12 b 23 b 32 b 72 b b9 b b2 b ba b 83 b c4 b 12 b 23 b 32 b 72 b b9 b b2 b ba x /li_nts/iccb/bus/contr c c the b-filters delay d b 18 b 19 b 19 b 11 b 19 b 98 b 19 b 19 b 11 b 19 x /li_nts/iccb/bus/contr c c the gx filters d
semiconductor group 755 application notes x b 30 b 20 b 92 b 80 b 80 b b0 b 20 b 92 b 80 b 80 x /li_nts/iccb/bus/contr c c the gr-filters d b 3a b a0 b 11 b ba b a0 b 11 x /li_nts/iccb/bus/contr c c switch on all filters d b 25 b 00 b 00 b fc b a5 b 00 b 00 b fc x /li_nts/iccb/bus/contr c c activation of the harris-slic w /li_nts/iccb/serial/sscx 33 c c now you can talk c c **************************************** c end of track file c ****************************************
semiconductor group 756 application notes x 5.2 track file damlrt.trk for rt side c **************************************** c this track file supports daml applic- c ations with the sicofi2 board sipb 5135 c and fits to the track file d a m l c (cot = central office terminal) c c c note: c - please use audio module version 2.0 c - please use firmware version v2.0 c - please use a adaptor cable for sicofi2 c board sipb 5135 c c - start with daml (cot)! c **************************************** c c reset and deactivate the iecq w /li_te/iccb/serial/spcr 80 w /li_te/iccb/serial/cixr 47 w /li_te/iccb/serial/spcr 00 r /li_te/iccb/serial/ista 04 r /li_te/iccb/serial/cirr 1e r /li_te/iccb/serial/ista 04 r /li_te/iccb/serial/cirr 02 r /li_te/iccb/serial/ista 00 w /li_te/iccb/serial/cixr 7c r /li_te/iccb/serial/ista 04 r /li_te/iccb/serial/cirr 3e r /li_te/iccb/serial/ista 00 c c s t o p - s t o p - s t o p c go back to daml cot side c for activation the u interface c r /li_te/iccb/serial/ista 04 r /li_te/iccb/serial/cirr 22 r /li_te/iccb/serial/ista 00 r /li_te/iccb/serial/cirr 20 r /li_te/iccb/serial/ista 00 c c activation indication (ai) c w /li_te/iccb/serial/cixr 70 r /li_te/iccb/serial/ista 04 r /li_te/iccb/serial/cirr 32 r /li_te/iccb/serial/cirr 30 r /li_te/iccb/serial/cirr 30 r /li_te/iccb/serial/ista 00 c c now the u interface is transparent
semiconductor group 757 application notes x c c c switch the proper port in icc w /li_te/iccb/serial/spcr 45 w /li_te/iccb/serial/sscx 00 c c programming of sicofi2 c the configuration register cr3-cr1 d b 05 b 00 b 00 b 00 b 85 b 00 b 00 b 00 x /li_te/iccb/bus/contr c c the z-filters d b 13 b 20 b ba b ea b 25 b 23 b 41 b c1 b bb b 93 b 20 b ba b ea b 25 b 23 b 41 b c1 b bb x /li_te/iccb/bus/contr c c the r-filters d b 2b b d0 b c8 b 84 b dc b b1 b 93 b 02 b 1d
semiconductor group 758 application notes x b ab b d0 b c8 b 84 b dc b b1 b 93 b 02 b 1d x /li_te/iccb/bus/contr d c c the x-filters d b 23 b 50 b c8 b b5 b 4a b c2 b 21 b 04 b 90 b a3 b 50 b c8 b b5 b 4a b c2 b 21 b 04 b 90 x /li_te/iccb/bus/contr c c the b-filters part 1 d b 0b b 00 b 97 b fd b c8 b dd b 4c b c2 b bc b 8b b 00 b 97 b fd b c8 b dd b 4c
semiconductor group 759 application notes x b c2 b bc x /li_te/iccb/bus/contr c c the b-filters part 2 d b 03 b c4 b 12 b 23 b 32 b 72 b b9 b b2 cb ba b 83 b c4 b 12 b 23 b 32 b 72 b b9 b b2 b ba x /li_te/iccb/bus/contr c c the b-filters delay d b 18 b 19 b 19 b 11 b 19 b 98 b 19 b 19 b 11 b 19 x /li_te/iccb/bus/contr c c the gx filters d b 30 b 20 b 92 b 80 b 80 b b0 b 20 b 92 b 80 b 80
semiconductor group 760 application notes x x /li_te/iccb/bus/contr c c the gr-filters d b 3a b a0 b 11 b ba b a0 b 11 x /li_te/iccb/bus/contr c c switch on all filters d b 25 b 00 b 00 b fc b a5 b 00 b 00 b fc x /li_te/iccb/bus/contr c c activation of the harris-slic w /li_te/iccb/serial/sscx 33 c c now you can talk c c **************************************** c end of track file c ****************************************
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